IET Power Electronics最新文献_第5页

A stable machine learning based control for bidirectional interleaved DC/DC converter in battery systems

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-16 DOI: 10.1049/pel2.12847

Ran Li, Ruigang Wang, Wendong Feng, Tianhao Qie, Yulin Liu, Tyrone Fernando, Herbert HoChing Iu, Xinan Zhang

引用次数: 0

High-efficiency multilevel inverter topology with minimal switching devices for enhanced power quality and reduced losses

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-15 DOI: 10.1049/pel2.12851

Ramesh Jayaraman, Sandirasegarane Thamizharasan, Jeevarathinam Baskaran, Veerpratap Meena, Jitendra Bahadur, Vinay Kumar Jadoun

{"title":"High-efficiency multilevel inverter topology with minimal switching devices for enhanced power quality and reduced losses","authors":"Ramesh Jayaraman, Sandirasegarane Thamizharasan, Jeevarathinam Baskaran, Veerpratap Meena, Jitendra Bahadur, Vinay Kumar Jadoun","doi":"10.1049/pel2.12851","DOIUrl":"https://doi.org/10.1049/pel2.12851","url":null,"abstract":"The advent of multilevel inverters (MLIs) has brought significant advancements in their applications across industrial, residential, and renewable energy sectors, as they produce high-quality output voltage that closely approximates a sinusoid in small voltage steps or levels, resulting in lower total harmonic distortion (THD) and reduced electromagnetic interference (EMI). However, the MLI topologies require more switching unidirectional/bidirectional semiconductor devices with high standing voltage, gate drivers, and complex control strategies while attaining higher voltage levels. From this perspective of reducing component count and gate drivers, the objective is to develop a new MLI topology that overcomes the drawbacks above. In this article, a novel MLI topology is introduced in symmetric and asymmetric configurations aiming to attain fewer power electronic devices for synthesizing more steps in the load voltage in contrast with conventional topologies. The idea behind the approach is coining the series connected voltage source, which imbibes bidirectional current flow with an additional voltage source for performing algebraic operation under asymmetrical modes of operation. The proposed topology uses minimal on-state switching devices leading to a diminution of power loss and voltage drop. The suggested topology is optimized for a fewer number of power devices, an input DC supply, and auxiliary gate drivers to achieve a maximum voltage level in the load terminals. The suggested topology has been verified in SIMULINK and the laboratory prototype is constructed in line with the simulated response to demonstrate its performance suitable for real-time applications.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12851","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143115152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Proposing a new rotating frame-based method for dynamic modelling of resonant converters

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-15 DOI: 10.1049/pel2.12848

Ahmad Abbasi, Abbas Ghayebloo

{"title":"Proposing a new rotating frame-based method for dynamic modelling of resonant converters","authors":"Ahmad Abbasi, Abbas Ghayebloo","doi":"10.1049/pel2.12848","DOIUrl":"https://doi.org/10.1049/pel2.12848","url":null,"abstract":"Resonant converters are widely used in various industrial applications due to features such as wide input voltage range, high efficiency, and high-power density. Mathematical modelling of these converters is crucial because they simultaneously exhibit AC and DC modes, complicating the design of their controllers. This paper proposes a new method for modelling of resonant converters based on the rotating frame theory. The proposed model possesses two essential features for controller design: being dynamic and having all DC states. The complexity of the model is significantly lower than other methods, such as MHA methods. Also compared to first harmonic approximation, Dp and generalized state space averaging methods, the proposed dq model has not any approximations for the inverter output voltage and transferred output voltage in the transformer primary side. The proposed method is compared with conventional modelling methods for such converters, including the first harmonic approximation, generalized state space averaging, nonlinear equation models, and circuit simulation models. According to the presented results, the proposed model demonstrates superiority in terms of accuracy and simplicity over the methods. Simulation results along with practical results from a prototype circuit are provided, highlighting the effectiveness of the proposed method.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12848","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143115255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A novel reliability estimation methodology towards the design and implementation of symmetric multilevel inverter for long run applications

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-15 DOI: 10.1049/pel2.12843

Daki Krishnachaitanya, Chitra Annamalai, Maher Al-Greer, Sitangshu Sekhar Biswas

{"title":"A novel reliability estimation methodology towards the design and implementation of symmetric multilevel inverter for long run applications","authors":"Daki Krishnachaitanya, Chitra Annamalai, Maher Al-Greer, Sitangshu Sekhar Biswas","doi":"10.1049/pel2.12843","DOIUrl":"https://doi.org/10.1049/pel2.12843","url":null,"abstract":"Multilevel inverters (MLIs) are gaining attention in numerous applications due to their better performance attributes. Still, their utility in long-run applications remains a critical concern due to the reliability issues. This work proposes a novel reliability estimation methodology tailored specifically for MLIs. The proposed reliability method employs advanced simulation techniques and statistical models to estimate the failure probabilities of critical components within the MLI. The proposed methodology provides a more optimal assessment of the MLI's expected reliability over time. This enables designers and engineers to make informed decisions regarding component selection, system configuration, and maintenance schedules to enhance the long-term reliability of the MLI. Considering the drawbacks of the existing MLIs, this work has proposed a new symmetrical 7-level inverter with promising functional and reliability traits. The proposed topology appears to surpass existing topologies in several key metrics, including switching losses, reliability, THD, and component count. The performance of the proposed MLI has been validated through hardware results. These results show that the reliability methodology implemented can accurately estimate the MLI's reliability across various scenarios, enabling the identification of potential failure points and the formulation of strategies to mitigate reliability risks.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12843","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143115153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Integrated DC arc model and DC arc detection approach based on K-line diagram and spectrum integral difference

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-15 DOI: 10.1049/pel2.12849

Qing Xiong, Junyi Zhang, Jianghan Li, Yijie Tang, Yi Zhuang, Yanjie Cui, Rui Li, Shengchang Ji

{"title":"Integrated DC arc model and DC arc detection approach based on K-line diagram and spectrum integral difference","authors":"Qing Xiong, Junyi Zhang, Jianghan Li, Yijie Tang, Yi Zhuang, Yanjie Cui, Rui Li, Shengchang Ji","doi":"10.1049/pel2.12849","DOIUrl":"https://doi.org/10.1049/pel2.12849","url":null,"abstract":"In the low voltage direct current (LVDC) systems, the occurrence of DC series arc faults poses a significant threat to the safe operation of the system. This paper develops an accurate arc model for the arc fault simulation. The proposed arc model consists the steady-state impedance, high frequency characteristics, and dynamic characteristics of the arc. Additionally, this paper proposes an arc detection algorithm combining the K-line diagram and the spectrum integral difference of the arc current in the LVDC systems. This algorithm can identify four circuit states: normal operation, arc fault, switching action, and load mutation, which addresses the challenge of arc fault detection in complex working conditions. The STM32F407 microcontroller is utilized to design a DC series arc fault detector. Online detection tests demonstrate that the arc faults can be accurately detected and isolated within 37 ms, meeting the requirement of the UL1699B standard, with an accuracy rate of 99.33%. These achievements not only enhance the safety of the LVDC systems but also provide valuable references for the development of arc fault detection technology.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12849","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143115154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An optimal control for dual active bridge converter in battery charging applications

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-11 DOI: 10.1049/pel2.12850

Junrui Wang, Xuanjing Qiao, Linhui Li, Ruiqi Li

{"title":"An optimal control for dual active bridge converter in battery charging applications","authors":"Junrui Wang, Xuanjing Qiao, Linhui Li, Ruiqi Li","doi":"10.1049/pel2.12850","DOIUrl":"https://doi.org/10.1049/pel2.12850","url":null,"abstract":"Dual active bridge (DAB) converter is an ideal bidirectional DC/DC converter and serves as a core device for enabling bidirectional energy transfer in power router systems and energy storage units. In order to reduce power losses and battery damage during the charging process, a minimum current stress control scheme satisfying soft switching conditions is proposed. Additionally, a three-stage charging of the battery is achieved based on voltage and current dual-loop control. This article analyzes the working principles of the DAB converter using triple-phase-shift (TPS) modulation. By examining the switching modes and waveforms of the DAB converter under TPS modulation, the condition for achieving soft switching is determined. Furthermore, a combination of the Lagrange multiplier method (LMM) and the Karush-Kuhn-Tucker (KKT) algorithm is employed to ensure that the DAB converter operates under both soft switching and minimum current stress conditions. This approach simultaneously reduces both switching and conduction losses, thereby enhancing the charging efficiency of the battery. Finally, an experimental platform is established for validation, and the experimental results confirm the effectiveness of the proposed modulation strategy.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12850","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143114243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

The digital twin of complex shipboard DC microgrids: The high-performing synergy of compiled models and HIL platform in the dynamics emulation of zonal power electronic power distribution systems

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-10 DOI: 10.1049/pel2.12835

Andrea Alessia Tavagnutti, Andrea Vicenzutti, Massimiliano Chiandone, Daniele Bosich, Giorgio Sulligoi

{"title":"The digital twin of complex shipboard DC microgrids: The high-performing synergy of compiled models and HIL platform in the dynamics emulation of zonal power electronic power distribution systems","authors":"Andrea Alessia Tavagnutti, Andrea Vicenzutti, Massimiliano Chiandone, Daniele Bosich, Giorgio Sulligoi","doi":"10.1049/pel2.12835","DOIUrl":"https://doi.org/10.1049/pel2.12835","url":null,"abstract":"Nowadays, resilience is a crucial attribute to be pursued in advanced shipboard DC microgrids. When the power distribution is zonal, the presence of autonomous-controlled converters guarantees both power use and resiliency improvement. The adoption of bidirectional controlled devices ensures power routing among generating units, storage, and loads. Moreover, zonal electrical distribution systems are effective in applying the optimization algorithms for green, safe, and high-performing ship operation. In zonal DC microgrids, real-time cooperation among controlled converters through properly set communication protocols enables the ship mission achievement. To this aim, functional tests are to be done on such complex power infrastructure. The digital twin approach provides the de-risking step before the onboard deployment for controlled systems and communication. A zonal DC shipboard microgrid is the case study to test the synergy between compiled models and power converters on two hardware in the loop platforms, then verified by experiment in this paper. The first platform exploits the Linux real time application interface on the average value models of converters. This solution is then compared with a platform that utilizes the Typhoon hardware in the loop environment, proposing a combination of average value models and detailed switching models for the real-time emulation of controlled grid.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12835","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143113862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Parametric LCA model for power electronic ecodesign process: Addressing MOSFET-Si and HEMT-GaN technological issues

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-06 DOI: 10.1049/pel2.12844

Li Fang, Yannis Rosset, Benoît Sarrazin, Pierre Lefranc, Maud Rio

{"title":"Parametric LCA model for power electronic ecodesign process: Addressing MOSFET-Si and HEMT-GaN technological issues","authors":"Li Fang, Yannis Rosset, Benoît Sarrazin, Pierre Lefranc, Maud Rio","doi":"10.1049/pel2.12844","DOIUrl":"https://doi.org/10.1049/pel2.12844","url":null,"abstract":"Traditional efforts of the last decades to optimize energy efficiency during the use phase of power electronic (PE) appear insufficient for achieving environmental sustainability. These single-criterion optimization approaches often lead to unintended negative environmental impacts, such as air, water, and soil pollutions, or additional raw material flow extraction to develop new technologies. Design options easing repair, reuse, and recycling of PE products are usually reduced with higher power density technology choices. Life cycle assessment (LCA) offers a framework for evaluating these impacts, but the conventional LCA is primarily for post-design evaluation, and is resource- and time-intensive. To make LCA a proactive design method that allows teams to monitor environmental consequences from the beginning of design planning, this study developed a parametric life cycle assessment (PLCA) meta-model specifically for PE, integrated into an innovative ecodesign process. The PLCA meta-model identifies key parameters influencing environmental impacts across the product life cycle and establishes mathematical relationships between these control parameters and environmental impact indicators. The case study results shows that the integration of this new PLCA model in the beginning of the design process has supported PE designers to develop, evaluate, and optimize ecodesign PE product circular life cycle scenarios.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12844","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143112448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Power oscillation suppression strategy of VSG based on finite-time Hamiltonian method

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-04 DOI: 10.1049/pel2.12845

Guo Xiaomei, Yonggang Li, Yichen Zhou

{"title":"Power oscillation suppression strategy of VSG based on finite-time Hamiltonian method","authors":"Guo Xiaomei, Yonggang Li, Yichen Zhou","doi":"10.1049/pel2.12845","DOIUrl":"https://doi.org/10.1049/pel2.12845","url":null,"abstract":"In order to improve the stability of the virtual synchronous generator (VSG) system and suppress the power oscillation, a power oscillation suppression strategy of VSG based on the finite-time Hamiltonian method is proposed in this paper. Firstly, based on the traditional VSG control, the port-controlled Hamiltonian with dissipation model for the active power closed-loop circuit of the VSG grid-connected inverter is established by considering additional control inputs. Secondly, a Hamiltonian finite-time controller design method based on interconnection and damping assignment passivity-based control is proposed to achieve finite-time stability of the system. The Hamiltonian function is designed as a fractional power form by energy shaping, and the convergence speed of the system is accelerated by damping injection so that the system can quickly stabilize at the expected balance point. Then, the designed Hamiltonian function is taken as the Lyapunov function to analyse the system stability and calculate the convergence time of the VSG system. Finally, the simulation and hardware in the loop verification results show the effectiveness and great potential of this proposed controller in shortening the power oscillation time.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12845","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143112043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A low-cost MMC submodule topology with fast DC fault handling capability

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-01-03 DOI: 10.1049/pel2.12846

Yiqi Liu, Laicheng Yin, Zhaoyu Duan, Zhenjie Li, Mingfei Ban, Jiawei Zhang

{"title":"A low-cost MMC submodule topology with fast DC fault handling capability","authors":"Yiqi Liu, Laicheng Yin, Zhaoyu Duan, Zhenjie Li, Mingfei Ban, Jiawei Zhang","doi":"10.1049/pel2.12846","DOIUrl":"https://doi.org/10.1049/pel2.12846","url":null,"abstract":"With the continuous development of new energy technologies and the widespread application of high voltage direct current transmission technology, the use of modular multilevel converters (MMC) has significantly increased. Traditional MMCs, composed of half-bridge submodules, lack fault handling capabilities, and cannot block fault currents on the DC side, thus compromising the stability of transmission systems. Therefore, this study proposes a low-cost improved MMC submodule topology based on the dual-bidirectional switch submodule (DBSSM) and provides an analysis and description of its structure and operating principles. The proposed DBSSM structure can output five voltage levels: 0, ± Uc, and ±2 Uc. Compared to the full-bridge submodule topology, which achieves the same effect, the DBSSM reduces the number of IGBTs by half, significantly lowering hardware costs. A simulation model with a DC side voltage of 80 kV was built using MATLAB/Simulink to verify this topology. In the 80 kV scenario, the proposed DBSSM achieved DC fault ride-through within 3 ms, doubling the speed compared to the full-bridge submodule. Finally, hardware-in-the-loop testing was performed using the dSPACE1202 and relevant hardware circuits, confirming the feasibility of the proposed structure.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12846","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143111151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0