IET Power Electronics最新文献

Remaining Useful Life Prediction of Thyristors for UHVDC Converter Valve Based on Bivariate Nonlinear Wiener Process 基于二元非线性维纳过程的特高压直流换流阀晶闸管剩余使用寿命预测

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-27 DOI: 10.1049/pel2.70058

Yujiao Zhang, Chao Zhang, Zhong Chen, Lin Zhu, Di Hu, Xiongfeng Huang

{"title":"Remaining Useful Life Prediction of Thyristors for UHVDC Converter Valve Based on Bivariate Nonlinear Wiener Process","authors":"Yujiao Zhang, Chao Zhang, Zhong Chen, Lin Zhu, Di Hu, Xiongfeng Huang","doi":"10.1049/pel2.70058","DOIUrl":"https://doi.org/10.1049/pel2.70058","url":null,"abstract":"Remaining useful life (RUL) prediction is a key technology for prognostics and health management (PHM). However, the conventional thyristor RUL prediction method that solely relies on a single degradation indicator proves insufficient in comprehensively reflecting the thyristor's overall health status. In this paper, we proposed a thyristor RUL prediction method based on the bivariate nonlinear Wiener process. First, a thyristor degradation model with a single degradation indicator is established based on the nonlinear Wiener process. The model can describe the nonlinearity and stochasticity of the thyristor degradation process. Then a two-performance-dependent thyristor degradation model is established based on the Copula function. Finally, the Markov Chain-Monte Carlo (MCMC) method is adopted to estimate the unknown parameters of the model. The on-state voltage and reverse recovery charge serve as key degradation indicators, and the proposed method is validated by relying on the accelerated life test data, comparing the RUL prediction results of different models. The results show that the proposed method can more comprehensively describe the health state of the thyristor, and the result of RUL based on the proposed model is closer to the actual results.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70058","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144503151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Grid-Forming Converter for DC Microgrid With Virtual Separately Excited DC Machine Control Strategy and Dual Active Bridge (DAB) Converter 基于虚拟分励直流电机控制策略和双有源桥（DAB）变换器的直流微电网成网变换器

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-24 DOI: 10.1049/pel2.70067

Hesam Pishbahar, Hassan Moradi, Shokoofeh Bagheri, Navid Piri Yengijeh

{"title":"Grid-Forming Converter for DC Microgrid With Virtual Separately Excited DC Machine Control Strategy and Dual Active Bridge (DAB) Converter","authors":"Hesam Pishbahar, Hassan Moradi, Shokoofeh Bagheri, Navid Piri Yengijeh","doi":"10.1049/pel2.70067","DOIUrl":"https://doi.org/10.1049/pel2.70067","url":null,"abstract":"Inertia, or the rotor stored energy of large rotating machines, plays an essential role in power systems' flexibility, resilience and stability. According to the generation process based on renewable energy and the proximity of generation and consumption, bulky synchronous generators (SGs) are replaced with low or no inertia resources. With this new approach, the stability of power systems in the microgrids concept is threatened. In order to overcome this problem, the scheme of grid forming converters (GFMCs) has been presented and the converters’ control is done through the characteristics of energy transfer of SGs. In DC microgrids (DCMGs), the SGs equations are inefficient. Therefore, in this article, the equations of a separately excited DC machine are used to control the GFMC. These equations are placed in the control scheme of a dual active bridge converter as a battery interface with the DCMG. The proposed GFMC small signal model is analysed to evaluate the stability. The effectiveness of the proposed scheme has been confirmed in the MATLAB/Simulink environment in a DCMG under different scenarios. Therefore, it is possible to control the inertial parameters of the DCMG and increase stability using the GFMC provided.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70067","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144367522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Brushless DC Motor Driver Chip With Adaptive Synchronous Rectification 一种自适应同步整流的无刷直流电动机驱动芯片

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-21 DOI: 10.1049/pel2.70068

Yifeng Peng, Jianxiong Xi, Ao Li, Lenian He, Anming Gao, Wei Jiang

{"title":"A Brushless DC Motor Driver Chip With Adaptive Synchronous Rectification","authors":"Yifeng Peng, Jianxiong Xi, Ao Li, Lenian He, Anming Gao, Wei Jiang","doi":"10.1049/pel2.70068","DOIUrl":"https://doi.org/10.1049/pel2.70068","url":null,"abstract":"Brushless DC (BLDC) motor driver chips are widely used in household appliances, robots, automobiles, etc. The three-phase bridge driver is a common driving structure for BLDC motors. This paper proposes a BLDC motor driver chip with an internal bridge driver using lateral double-diffused metal-oxide semiconductor (LDMOS). It has an adaptive synchronous rectification (SR) controller, which controls the output current of the bridge driver to regulate the speed of the BLDC motor. The SR controller is integrated in the chip, possessing the features of optimized dead time to decrease external loss caused by dead time. This work also proposes a high-side gate driver with real-time switch detection, which ensures the SR controller receives the work state of high-side power LDMOS. The chip is fabricated in a 0.18 µm BCD SOI technology and adopts a QFN package. The experimental results show that the chip's continuous and peak output current are respectively 5 A and 10 A, the maximum efficiency of the chip reaches 93.4%, and the maximum power density of the whole driver module is 12 W/cm3.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70068","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144331867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Research on the Performance of Non-Linear Anti-Saturation Sliding Mode Active Disturbance Rejection Control in Synchronous Buck Converter Circuits 同步降压变换器非线性抗饱和滑模自抗扰控制性能研究

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-19 DOI: 10.1049/pel2.70069

Yang Liu, Jiaqing Ma, Changsheng Chen, Qinmu Wu, Zhiqin He, Tao Qin

{"title":"Research on the Performance of Non-Linear Anti-Saturation Sliding Mode Active Disturbance Rejection Control in Synchronous Buck Converter Circuits","authors":"Yang Liu, Jiaqing Ma, Changsheng Chen, Qinmu Wu, Zhiqin He, Tao Qin","doi":"10.1049/pel2.70069","DOIUrl":"https://doi.org/10.1049/pel2.70069","url":null,"abstract":"To address the issues of slow convergence rate in traditional sliding mode control, which leads to slow response and low precision when applied in synchronous buck converters, a non-linear anti-saturation sliding mode active disturbance rejection control method is proposed. First, the traditional sliding mode surface function and conventional reaching law were modified by introducing non-linear and saturation functions to construct an optimal control law. Next, the fal function in the extended state observer and non-linear error feedback control law was replaced by the optimal control law, completing the optimization of the non-linear anti-saturation sliding mode active disturbance rejection control. This approach enhances dynamic response performance and improves disturbance rejection capabilities. Finally, a corresponding model was built on the MATLAB/Simulink simulation platform. The results show that the settling time is 138 µs, and the recovery time after a sudden load is 200 µs; experimental validation confirms that the proposed method exhibits faster adjustment time and stronger disturbance rejection capabilities when the speed command is changed under sudden load conditions.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70069","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Impact of Parasitics on the Dynamic Performance of Capacitor Clamped Bidirectional DC–DC Converter 寄生对电容箝位双向DC-DC变换器动态性能的影响

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-17 DOI: 10.1049/pel2.70059

Dogga Raveendhra, Komma Lavanya, Kalamchety Srinivasa Ravi Kumar, Vijay Babu Koreboina, Janaki Pakalapati, Yatindra Gopal

{"title":"Impact of Parasitics on the Dynamic Performance of Capacitor Clamped Bidirectional DC–DC Converter","authors":"Dogga Raveendhra, Komma Lavanya, Kalamchety Srinivasa Ravi Kumar, Vijay Babu Koreboina, Janaki Pakalapati, Yatindra Gopal","doi":"10.1049/pel2.70059","DOIUrl":"https://doi.org/10.1049/pel2.70059","url":null,"abstract":"This study investigates the impact of parasitic elements on the dynamic performance of a capacitor clamped bidirectional DC–DC converter (CC-BDC) to emulate real-world conditions. Non-ideal factors, including component imperfections and parasitic losses, are incorporated to derive accurate duty cycle expressions and optimise inductor and capacitor design under ripple constraints influenced by equivalent series resistance (ESR). A detailed analysis of inrush currents for conventional and proposed CC-BDC designs reveals significant improvements in performance. The proposed CC-BDC achieves a 102.53% reduction in inrush current overshoot, with peak input currents reduced from 13.31 to 7.84 A and a settling time improvement from 0.0275 to 0.0207 s. Dynamic performance metrics, such as gain margin, phase margin, and phase crossover frequency, are used to evaluate stability under varying capacitance, inductance, and resistance conditions. The proposed converter demonstrates a 33.3% reduction in output voltage % peak overshoot (%MP) under capacitance variations and a 15.7% improvement in overshoot control for inductor current with increased inductance. These findings highlight the CC-BDC's enhanced stability, reduced overshoot, and faster settling times, making it a high-performance and cost-effective solution for renewable energy systems and electric vehicle charging infrastructure.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70059","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144309088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Parallel Connected Converters with Interleaved Phase-Shifted PWM Using a Common Carrier 使用公共载波的交错相移PWM并联变换器

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-17 DOI: 10.1049/pel2.70070

Wael Telmesani, Gregory J. Kish, John Salmon

{"title":"Parallel Connected Converters with Interleaved Phase-Shifted PWM Using a Common Carrier","authors":"Wael Telmesani, Gregory J. Kish, John Salmon","doi":"10.1049/pel2.70070","DOIUrl":"https://doi.org/10.1049/pel2.70070","url":null,"abstract":"A novel interleaving approach for parallel-connected dual three-phase converters using a single unmodified carrier is introduced. This method simplifies implementation by adjusting the phase with an offset added to the reference signal, without altering pulse width modulation (PWM) timing. It effectively controls flux and circulating currents within coupled inductor cores. Conventional schemes face challenges such as high direct current (DC)-offset in circulating currents, poor line-voltage quality, and glitches in load currents. They also rely on multiple phase-shifted carriers that require each leg to have its own carrier signal, adding synchronization complexity. While modern digital controllers can accommodate this, managing synchronization remains a challenge, especially for low-cost controllers with limited PWM carrier generation. These limitations can restrict the number of parallel legs per phase, affecting scalability. The proposed approach overcomes these issues by using a shared carrier for all modulators and adjusting the reference signal to achieve the required phase shift, ensuring high-quality line voltage and glitch-free load currents while simplifying implementation. This approach enhances flexibility in phase shift and duty cycle control while eliminating DC-offset in flux and circulating currents, reducing magnetic component size via a simple reference signal adjustment at zero-crossing. Feasibility is validated across low and high frequencies through analysis, simulations, and experiments.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70070","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144309089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optimal Hybrid Fault Tolerant Control With Voltage Balancing for IPOS DAB Converters 带有电压平衡的IPOS DAB变换器最优混合容错控制

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-09 DOI: 10.1049/pel2.70062

Chong Zhang, Jie Zhu, Xiaogang Ding, Samson Shenglong Yu, Dongsheng Yu

{"title":"Optimal Hybrid Fault Tolerant Control With Voltage Balancing for IPOS DAB Converters","authors":"Chong Zhang, Jie Zhu, Xiaogang Ding, Samson Shenglong Yu, Dongsheng Yu","doi":"10.1049/pel2.70062","DOIUrl":"https://doi.org/10.1049/pel2.70062","url":null,"abstract":"The input parallel output series connected dual active bridge (DAB) converter is a typical galvanically isolated converter for a wide output voltage range in many applications, such as charging piles for electric vehicles or solar energy storage systems. Open circuit fault (OCF) is an operation accident of power switches that occurs in DAB converters, and the faulty DAB module is degraded to a semi-DAB converter. In this work, by analyzing three operation modes and the impact of the current stress/power ratio, an optimal hybrid fault-tolerant control strategy is proposed. In this control method, DAB converters are operated under zero voltage switching/zero current switching under minimum inductor current stress without DC bias current. The proposed OCF fault-tolerant control strategy helps the DAB converter maintain stable operation under OCF occurrences. A voltage balancing method considering OCF and feedback-loop competition is also designed to balance the output voltages of faulty and non-faulty. Prototype experimental results verify the correctness and effectiveness of the proposed control strategy.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70062","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144244318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

MPC Design for SPS Modulated DAB Converters: Impact of Nonlinear Models on Reactive Power Minimization SPS调制DAB变换器的MPC设计：非线性模型对无功功率最小化的影响

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-08 DOI: 10.1049/pel2.70066

Hossein G. Sahebi, Saman A. Gorji, Mojtaba Hajihosseini, Samson Yu

{"title":"MPC Design for SPS Modulated DAB Converters: Impact of Nonlinear Models on Reactive Power Minimization","authors":"Hossein G. Sahebi, Saman A. Gorji, Mojtaba Hajihosseini, Samson Yu","doi":"10.1049/pel2.70066","DOIUrl":"https://doi.org/10.1049/pel2.70066","url":null,"abstract":"This paper presents the design and implementation of a model predictive control (MPC) framework for single phase shift (SPS) modulated dual active bridge (DAB) converters, focused on reactive power minimization and precise reference voltage tracking, under input voltage and load disturbances. To investigate the impact of model selection in MPC design, this study compares two control strategies: one based on a linearized model and the other on a nonlinear model of the DAB converter. The nonlinear model is derived using a Fourier series representation of the converter's switching dynamics, while the linear model is obtained by linearizing the nonlinear formulation around a nominal operating point. The controller employs the SPS-based modulation and adjusts the phase shift between the switches on the primary and secondary sides to stabilize the output voltage while minimizing the reactive power exchange. Experimental results demonstrate that the nonlinear MPC achieves superior dynamic performance, reducing overshoot from 5.1% to 1.8%, and settling time from 2.3 ms to 1.1 ms even under 25% load disturbance. Motivated by these results, a hybrid control strategy is proposed, in which the controller dynamically switches between the linear and nonlinear models based on the operating conditions. During normal operation, the linear model is employed to reduce computational burden while maintaining acceptable performance. When input or load disturbances occur, the controller transitions to the nonlinear model to exploit its higher accuracy. The results confirm the effectiveness of the proposed control strategy in balancing performance and computational efficiency.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70066","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144244214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Novel SiC MOSFET With a Reach-Through NPN Structure for Enhancing Reverse Performance 一种具有可达通NPN结构的新型SiC MOSFET，可提高反向性能

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-04 DOI: 10.1049/pel2.70050

Shan Lu, Dong Liu, Yi Kang, Xiaolong Lu, Xiarong Hu

引用次数: 0

An Improved Model Parameter-Free Predictive Control With Fast Gradient Updating for Three-phase Three-Level Inverters 一种改进的三相三电平逆变器无模型参数快速梯度更新预测控制

IF 1.7 4区工程技术

IET Power Electronics Pub Date : 2025-06-03 DOI: 10.1049/pel2.70064

Zhengkui Zhao, Minxiao Han

引用次数: 0