IET Power Electronics最新文献

Performance Improvement of Model-Free Predictive Current Control for PWM Rectifiers Under Nonideal Power Grids 非理想电网下PWM整流器无模型预测电流控制性能的改进

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-10 DOI: 10.1049/pel2.70129

Xing Wang, Yongchang Zhang, Dian Cao, Lei Han

{"title":"Performance Improvement of Model-Free Predictive Current Control for PWM Rectifiers Under Nonideal Power Grids","authors":"Xing Wang, Yongchang Zhang, Dian Cao, Lei Han","doi":"10.1049/pel2.70129","DOIUrl":"https://doi.org/10.1049/pel2.70129","url":null,"abstract":"This paper proposes an improved robust predictive current control strategy, combining an improved ultralocal model with a hybrid space vector modulation (HSVM) scheme. Compared to conventional ultralocal model, the proposed improved ultralocal incorporates grid voltage dynamics into the model architecture and replaces online estimations with direct sampled-value. The proposed control strategy enhances tracking accuracy during grid voltage fluctuations, especially under unbalanced and harmonically distorted conditions. Additionally, the HSVM strategy dynamically switches between three voltage vector sequences according to modulation index thresholds, which improves steady-state performance in non-ideal grid conditions. To address the prevalent issues of voltage fluctuations and harmonic distortion in practical power grids, existing solutions inject compensation into the complex power reference. However, existing methods overlook the negative-sequence current effects, which may lead to inaccurate results under unbalanced conditions. This paper incorporates the effects of negative-sequence currents and derives the power compensation term under non-ideal grid conditions, yielding an accurate analytical expression. Experimental results demonstrate that the proposed method exhibits strong robustness against inductance parameter variations and reduces current THD by 26% (ideal grid) and 11% (non-ideal grid) compared to conventional methods.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70129","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145272297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 6.5 kV/100A Low-Inductance SiC MOSFET Power Module With Integrated Current Monitoring for Parallel Chips 并联芯片集成电流监测的6.5 kV/100A低电感SiC MOSFET功率模块

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-10 DOI: 10.1049/pel2.70116

Yihao Zhang, Kangqi An, Yi Li, Bowen Tian, Zelong Qu, Peng Sun, Bin Zhao, Yumeng Cai, Zhibin Zhao

{"title":"A 6.5 kV/100A Low-Inductance SiC MOSFET Power Module With Integrated Current Monitoring for Parallel Chips","authors":"Yihao Zhang, Kangqi An, Yi Li, Bowen Tian, Zelong Qu, Peng Sun, Bin Zhao, Yumeng Cai, Zhibin Zhao","doi":"10.1049/pel2.70116","DOIUrl":"https://doi.org/10.1049/pel2.70116","url":null,"abstract":"To monitor the operating status and fault behaviour of power modules, this paper proposes a 6.5 kV/100 A silicon carbide (SiC) MOSFET power module capable of monitoring the drain currents of parallel-connected chips. The design combines three key innovations: (1) A structure and integration method for a four-channel printed circuit board (PCB) Rogowski coil used in high-voltage SiC power modules is proposed, exhibiting excellent anti-interference; (2) To reduce both the total module parasitic inductance and package-induced inductance imbalance, a symmetrical layout with pin-type terminals was proposed. (3) A field control method for the 6.5 kV power module is proposed, based on adjusting ceramic thickness and copper layer spacing at the triple junction. The module was fabricated to validate the effectiveness of these innovations. Under 15 kV DC and 50 Hz square-wave voltage conditions, no repetitive partial discharge exceeding 10 pC or leakage current above 1 µA was observed. The power loop parasitic inductance was measured as approximately 14.94 nH using an impedance analyser. Finally, the static and dynamic characteristics of the module were validated through static parameter analysis and double-pulse testing. The integrated PCB Rogowski coils monitored the drain current through each chip during double-pulse tests, showing good agreement with measurements from the commercial high-bandwidth Pearson coil.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70116","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145272415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Neural Network-Based Discrepancy Modelling of Reduced Order Models With Surface-to-Surface Radiation 基于神经网络的面对面辐射降阶模型差异建模

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-09 DOI: 10.1049/pel2.70132

Matteo Zorzetto, Riccardo Torchio, Francesco Lucchini, Fabrizio Dughiero

{"title":"Neural Network-Based Discrepancy Modelling of Reduced Order Models With Surface-to-Surface Radiation","authors":"Matteo Zorzetto, Riccardo Torchio, Francesco Lucchini, Fabrizio Dughiero","doi":"10.1049/pel2.70132","DOIUrl":"https://doi.org/10.1049/pel2.70132","url":null,"abstract":"Accurate and computationally efficient models are critical for real-time applications and system-level simulations. Finite element method (FEM)-based models offer highly accurate physical representations but their complexity renders them unsuitable for real-time computations on inexpensive hardware. Projection-based model order reduction (MOR) techniques can alleviate this issue by simplifying FEM models while retaining much of their accuracy. However, their effectiveness varies significantly for nonlinear problems, and their intrusive nature presents challenges, particularly when commercial software is employed. This paper introduces a hybrid modelling approach that combines a reduced order model (ROM), derived from a readily available linear representation of the system, with corrections provided by an artificial neural network (ANN) trained on data easily collected from the non-linear representation. The proposed method is applied to develop a lightweight thermal model of a power converter, capable of accurately reconstructing temperature distributions while accounting for non-linear surface-to-surface and surface-to-ambient radiation effects.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70132","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145272227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Deep Reinforcement Learning Agent Based Speed Controller for DTC-SVM of PMSM Drive 基于深度强化学习Agent的永磁同步电机DTC-SVM速度控制器

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-08 DOI: 10.1049/pel2.70130

Aenugu Mastanaiah, Tejavathu Ramesh, Surla Vishnu Kanchana Naresh, Praveen Kumar Bonthagorla

{"title":"Deep Reinforcement Learning Agent Based Speed Controller for DTC-SVM of PMSM Drive","authors":"Aenugu Mastanaiah, Tejavathu Ramesh, Surla Vishnu Kanchana Naresh, Praveen Kumar Bonthagorla","doi":"10.1049/pel2.70130","DOIUrl":"https://doi.org/10.1049/pel2.70130","url":null,"abstract":"High-performance applications\u0000extensively use permanent magnet synchronous motor (PMSM) drives because of their high torque density and efficiency. However, conventional PI controllers employed in the outer speed control loop of direct torque control with space vector modulation (DTC-SVM) are limited by parameter sensitivity, poor adaptability under dynamic conditions, and the need for extensive manual tuning. To overcome these challenges, a Twin Delayed Deep Deterministic Policy Gradient (TD3) agent is introduced, incorporating a customised reward function to ensure precise torque reference generation. The TD3 agent is trained in MATLAB/Simulink using random speed and load profiles and deployed on a TMS320F28379D digital signal processor. Real-Time validation is carried out using an OPAL-RT 4512 simulator under a hardware-in-the-loop (HIL) framework. The inner-loop DTC operates at 20 kHz for torque and flux control, while the TD3 agent regulates speed at 2 kHz. Experimental results on 4.5 kW and 7.5 kW PMSMs show a 50% reduction in settling time, elimination of overshoot, and stable current responses without requiring controller retuning. The proposed method demonstrates robust and adaptive performance, confirming its effectiveness for embedded motor drive applications.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70130","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145271980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Five-Phase Six-Leg Inverter Under Unbalanced Loads for EV Applications: Topology Investigation and Control Design 电动汽车不平衡负载下的五相六腿逆变器：拓扑研究与控制设计

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-07 DOI: 10.1049/pel2.70127

Wei Wei, Liangzhong Yao, Jinglei Deng, Shuai Liang, Rongxiang Yuan, Guoju Zhang, Xuefeng Ge

{"title":"A Five-Phase Six-Leg Inverter Under Unbalanced Loads for EV Applications: Topology Investigation and Control Design","authors":"Wei Wei, Liangzhong Yao, Jinglei Deng, Shuai Liang, Rongxiang Yuan, Guoju Zhang, Xuefeng Ge","doi":"10.1049/pel2.70127","DOIUrl":"https://doi.org/10.1049/pel2.70127","url":null,"abstract":"Compared to conventional three-phase permanent magnet synchronous motors (PMSMs) in electric vehicle (EV) applications, five-phase PMSMs driven by five-phase inverters exhibit enhanced fault tolerance. However, these systems may operate under unbalanced load conditions due to cabling asymmetry, operational faults, or winding ageing, leading to unbalanced phase voltages and disordered power distribution. To address this issue, this work proposes a dual-loop controlled five-phase six-leg inverter system capable of operating under both balanced and unbalanced loads. Using instantaneous voltage analysis, phase voltage equilibrium conditions for unbalanced loads are derived, and the topology-enabled zero-sequence compensation capability of the six-leg inverter is analytically validated through an averaged switching model. Then, a dual-loop control method for variable load conditions based on the generalised Park transformation dual-loop control scheme is proposed. Meanwhile, the generalised Park transformation can be applied to n-phase inverter systems, transforming the natural coordinates to the dq-axis coordinates. Finally, hardware in the loop (HIL) experiments in the real-time digital simulator (RTDS) platform are implemented. The experimental results show that, compared to a dual-loop controlled five-phase five-leg inverter, the proposed five-phase six-leg inverter can achieve balanced phase voltages and the required power distributions for each phase under unbalanced load conditions.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70127","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145271935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Evaluating Disturbance Ride-Through Capability of Fast Electric Vehicle Charging Stations Using DVshave 基于DVshave的快速电动汽车充电站干扰穿越能力评价

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-07 DOI: 10.1049/pel2.70128

Samuel Ngotho, Malabika Basu

{"title":"Evaluating Disturbance Ride-Through Capability of Fast Electric Vehicle Charging Stations Using DVshave","authors":"Samuel Ngotho, Malabika Basu","doi":"10.1049/pel2.70128","DOIUrl":"https://doi.org/10.1049/pel2.70128","url":null,"abstract":"Reliable power quality is crucial for electric vehicle charging stations (EVCS), but persistent voltage quality issues in distribution networks pose a significant challenge. This study proposes DVShave, a novel system integrating a dynamic voltage restorer (DVR) with peak-shaving functionality to significantly enhance EVCS resilience. Designed, modelled and tested in MATLAB/Simulink and validated through OPAL-RT real-time studies, DVShave features a DVR supplied by a 700 V energy storage system (ESS) and controlled by an artificial neural network (ANN) using a synchronous reference frame strategy. The system's performance was evaluated under severe symmetrical voltage dips (30%, 60% and 80%), swells, unsymmetrical faults and non-linear voltage conditions. DVShave effectively prevents charging interruptions and maintains stable charging rates during these grid disturbances, notably reducing supply voltage total harmonic distortion from 19.60% to 4.84%. The ANN-based controller demonstrated a small but notable improvement in harmonic distortion elimination compared to PI-based DVRs. Concurrently, its integrated peak-shaving feature leverages the DVR's ESS, using a rule-based control technique to lower the peak-to-average ratio from 1.9 to 1.49 daily over 4.5 h for a charging station with 50 EV chargers.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70128","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145271924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Common Ground Nine-Level Switched Capacitor Inverter Having Quadruple Boosting Capability for Solar Photovoltaic Applications 太阳能光伏应用中具有四倍升压能力的共地九电平开关电容逆变器

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-10-06 DOI: 10.1049/pel2.70125

Muneeb Afroz Bhat, Mohammad Zaid, Adil Sarwar, Farhad Ilahi Bakhsh, Mohd Tariq, Shafiq Ahmad, Md. Rasidul Islam

{"title":"A Common Ground Nine-Level Switched Capacitor Inverter Having Quadruple Boosting Capability for Solar Photovoltaic Applications","authors":"Muneeb Afroz Bhat, Mohammad Zaid, Adil Sarwar, Farhad Ilahi Bakhsh, Mohd Tariq, Shafiq Ahmad, Md. Rasidul Islam","doi":"10.1049/pel2.70125","DOIUrl":"https://doi.org/10.1049/pel2.70125","url":null,"abstract":"The nine-level switched capacitor multilevel inverter with common ground configuration presented in this work is meant specifically for grid-tied solar photovoltaic (SPV) applications. Normally the SPV panels produce low-level voltage. In order to raise its voltage, a conventionally high-boost DC-DC converter followed by an inverter is implemented. Thus, in conventional systems there are two stages, and hence more switches are needed, which increases the overall cost and reduces the efficiency of SPV systems. Keeping these drawbacks in view, this paper eliminates the conventional high-gain DC-DC converter with a novel single-source reduced-switch common-ground (CG) nine-level switched capacitor (SC) inverter, which has quadruple boosting capability. The proposed inverter has eleven switches, among which nine switches are driven at higher frequency while being clamped by low capacitor voltages, and the remaining two switches experience high stress of voltage, as these are clamped by high-voltage capacitors but are fortunately driven at fundamental frequency. This helps in reducing the switching losses. Moreover, the inverter suppresses leakage current by implementing a shared ground between its AC output and DC input. The level-shifted sine pulse width modulation method has been utilised as a control strategy for the proposed inverter. Further, the expected performance has been analysed by utilising MATLAB/Simulink simulations, and simulation results are confirmed through experimental prototype. The findings are presented by taking into account the fluctuations in load, modulation index, and output frequency. Furthermore, thermal modelling has also been done in PLECS software for analysing the efficiency and power loss of the inverter.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70125","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145271827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Simplified Control for an SSBC-Based STATCOM 基于ssbc的STATCOM的简化控制

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-09-30 DOI: 10.1049/pel2.70071

Diego Armando Gutiérrez-Torres, Juan M. Ramírez, José M. Lozano-García

{"title":"Simplified Control for an SSBC-Based STATCOM","authors":"Diego Armando Gutiérrez-Torres, Juan M. Ramírez, José M. Lozano-García","doi":"10.1049/pel2.70071","DOIUrl":"https://doi.org/10.1049/pel2.70071","url":null,"abstract":"The progress of power electronics technologies is critically dependent upon three principal elements: the availability of high-performance power semiconductor switches, the implementation of advanced control methodologies, and the thorough validation of system reliability within demanding industrial settings. While these technical underpinnings are essential, the concurrent development of readily accessible experimental platforms is equally vital to effectively translate theoretical constructs into practical realizations. This study addresses these crucial aspects by implementing a user-centric and adaptable static synchronous compensator (STATCOM) based on the single-star bridge-cell modular multilevel cascade converter (SSBC-MMCC) topology. This device is a versatile modular testbed for power electronics research and a viable solution for industrial applications. This manuscript delineates a streamlined yet comprehensive methodology for realizing STATCOM devices employing the SSBC topology, a member of the MMCC family. The presented approach demonstrates the feasibility of controlling configurations featuring three cascaded cells per cluster utilizing a single, cost-effective microcontroller unit (MCU). Concurrently, a novel modular architecture, leveraging the same affordable MCU framework, extends this control capability to systems incorporating more cells. This paper provides comprehensive design guidelines encompassing all levels of implementation, ranging from sensing and data acquisition to hierarchical control algorithms, modulation strategies, and the generation of switching signals. Experimental verification utilizing a 10 kVA maximum power prototype substantiates the efficacy of the proposed solution, which combines operational simplicity with resilient performance attributes, thereby rendering it particularly valuable for academic inquiry and industrial deployment.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70071","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145224513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Control Strategy for Voltage Disturbance Compensation and Power Factor Correction With On-Site Short-Circuit Level Calculation Using Grid-Following Inverter 电网跟随逆变器现场短路电平计算电压扰动补偿和功率因数校正控制策略

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-09-29 DOI: 10.1049/pel2.70123

Matheus B. Soares, Érico C. Guimarães, Danillo B. Rodrigues, Lucas P. Pires, Luiz C. G. Freitas

{"title":"Control Strategy for Voltage Disturbance Compensation and Power Factor Correction With On-Site Short-Circuit Level Calculation Using Grid-Following Inverter","authors":"Matheus B. Soares, Érico C. Guimarães, Danillo B. Rodrigues, Lucas P. Pires, Luiz C. G. Freitas","doi":"10.1049/pel2.70123","DOIUrl":"https://doi.org/10.1049/pel2.70123","url":null,"abstract":"The occurrence of voltage variations caused by the input/output of large loads and/or transmission lines, as well as faults and high levels of photovoltaic-based distributed energy resource (DER) penetration, impairs power quality indicators at the power grid and causes financial losses for industrial consumers. In industrial electrical systems, knowing the short-circuit level (SCL) at the point of common coupling (PCC), the relationship between the SCL and the desired reactive power can be used to define the capability of an existing inverter-based DER for voltage compensation under conditions of SAG or SWELL. In this context, this article presents a proposal of ‘control strategy for voltage disturbance compensation and power factor correction with on-site short circuit level calculation’ (CS-VDCPFC-SCLC) using grid-following inverter. The main contribution is the identification of the situations in which an ordinary grid-following (GFL) photovoltaic (PV) Inverter can or cannot be used for voltage compensation at the PCC, avoiding the use of the PV system to provide reactive power in cases where voltage compensation will not be possible. If the voltage at the PCC cannot be compensated, the CS-VDCPFC-SCLC can inject or absorb the exact amount of reactive power demanded by the local load to adjust the power factor, hence, avoiding the use of capacitor banks, synchronous compensators, thyristor reactors and/or static compensators (STATCOM). In order to validate the proposed control technique with an advanced method for the design of power electronics components, a controller hardware-in-the-loop (C-HIL) setup is employed. Results are provided and demonstrate the effectiveness and feasibility of the proposed solution. A 3.0 kW laboratory prototype was also built and analysed.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70123","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145224444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Wide-Band Harmonic Resonance Damping Strategy for Grid-Connected Digitally Controlled LCL-Type Inverter 并网数字控制lcl型逆变器宽带谐振阻尼策略

IF 1.9 4区工程技术

IET Power Electronics Pub Date : 2025-09-27 DOI: 10.1049/pel2.70126

Jinhong Liu, Xiaobing Zhang, Baohua Wang

{"title":"Wide-Band Harmonic Resonance Damping Strategy for Grid-Connected Digitally Controlled LCL-Type Inverter","authors":"Jinhong Liu, Xiaobing Zhang, Baohua Wang","doi":"10.1049/pel2.70126","DOIUrl":"https://doi.org/10.1049/pel2.70126","url":null,"abstract":"Digitally controlled LCL-type inverter is widely applied in grid-connected renewable energy generation system, and its harmonics resonance damping performance is critical to the stable operation and output power quality of system. Considering the low power loss and simple structure, an equivalent impedance model of digitally controlled LCL-type inverter with a widely deployed capacitor-current active damping feedback structure is built first. Then, according to the obtained model, the effects of digital time delay of control system and equivalent grid impedance on active damping performance of inverter, including effective damping region and harmonics resonance characteristics mainly, are investigated in detail. In order to improve the damping performance of digitally controlled LCL-type inverter under the action of digital time delay and grid impedance, a wide-band harmonic resonance damping strategy is proposed based on capacitor-voltage active damping structure finally. A prototype grid-connected digitally controlled LCL-type inverter system is built to verify the correctness of theoretical analysis results and effectiveness of proposed active damping strategy.","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2025-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70126","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145146617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0