IET Power Electronics最新文献

{"title":"Optimising Weighting Factor Design for Model Predictive Torque Control in IPMSM Drives: A Grey Relational Analysis Approach","authors":"Mannan Hassan,&nbsp;Guoqiang Zhang,&nbsp;Muhammad Shahid Mastoi,&nbsp;Zhengqing Li,&nbsp;Xiaopeng Yu,&nbsp;Kunpeng Xu,&nbsp;Rao Atif,&nbsp;Malik Haris","doi":"10.1049/pel2.70053","DOIUrl":"https://doi.org/10.1049/pel2.70053","url":null,"abstract":"<p>AC electric drives have widely incorporated model predictive control (MPC) over the past decade. Even with a variety of proposed solutions, there are still challenges related to designing influential weighting factors (WF), reducing parameter dependence, mitigating current/torque harmonics, managing variable switching frequencies and minimising computational complexity. The performance of controllers can be significantly reduced by incorrectly selecting WFs. The cost function of conventional finite-control set model predictive torque control (MPTC) includes multiple control objectives with different units of measurement. WFs are therefore introduced so that these objectives can be prioritized. An extensive comparison of WF design techniques for MPTC strategies in interior permanent magnet synchronous motors (IPMSM) drives is presented in this paper. The first step in the MPTC process is to present a description of conventional MPTC techniques with manual WF tuning, VIKOR and the entropy method for WF optimisation. To address the issue of WF design, the grey relational analysis (GRA) approach is proposed. This method separates the flux and torque objective functions using a single cost function and the grey relational grade is employed for each sampling to determine the appropriate action. Experimental validation of the proposed approach is performed by means of real-time hardware-in-the-loop (HIL) simulations on a prototype IPMSM drive with a TMS320F28335 floating-point digital signal processor. Finally, MPTC is compared with conventional MPTC, VIKOR and entropy-based WF optimisation methods to compare its performance.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70053","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143949767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Soft-Switched Non-Isolated Double-Input High Step-Up Converter With Low Input Current Ripple","authors":"Hayder Ameer Hasan Al-Ameedee,&nbsp;Majid Delshad,&nbsp;Nadheer A. Shalash,&nbsp;Bahador Fani","doi":"10.1049/pel2.70051","DOIUrl":"https://doi.org/10.1049/pel2.70051","url":null,"abstract":"<p>This paper proposed a novel high step-up converter with a dual-input, single-output DC–DC converter configuration. The design achieves a high conversion ratio while reducing voltage stress on switching devices and enhancing overall efficiency. The design involves an auxiliary circuit to provide zero-voltage switching conditions for the main switches, and utilizes voltage multiplier circuit (VMC) methods to improve conversion ratio. The VMC effectively clamps the voltage of the switches at low levels, enabling the use of switches with low on-resistance. This approach not only reduces the overall cost of the converter but also improves efficiency. The proposed two input configuration can effectively deliver power to the load from two separate voltage sources, ensuring continuous input current with low ripple. This feature makes the converter an ideal choice for wind, hybrid, and photovoltaic applications. The article provides a comprehensive analysis of operational modes and steady-state performance, along with a comparison section of the proposed structure's performance. Furthermore, a prototype of the suggested converter is implemented for an output power of 160 W at a switching frequency of 100 kHz to validate the performance, and the theoretical analysis, which results in an efficiency of 96% under full load conditions.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70051","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143939037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Non-Uniform Voltage Balancing Methods for Series-Connected SiC MOSFETs in High-Frequency Fast Switching","authors":"Yixin Shi,&nbsp;Dingmeng Guo,&nbsp;Xiaoning Zhang,&nbsp;Yaogong Wang,&nbsp;Xiaoqin Ma,&nbsp;Rui Fan","doi":"10.1049/pel2.70046","DOIUrl":"https://doi.org/10.1049/pel2.70046","url":null,"abstract":"<p>A half-bridge circuit formed by series-connected silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) generates high-frequency, high-voltage pulses with a fast rising time, widely used in electro-optical modulators. Inconsistencies in the drive circuit timing, variations in device parameters, and parasitic parameters in drive circuit lead to non-uniform switching behaviour among the SiC MOSFETs, causing significant voltage stress disparities and potential overvoltage breakdown under severe conditions. The limitations of traditional passive balancing methods are addressed, where reduced switching speeds and increased losses are caused by identical balancing circuits. A novel non-uniform resistor-capacitor-diode (NRCD) voltage-balancing method is proposed for the load side. Considering the influence of parasitic parameters of the drive circuit, the optimal matching of circuit voltage balancing is realised by calculating the voltage balancing capacitance of each SiC MOSFET. Experimental results demonstrate that, compared to the traditional uniform method, the NRCD balancing method reduces the maximum deviation in drain-to-source voltages from 80.4 V to 2.0 V and the pulse rise time from 13.0 ns to 11.4 ns at an output of 3200 V, representing a 10.8% increase in speed. At 50 kHz, the largest switching loss for devices can be reduced from 5.857 W to 3.198 W, and the efficiency of switching losses can be improved by 45.4%.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70046","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143925826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Isolated SEPIC-Based AC-AC Converter for Voltage Sag/Swell Mitigation","authors":"Iman Abdoli,&nbsp;Alireza Lahooti Eshkevari,&nbsp;Hafiz Furqan Ahmed,&nbsp;Mohammad Arasteh","doi":"10.1049/pel2.70044","DOIUrl":"https://doi.org/10.1049/pel2.70044","url":null,"abstract":"<p>This paper proposes a high-frequency isolated buck-boost AC-AC converter based on the single-ended-primary-inductance-converter (SEPIC) topology and its extension circuit with bipolar output. The proposed converters can achieve a wide range of voltage step-down and step-up operations with both same- and reversed-phase outputs. All configurations ensure low harmonic input current and are fully compatible with non-unity power factor loads. Comparisons with counterpart converters demonstrate that this topology outperforms in terms of inductor volume metrics, total switch voltage, and power switch utilisation factor. Unlike most counterparts, only one of the four power switches in the proposed topology operates at a high frequency in each voltage half-cycle, minimising switching losses and enhancing efficiency. Additionally, snubber circuits are eliminated, ensuring spike-free operation for power switches. The proposed bipolar output converter can be easily connected in series with the load as a dynamic voltage restorer without a line-frequency transformer. The topology benefits from continuous input current and regular operation with inductive loads. In this article, theoretical analysis is presented and supported by laboratory hardware verification. A 250W prototype has been built and tested as a dynamic voltage restorer (DVR). Results confirm the operation of the converter and demonstrate its capability to mitigate deep voltage sags/swells (≥ 50%) due to high-gain operation.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70044","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143919637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fast Correction Method for Thermal Network Models of Multi-Chip Parallel Power Modules","authors":"Qian Luo,&nbsp;Yi Li,&nbsp;Bin Zhao,&nbsp;Peng Sun,&nbsp;Zhibin Zhao,&nbsp;Yumeng Cai,&nbsp;Xuebao Li","doi":"10.1049/pel2.70035","DOIUrl":"https://doi.org/10.1049/pel2.70035","url":null,"abstract":"<p>To precisely obtain the chip junction temperature in multi-chip, parallel power modules, a thermal network model that incorporates transverse thermal diffusion and thermal coupling is to be established. The conventional thermal network model, built using the thermal diffusion angle, offers the advantages of simplicity and high computational speed. However, the conventional thermal network model exhibits a large computational error when the effective convective heat transfer area cannot be equivalent to a complete circle, necessitating enhancements to the thermal network model. First, materials of each layer in the thermal network model are theoretically modeled in this paper, followed by an analysis of the root causes of errors in the conventional model. Second, a fast correction method is introduced for the equivalent thermal network model of the power module. The method rectifies the thermal network model of a chip whose effective convective heat transfer area exceeds the edge of the heat sink substrate by substituting it with the corresponding value from the thermal network model of an adjacent chip. The calculation accuracy of the thermal network model is significantly improved postcorrection. Finally, a buck experimental platform has been constructed, and the effectiveness of the proposed correction method has been validated experimentally.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70035","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143919636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Nine-Level Common-Ground Type Multi-Level Inverter for Standalone and Grid-Connected Applications","authors":"Mohammad Zaid,&nbsp;Adil Sarwar,&nbsp;Atif Iqbal,&nbsp;Saniya Khan,&nbsp;Mohammad Ali,&nbsp;Marwan Ahmed Abdullah Alasali","doi":"10.1049/pel2.70045","DOIUrl":"https://doi.org/10.1049/pel2.70045","url":null,"abstract":"<p>This work proposes a new common ground (CG) 9-level (9L) inverter with only nine switches and three capacitors. The proposed converter can be deployed for high-frequency AC applications with advantages like improved harmonic spectrum and reduced capacitor charging current. The proposed multi-level inverter has three capacitors and has a boosting of 4. The proposed converter provides a CG between the load and source, making the converter leakage current almost zero. The inherent advantage of zero leakage current makes the proposed converter suitable for renewable energy applications. The other advantage of the proposed converter is that most of the switches have low voltage stress, which decreases the cost of the converter. The cost analysis, design of components, modulation strategy, and comparison of the proposed topology with other counterparts are done in detail. The loss analysis and efficiency of the converter in laboratory conditions are also presented. The converter performance in a steady state and with changes in loading conditions is validated by building a prototype, and experimental results are shown. The grid-connected results are being shown in real-time with the help of the Typhoon Hardware in the Loop setup.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70045","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143919859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of a 2.4 kV Half-Bridge Power Module With Chip-Level Series-Connected SiC MOSFETs","authors":"Tobias Nieckula Ubostad,&nbsp;Yoganandam Vivekanandham Pushpalatha,&nbsp;Frank Mauseth,&nbsp;Dimosthenis Peftitsis","doi":"10.1049/pel2.70048","DOIUrl":"https://doi.org/10.1049/pel2.70048","url":null,"abstract":"<p>Series connection of silicon carbide (SiC) metal-oxide–semiconductor field effect transistors (MOSFETs) is a viable solution to reach blocking voltages that are not yet commercially available or limited for single-chip devices. Typically, serialization is realized with discrete packaged devices or power modules. However, serializing several of these packaged Silicon Carbide (SiC) MOSFET devices increases the stray inductance in the power loop compared to a single high-voltage (HV) device, due to the electrical connections of the devices. This paper proposes a design of a half-bridge power module with chip-level series-connection SiC MOSFET, which are accommodated on a single direct bond copper (DBC) layout. In order to demonstrate the feasibility of this approach, a DBC layout accommodating two series-connected <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>1.2</mn>\u0000 <mspace></mspace>\u0000 <mi>kV</mi>\u0000 </mrow>\u0000 <annotation>$1.2 ,mathrm{kV}$</annotation>\u0000 </semantics></math> SiC MOSFET chips to form a <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>2.4</mn>\u0000 <mspace></mspace>\u0000 <mi>kV</mi>\u0000 </mrow>\u0000 <annotation>$2.4 ,mathrm{kV}$</annotation>\u0000 </semantics></math> switch has been designed. Integrated inside the module are decoupling capacitors to mitigate high-frequency current and voltage oscillations. The power module's inductive layout is characterized and presented in terms of finite element method simulations and measurements. The HV isolation capability of the proposed power module in terms of the partial discharge-limit, was also measured. Finally, the switching performance of the series-connected chips is presented experimentally both in a double pulse test and under continuous operation in a synchronous buck converter, both at a blocking voltage of <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>1.5</mn>\u0000 <mspace></mspace>\u0000 <mi>kV</mi>\u0000 </mrow>\u0000 <annotation>$1.5 ,mathrm{kV}$</annotation>\u0000 </semantics></math>.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70048","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143914565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hybrid IGBT/IGCT-Based DC-Hub for Interconnection of VSC/LCC Future DC Networks","authors":"Mohamed Mansour,&nbsp;Yousef N. Abdelaziz,&nbsp;Ahmed A. Aboushady,&nbsp;Fahad Alsokhiry,&nbsp;Khaled H. Ahmed,&nbsp;Ayman S. Abdel-khalik,&nbsp;Ahmed Abdulwhab","doi":"10.1049/pel2.70049","DOIUrl":"https://doi.org/10.1049/pel2.70049","url":null,"abstract":"<p>The interest in interconnecting multiple DC grids- medium-voltage direct current/high-voltage direct current (MVDC/HVDC)- across the globe has grown significantly in recent years. This interest is primarily driven by the benefits of increased reliability and cost efficiency in power transmission systems, particularly with the growing utilisation of renewable energy resources. However, some HVDC networks are based on line commutated converters (LCC), while other MVDC/HVDC rely on voltage source converters (VSC). In this context, this paper introduces a new DC-Hub that facilitates the interconnection between multiple VSC- and LCC-based DC networks using hybrid IGBT/IGCT device technology. The proposed converter enables power reversal without interruption, promotes multi-vendor interoperability, and provides galvanic isolation. An important aspect of the design is its modularity, allowing each port to have an independent design for interfacing with the HVDC/MVDC grid without affecting the other ports. This modularity enables further port extension or elimination without requiring modifications to the remaining ports. The paper also discusses AC filter design and power flow control techniques to achieve zero reactive power circulation at rated port power, thereby reducing power losses. Finally, to validate the theoretical claims of the proposed system, both a simulation model and an experimental hardware test rig have been established.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70049","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143909449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Soft-Switching Non-Isolated High Step-Up DC-DC Converter With Continuous Input Current for PV Application","authors":"Sadegh Heidari Beni,&nbsp;Sayyed Mohammad Mehdi Mirtalaei,&nbsp;Mahdi Shaneh,&nbsp;Tohid Nouri,&nbsp;Amir Baktash","doi":"10.1049/pel2.70039","DOIUrl":"https://doi.org/10.1049/pel2.70039","url":null,"abstract":"<p>In this paper, a high step-up DC-DC boost converter is introduced, which utilises the coupled inductor and switched capacitor techniques to increase voltage gain, adjustable by changing the turn ratio of the coupled inductors. Additionally, the leakage inductance of the coupled inductors reduces the reverse recovery problem of the output diode. The boost inductor in the input stage ensures continuous input current, thereby extending the lifetime of the input battery or improving the performance of renewable power sources. The proposed converter employs an active clamp technique to achieve soft switching for both the main and auxiliary switches over a wide range of output power, ensuring zero-voltage switching during both on and off states. Key features of the proposed converter include continuous input current, soft switching, high voltage gain, and a simple structure. A 200 W laboratory prototype is implemented, and the results are provided.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70039","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143901010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Front Cover: Integrated DC arc model and DC arc detection approach based on K-line diagram and spectrum integral difference","authors":"Qing Xiong,&nbsp;Junyi Zhang,&nbsp;Jianghan Li,&nbsp;Yijie Tang,&nbsp;Yi Zhuang,&nbsp;Yanjie Cui,&nbsp;Rui Li,&nbsp;Shengchang Ji","doi":"10.1049/pel2.70042","DOIUrl":"https://doi.org/10.1049/pel2.70042","url":null,"abstract":"<p>The cover image is based on the article <i>Integrated DC arc model and DC arc detection approach based on K-line diagram and spectrum integral difference</i> by Qing Xiong et al., https://doi.org/10.1049/pel2.12849.\u0000\u0000 <figure>\u0000 <div><picture>\u0000 <source></source></picture><p></p>\u0000 </div>\u0000 </figure></p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7,"publicationDate":"2025-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70042","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143877796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}