{"title":"LOTUS: A Scalable Framework to Lock Multimodule Designs With One-Time Self-Destructing Key","authors":"Mona Hashemi;Siamak Mohammadi;Trevor E. Carlson","doi":"10.1109/LES.2024.3360615","DOIUrl":"10.1109/LES.2024.3360615","url":null,"abstract":"The involvement of external parties in integrated circuit (IC) supply chain has raised a number of security issues, such as the use of device cloning, overproduction, and unauthorized integration/activation. One potential solution to this problem, logic locking, restricts access to the hardware unless the correct key is provided. Existing locking methods target limited attacks and show scalability issues. In this letter we presents LOTUS, a scalable and multilayered locking framework that provides a solution for multimodule designs by employing pseudo-dynamic keys. An important aspect of this work is that it triggers an irreversible failure once an incorrect key is applied. This evaluation demonstrates this letter’s resiliency against various deobfuscation attacks like KC2, AppSAT, OMLA, SAIL, and SCOPE with low overhead. Due to its scalability, low overhead, and destructive-when-wrong structure, LOTUS is a practical solution for large, complex, and safety-critical designs.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"413-416"},"PeriodicalIF":1.7,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ProMiSE: A Programmable Hardware Monitor for Secure Execution in Zero Trust Networks","authors":"Nikhilesh Singh;Shagnik Pal;Rainer Leupers;Farhad Merchant;Chester Rebeiro","doi":"10.1109/LES.2024.3354831","DOIUrl":"10.1109/LES.2024.3354831","url":null,"abstract":"With the inevitable adoption of zero trust architectures (ZTAs) for enterprise networks, there is a need to continuously gauge the security health of connected devices. This requires runtime monitoring of the devices in the network. The challenge, especially in resource-constrained environments, is to ensure trusted monitoring at a fine granularity. In this letter, we propose ProMiSE, a framework that overcomes this challenge and provides an online non-tamperable metric called trust score to quantify the security health of devices in a ZTA network. We use real-time hardware tracking of microarchitectural signals in the CPU to compute the trust score in a security co-processor that is isolated from the device’s computing stack. The trust score for each device is sent to the ZTA host for corresponding responses. We evaluate ProMiSE on an open-source RISC-V processor with different threat vectors, including ransomware, return-oriented programming (RoP) attacks, and cache-based microarchitectural attacks. We also deploy the framework on an AMD Artix 7AC701 FPGA and present the area overheads.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"433-436"},"PeriodicalIF":1.7,"publicationDate":"2024-01-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Lucas A. Rabioglio;M. C. Cebedio;L. Arnone;L. De Micco;J. Castiñeira Moreira
{"title":"Middleton Class A Noise Median Estimator: FPGA and Software Implementation","authors":"Lucas A. Rabioglio;M. C. Cebedio;L. Arnone;L. De Micco;J. Castiñeira Moreira","doi":"10.1109/LES.2024.3354179","DOIUrl":"10.1109/LES.2024.3354179","url":null,"abstract":"This letter focuses on the field-programmable gate array (FPGA) implementation of a Class A Middleton noise estimator, aiming to enhance its efficiency and performance. The inherent algorithm of the estimator undergoes strategic enhancements, leveraging median approximations. This endeavor leads to the development of a more streamlined and expeditious architecture. The research not only introduces the refined architecture but also conducts a comparative analysis of its attributes. The outcomes of this investigation show the benefits of algorithmic optimization, as the execution times achieved in hardware significantly surpass those attainable through software-based implementation. This underscores the practicality of the algorithmic refinement and also the notable advantages of the FPGA-based execution in terms of computational speed.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"275-278"},"PeriodicalIF":1.7,"publicationDate":"2024-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SoC-Based Implementation of 1-D Convolutional Neural Network for 3-Channel ECG Arrhythmia Classification via HLS4ML","authors":"Feroz Ahmad;Saima Zafar","doi":"10.1109/LES.2024.3354081","DOIUrl":"10.1109/LES.2024.3354081","url":null,"abstract":"Real-time monitoring of 1-D biopotentials, such as electrocardiograms (ECG), necessitates effective feature extraction and classification, a strength of deep learning (DL) algorithms. Designing 1-D convolutional neural network (1-D CNN) accelerators for biopotential classification via open-source codesign workflows, particularly high-level synthesis for machine learning (HLS4ML), offers advantages over GPU-based or cloud-based solutions, including high performance, low latency, low power consumption, swift time-to-market, and cost-effectiveness. We present an implementation of a quantized-pruned (QP) 1-D CNN model on the PYNQ Z2 SoC using HLS4ML by seamlessly deploying its soft IP core generated via Vivado Accelerator backend, showcasing the efficacy of quantization-aware training (QAT) in reducing power consumption to 1.655 W from 1.823 W. Our approach demonstrates improved area consumption, resource utilization, and inferences per second compared to the baseline (B) 1-D CNN model, with a controlled 4% or less reduction in weighted Accuracy, Precision, Recall, and F1-score, revealing the nuanced tradeoffs between performance metrics and system efficiency for real-time 3-channel ECG Arrhythmia classification.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"429-432"},"PeriodicalIF":1.7,"publicationDate":"2024-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An Area and Energy Efficient Serial-Multiplier","authors":"Mohd. Tasleem Khan;Jinti Hazarika","doi":"10.1109/LES.2024.3352540","DOIUrl":"10.1109/LES.2024.3352540","url":null,"abstract":"In this work, we present an area and energy-efficient serial multiplier. Specifically, we exploit symmetries in odd and even partial products (PPs) in its radix-\u0000<inline-formula> <tex-math>$gamma $ </tex-math></inline-formula>\u0000 implementation. Subsequently, we express them as \u0000<inline-formula> <tex-math>$mp (2^{k}pm 1)$ </tex-math></inline-formula>\u0000 with \u0000<inline-formula> <tex-math>$1 leq k leq text {{log}}_{2}gamma -1$ </tex-math></inline-formula>\u0000, which enable to reduce the hardware resources. For \u0000<inline-formula> <tex-math>$gamma geq 16$ </tex-math></inline-formula>\u0000, the above representation becomes invalid, requiring additional power-of-two terms and raising hardware costs. To address this, we utilize recursive symmetries in PPs, which enable time-sharing and reduce the logic resources for efficient realization. ASIC synthesis results show the proposed design has substantial savings in area and energy than the state-of-the-art design.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"425-428"},"PeriodicalIF":1.7,"publicationDate":"2024-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Adaptive Kernel Merge and Fusion for Multi-Tenant Inference in Embedded GPUs","authors":"Jaebeom Jeon;Gunjae Koo;Myung Kuk Yoon;Yunho Oh","doi":"10.1109/LES.2024.3351753","DOIUrl":"10.1109/LES.2024.3351753","url":null,"abstract":"This letter proposes a new scheme that improves throughput and reduces queuing delay while running multiple inferences in embedded graphics processing unit (GPU)-based systems. We observe that an embedded system runs inference with a fixed number of deep learning models and that inference requests often use the same model. Unlike prior work that proposed kernel fusion or scheduling techniques, this letter proposes a new software technique that merges and fuses kernels by monitoring the requests in a queue. The proposed technique first monitors a fixed number of requests and groups the requests running the same model. Then, it creates the kernels that iteratively process the grouped requests. We call such a technique kernel merging. After that, the proposed technique performs kernel fusion with merged kernels. Eventually, our idea minimizes the number of concurrent kernels, thus mitigating stalls caused by frequent context switching in a GPU. In our evaluation, the proposed kernel merge and fusion achieve \u0000<inline-formula> <tex-math>$2.7times $ </tex-math></inline-formula>\u0000 better throughput, 47% shorter average kernel execution time, and 63% shorter tail latency than prior work.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"421-424"},"PeriodicalIF":1.7,"publicationDate":"2024-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Controlling a House’s Air-Conditioning Using Nonlinear Model Predictive Control","authors":"Bashra Kadhim Oleiwi;Ahmad H. Sabry","doi":"10.1109/LES.2023.3348705","DOIUrl":"10.1109/LES.2023.3348705","url":null,"abstract":"As per literature, there is a potential for energy savings of (5% to 20%) using building embedded control systems. This letter aims to control a house air-conditioning system using model predictive control (MPC) with a neural state space prediction (NSSP) Model to maintain interior temperature set-point and reduce energy consumption. Here, we present a high-fidelity model that is validated by an experimental prototype of a house air-conditioning system that is controlled using a nonlinear MPC. The house air-conditioning system models the air-conditioner and the thermal dynamics of the house. The outdoor temperature is modeled by simulated signals and real measurements. The controller problem is to maintain a house temperature within 20 °C to 22 °C and to minimize energy costs. Compared with the generic nonlinear MPC controller, multistage nonlinear MPC provides a more flexible and efficient way to implement MPC with staged costs and constraints.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 2","pages":"239-242"},"PeriodicalIF":1.6,"publicationDate":"2024-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139954502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks","authors":"Arya Motamedhashemi;Bardia Safaei;Amir Mahdi Hosseini Monazzah;Alireza Ejlali","doi":"10.1109/LES.2023.3348499","DOIUrl":"10.1109/LES.2023.3348499","url":null,"abstract":"Fog devices in fog computing frameworks are responsible for fetching and executing the tasks submitted by the deployed resource-constraint embedded edge devices. Based on the availability of resources, tasks are offloaded to the virtual machines hosted by the fog devices. These tasks may then get scheduled to guarantee a number of efficiency-related metrics. While throughput has a decisive impact on the timely execution of tasks, the appropriate utilization of this metric has not been considered in the existing mechanisms. In this letter, we first discuss the proper use of this objective in the fitness function of meta-heuristic algorithms. Then, we explain that adopting throughput by the fitness functions in the form of two conventionally used weighted-sum, and fractional techniques may ignore solutions with a better guarantee ratio. Consequently, we propose a novel approach called DATA to be replaced with these two old approaches. DATA is a throughput, and deadline-aware task scheduling mechanism for time-sensitive fog frameworks, which its fitness function utilizes genetic optimization by encoding the solutions into chromosomes. It uses single-gene mutation and two-point crossover. In this approach, two populations are considered to search the problem space. The main population is evaluated based on the guarantee ratio, while the helper population is evaluated based on the throughput. Furthermore, the helper population uses weighted-sum. The initial population is generated randomly by the uniform distribution, to provide a load-balancing. Based on our extensive evaluations, the selected solution by DATA provides the highest guarantee ratio, while having the lowest possible makespan.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"409-412"},"PeriodicalIF":1.7,"publicationDate":"2023-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142199417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HTree: Hardware Trojan Attack on Cache Resizing Policies","authors":"Atul Kumar;Shirshendu Das;Basant Subba","doi":"10.1109/LES.2023.3347607","DOIUrl":"https://doi.org/10.1109/LES.2023.3347607","url":null,"abstract":"Modern chipmultiprocessors (CMPs) use third-party intellectual properties (IPs) to reduce design costs and meet deadlines. The cores in the CMP has their own private cache memories and all the cores share a common large sized last level cache (LLC). All the components of CMP, including cores and cache memories, are connected through a network-on-chip (NoC). Most of the NoC components have third-party IPs. Some of these IPs may be malicious and act as Hardware Trojan (HT). In this letter, we propose an HT-base attack that targets the LLC resizing techniques. The LLC resizing techniques are used to reduce the energy consumption of the LLC by shutting down unused parts of the LLC. The proposed attack can misuse the properties of these resizing techniques to reduce their energy saving up to 58%. The proposed attack can also reduce the system performance up to 18%.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"263-266"},"PeriodicalIF":1.7,"publicationDate":"2023-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142091015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Coelho;L. Santiago;D. Araújo;A. Navarro;N. B. Carvalho
{"title":"A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations","authors":"M. Coelho;L. Santiago;D. Araújo;A. Navarro;N. B. Carvalho","doi":"10.1109/LES.2023.3343641","DOIUrl":"https://doi.org/10.1109/LES.2023.3343641","url":null,"abstract":"Emergency alert systems (EASs) have been deployed in some countries in order to broadcast emergency alerts and warning messages to the public. In this letter, we describe an innovative electronic embedded solution, named Firetec switch, intended to be placed in the FM radio stations. This switch will be supported by a server placed at the authorized officials, with the capability to generate the audio alerting messages. One interesting challenge is to deliver the messages only to the local public, in the catastrophe neighborhood, by using FM radio stations. This letter focuses on the description of the Firetec switch hardware and software.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"247-250"},"PeriodicalIF":1.7,"publicationDate":"2023-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142091007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}