IEEE Journal on Exploratory Solid-State Computational Devices and Circuits最新文献_第10页

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits—Vol. 8, No. 1 探索性固态计算器件和电路IEEE杂志-卷。8、No. 1

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3204198

Azad Naeemi

引用次数: 0

Guest Editorial Special Topic on Oxide Electronics for Beyond CMOS Logic and Memory 超越CMOS逻辑和存储器的氧化物电子客座编辑专题

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3207087

Dmitri E. Nikonov

{"title":"Guest Editorial Special Topic on Oxide Electronics for Beyond CMOS Logic and Memory","authors":"Dmitri E. Nikonov","doi":"10.1109/JXCDC.2022.3207087","DOIUrl":"10.1109/JXCDC.2022.3207087","url":null,"abstract":"As is well known, the traditional electronics as well as exploratory logic and memory devices have relied on mono- or bi-elemental semiconductors for many decades. Oxides served an indispensable, but still secondary role of capacitor dielectrics, insulation, tunneling barriers, and so on. The functionality of oxides putting them at the center stage of computing (such as conduction, ferroelectricity, magnetic/spin, piezoelectric, ion drift, metal–insulator transitions, etc.) was researched from the material science side throughout this time. However, the work on realistic computing devices based on these properties really took off in the past decade. Oxides allow for a wider variety of phenomena which can be utilized (multiferroic materials, spin waves, to name a few). They require more sophisticated theoretical treatment (such as indirect exchange, Dzyaloshinskii–Moriya interaction, and topological materials) than traditional semi-conductors. In some cases, the single crystal state and close to atomically flat interfaces require novel fabrication methods. All these provide exciting opportunities to advance computing.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"8 1","pages":"ii-iii"},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09906568.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43591151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information 探索性固态计算器件和电路IEEE杂志出版信息

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143391

引用次数: 0

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information 探索性固态计算器件和电路IEEE杂志出版信息

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143399

引用次数: 0

Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM) 磁电三元内容可寻址存储器(TCAM)的建模与设计

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3181925

Siri Narla, Piyush Kumar, Ann Franchesca Laguna, D. Reis, X. S. Hu, M. Niemier, A. Naeemi

{"title":"Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM)","authors":"Siri Narla, Piyush Kumar, Ann Franchesca Laguna, D. Reis, X. S. Hu, M. Niemier, A. Naeemi","doi":"10.1109/JXCDC.2022.3181925","DOIUrl":"https://doi.org/10.1109/JXCDC.2022.3181925","url":null,"abstract":"This article proposes a novel magnetoelectric (ME) effect-based ternary content addressable memory (TCAM). The potential array-level write and search performances of the proposed ME-TCAM are studied using experimentally calibrated compact physical models and SPICE simulations. The voltage-controlled operation of the ME devices eliminates the large joule heating present in the current-controlled magnetic devices and their low-voltage write operation makes them more energy-efficient compared to static random access memory-based TCAMs (SRAM-TCAMs). The proposed compact TCAM outperforms its SRAM counterpart with <inline-formula> <tex-math notation=\"LaTeX\">$1.35times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation=\"LaTeX\">$14.4times $ </tex-math></inline-formula> improvements in search and write energy, respectively, and its nonvolatility eliminates the standby leakage. We project an error rate below <inline-formula> <tex-math notation=\"LaTeX\">$10^{-4}$ </tex-math></inline-formula> while considering various sources of variation in magnetic and CMOS devices. At the application level, using memory-augmented neural networks (MANNs), we project a <inline-formula> <tex-math notation=\"LaTeX\">$2times $ </tex-math></inline-formula> energy-delay–area-product (EDAP) improvement over an SRAM-TCAM.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"8 1","pages":"44-52"},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62234230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Information for Authors 面向作者的探索性固态计算器件和电路杂志

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143393

引用次数: 0

IGZO CIM: Enabling In-Memory Computations Using Multilevel Capacitorless Indium–Gallium–Zinc–Oxide-Based Embedded DRAM Technology IGZO CIM:使用基于多电平无电容铟镓锌氧化物的嵌入式DRAM技术实现内存计算

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3188366

Siddhartha Raman Sundara Raman;Shanshan Xie;Jaydeep P. Kulkarni

{"title":"IGZO CIM: Enabling In-Memory Computations Using Multilevel Capacitorless Indium–Gallium–Zinc–Oxide-Based Embedded DRAM Technology","authors":"Siddhartha Raman Sundara Raman;Shanshan Xie;Jaydeep P. Kulkarni","doi":"10.1109/JXCDC.2022.3188366","DOIUrl":"10.1109/JXCDC.2022.3188366","url":null,"abstract":"Compute-in-memory (CIM) is a promising approach for efficiently performing data-centric computing (such as neural network computations). Among the multiple semiconductor memory technologies, embedded DRAM (eDRAM), which integrates the DRAM bit cell with high-performance logic transistors, can enable efficient CIM designs. However, the silicon-based eDRAM technology suffers from poor retention time-incurring significant refresh power overhead. However, eDRAM using back-end-of-line (BEOL) integrated \u0000<inline-formula> <tex-math>$C$ </tex-math></inline-formula>\u0000-axis aligned crystalline (CAAC) indium–gallium–zinc–oxide (IGZO) transistors, exhibiting extreme low leakage, is a promising memory technology with lower refresh power overhead. A long retention time in IGZO eDRAM can enable multilevel cell functionality, which can improve its efficacy in CIM applications. In this article, we explore a capacitorless IGZO eDRAM-based multilevel cell, capable of storing 1.5 bits/cell for CIM designs focused on deep neural network (DNN) inference applications. We perform a detailed design space exploration of IGZO eDRAM sensitivity to process temperature variations for read, write, and retention operations followed by architecture-level simulations comparing performance and energy for different workloads. The effectiveness of IGZO eDRAM-based CIM architecture is evaluated using a representative neural network, and the proposed approach achieves 82% Top-1 inference accuracy for the CIFAR-10 dataset, compared with 87% software accuracy with high bit cell storage density.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"8 1","pages":"35-43"},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09815041.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46072256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Information for Authors 面向作者的探索性固态计算器件和电路杂志

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143401

引用次数: 0

A FeFET-Based Hybrid Memory Accessible by Content and by Address 一种可通过内容和地址访问的基于FeFET的混合存储器

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-04-18 DOI: 10.1109/JXCDC.2022.3168057

Cédric Marchand;Ian O’Connor;Mayeul Cantan;Evelyn T. Breyer;Stefan Slesazeck;Thomas Mikolajick

{"title":"A FeFET-Based Hybrid Memory Accessible by Content and by Address","authors":"Cédric Marchand;Ian O’Connor;Mayeul Cantan;Evelyn T. Breyer;Stefan Slesazeck;Thomas Mikolajick","doi":"10.1109/JXCDC.2022.3168057","DOIUrl":"10.1109/JXCDC.2022.3168057","url":null,"abstract":"Emerging nonvolatile memory technologies are attracting interest from the system design level to implement alternatives to conventional von-Neumann computing architectures. In particular, the hafnium oxide-based ferroelectric (FE) memory technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable memory (TCAM) cells. These enable the tight combination of different functionalities in the same circuit to reduce implementation area and energy consumption. In this article, we propose a new hybrid memory circuit that combines TCAM and normal memory capability: the Ternary Content addressable and MEMory (TC-MEM). A 1-bit TC-MEM circuit is proposed and discussed in detail, both as a concept and through its implementation in a 28-nm ferroelectric field-effect transistor (FeFET) technology. Measurement results demonstrate the circuit functionality. We also discuss how to scale it to multibit circuits, as well as its use both as a TCAM and as a normal memory allowing the implementation of reversible functions using one memory table instead of two memory tables, and in-memory-computing concepts.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"8 1","pages":"19-26"},"PeriodicalIF":2.4,"publicationDate":"2022-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09758734.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41615162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

An Algorithm-Hardware Co-Design for Bayesian Neural Network Utilizing SOT-MRAM’s Inherent Stochasticity 利用SOT-MRAM固有稳健性的贝叶斯神经网络算法硬件协同设计

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-03-23 DOI: 10.1109/JXCDC.2022.3177588

Anni Lu;Yandong Luo;Shimeng Yu

{"title":"An Algorithm-Hardware Co-Design for Bayesian Neural Network Utilizing SOT-MRAM’s Inherent Stochasticity","authors":"Anni Lu;Yandong Luo;Shimeng Yu","doi":"10.1109/JXCDC.2022.3177588","DOIUrl":"10.1109/JXCDC.2022.3177588","url":null,"abstract":"Probabilistic machine learning plays a central role in the domains such as decision-making and autonomous control benefitting from its ability of representing and manipulating uncertainty about models and predictions. Until now, there are few hardware considerations to address the intensive computation and true random number generation for Bayesian neural network (BayesNN), whose weights are represented by probability distributions. In this article, we propose to apply the local reparameterization trick to alleviate the burden of random number generators (RNGs), which could be implemented by utilizing the inherent random noise of spin-orbit torque magnetic random access memory (SOT-MRAM). Sampling strategies are discussed to significantly reduce the number of operations and parameters of BayesNN. A device-circuit-system benchmark framework is then developed to evaluate the effects of device nonidealities such as the bias and variation of switching probability. The evaluation on the CIFAR-10 dataset suggests that BayesNN could achieve comparable accuracy as conventional deep neural network (DNN) with acceptable hardware overhead but provide much better uncertainty calibration with respect to out-of-distribution (OOD) inputs (rotated images as the example).","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":"8 1","pages":"27-34"},"PeriodicalIF":2.4,"publicationDate":"2022-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09780409.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46759180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5