IEEE Journal on Exploratory Solid-State Computational Devices and Circuits最新文献_第9页

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Information for Authors 面向作者的探索性固态计算器件和电路杂志

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143401

引用次数: 0

A FeFET-Based Hybrid Memory Accessible by Content and by Address 一种可通过内容和地址访问的基于FeFET的混合存储器

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-04-18 DOI: 10.1109/JXCDC.2022.3168057

Cédric Marchand;Ian O’Connor;Mayeul Cantan;Evelyn T. Breyer;Stefan Slesazeck;Thomas Mikolajick

{"title":"A FeFET-Based Hybrid Memory Accessible by Content and by Address","authors":"Cédric Marchand;Ian O’Connor;Mayeul Cantan;Evelyn T. Breyer;Stefan Slesazeck;Thomas Mikolajick","doi":"10.1109/JXCDC.2022.3168057","DOIUrl":"10.1109/JXCDC.2022.3168057","url":null,"abstract":"Emerging nonvolatile memory technologies are attracting interest from the system design level to implement alternatives to conventional von-Neumann computing architectures. In particular, the hafnium oxide-based ferroelectric (FE) memory technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable memory (TCAM) cells. These enable the tight combination of different functionalities in the same circuit to reduce implementation area and energy consumption. In this article, we propose a new hybrid memory circuit that combines TCAM and normal memory capability: the Ternary Content addressable and MEMory (TC-MEM). A 1-bit TC-MEM circuit is proposed and discussed in detail, both as a concept and through its implementation in a 28-nm ferroelectric field-effect transistor (FeFET) technology. Measurement results demonstrate the circuit functionality. We also discuss how to scale it to multibit circuits, as well as its use both as a TCAM and as a normal memory allowing the implementation of reversible functions using one memory table instead of two memory tables, and in-memory-computing concepts.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09758734.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41615162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

An Algorithm-Hardware Co-Design for Bayesian Neural Network Utilizing SOT-MRAM’s Inherent Stochasticity 利用SOT-MRAM固有稳健性的贝叶斯神经网络算法硬件协同设计

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-03-23 DOI: 10.1109/JXCDC.2022.3177588

Anni Lu;Yandong Luo;Shimeng Yu

{"title":"An Algorithm-Hardware Co-Design for Bayesian Neural Network Utilizing SOT-MRAM’s Inherent Stochasticity","authors":"Anni Lu;Yandong Luo;Shimeng Yu","doi":"10.1109/JXCDC.2022.3177588","DOIUrl":"10.1109/JXCDC.2022.3177588","url":null,"abstract":"Probabilistic machine learning plays a central role in the domains such as decision-making and autonomous control benefitting from its ability of representing and manipulating uncertainty about models and predictions. Until now, there are few hardware considerations to address the intensive computation and true random number generation for Bayesian neural network (BayesNN), whose weights are represented by probability distributions. In this article, we propose to apply the local reparameterization trick to alleviate the burden of random number generators (RNGs), which could be implemented by utilizing the inherent random noise of spin-orbit torque magnetic random access memory (SOT-MRAM). Sampling strategies are discussed to significantly reduce the number of operations and parameters of BayesNN. A device-circuit-system benchmark framework is then developed to evaluate the effects of device nonidealities such as the bias and variation of switching probability. The evaluation on the CIFAR-10 dataset suggests that BayesNN could achieve comparable accuracy as conventional deep neural network (DNN) with acceptable hardware overhead but provide much better uncertainty calibration with respect to out-of-distribution (OOD) inputs (rotated images as the example).","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09780409.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46759180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits 磁电自旋轨道逻辑电路的物理模型

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-01-14 DOI: 10.1109/JXCDC.2022.3143130

Hai Li;Dmitri E. Nikonov;Chia-Ching Lin;Kerem Camsari;Yu-Ching Liao;Chia-Sheng Hsu;Azad Naeemi;Ian A. Young

引用次数: 3

Special Topic on Cryogenic Semiconductor Devices and Circuits for Computing 计算用低温半导体器件和电路专题

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-30 DOI: 10.1109/JXCDC.2021.3135720

Victor Zhirnov

引用次数: 0

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits—Volume 7, No. 2 探索性固态计算器件和电路IEEE杂志-第7卷，第2期

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-30 DOI: 10.1109/JXCDC.2021.3135680

Azad Naeemi

引用次数: 0

Special Topic on Emerging Hardware for Cognitive Computing 认知计算新兴硬件专题

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-30 DOI: 10.1109/JXCDC.2021.3135681

Jean Anne C. Incorvia

引用次数: 0

Voltage-Controlled Domain Wall Motion-Based Neuron and Stochastic Magnetic Tunnel Junction Synapse for Neuromorphic Computing Applications 基于电压控制畴壁运动的神经元和随机磁隧道连接突触在神经形态计算中的应用

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-23 DOI: 10.1109/JXCDC.2021.3138038

Aijaz H. Lone;S. Amara;H. Fariborzi

{"title":"Voltage-Controlled Domain Wall Motion-Based Neuron and Stochastic Magnetic Tunnel Junction Synapse for Neuromorphic Computing Applications","authors":"Aijaz H. Lone;S. Amara;H. Fariborzi","doi":"10.1109/JXCDC.2021.3138038","DOIUrl":"https://doi.org/10.1109/JXCDC.2021.3138038","url":null,"abstract":"This work discusses the proposal of a spintronic neuromorphic system with spin orbit torque-driven domain wall motion (DWM)-based neurons and synapses. We propose a voltage-controlled magnetic anisotropy DWM-based magnetic tunnel junction (MTJ) neuron. We investigate how the electric field at the gate (pinning site), generated by the voltage signals from pre-neurons, modulates the DWM, which reflects in the nonlinear switching behavior of neuron magnetization. For the implementation of synaptic weights, we propose a 3-terminal MTJ with stochastic DWM in the free layer. We incorporate intrinsic pinning effects by creating triangular notches on the sides of the free layer. The pinning of the domain wall and intrinsic thermal noise of the device lead to the stochastic behavior of DWM. The control of this stochasticity by the spin orbit torque is shown to realize the potentiation and depression of the synaptic weight. The micromagnetics and spin transport studies in synapses and neurons are carried out by developing a coupled micromagnetic non-equilibrium Green’s function (\u0000<italic>MuMag-NEGF</i>\u0000) model. The minimization of the writing current pulsewidth by leveraging the thermal noise and demagnetization energy is also presented. Finally, we discuss the implementation of digit recognition by the proposed system using a spike time-dependent algorithm.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2021-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09662393.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49963532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

X- and Ku-Band SiGe-HBT Voltage-Controlled Ring Oscillators for Cryogenic Applications 用于低温应用的X和Ku波段SiGe HBT压控环形振荡器

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-03 DOI: 10.1109/JXCDC.2021.3132838

Eren Vardarli;Anindya Mukherjee;Xiaodi Jin;Paulius Sakalas;Michael Schröter

{"title":"X- and Ku-Band SiGe-HBT Voltage-Controlled Ring Oscillators for Cryogenic Applications","authors":"Eren Vardarli;Anindya Mukherjee;Xiaodi Jin;Paulius Sakalas;Michael Schröter","doi":"10.1109/JXCDC.2021.3132838","DOIUrl":"10.1109/JXCDC.2021.3132838","url":null,"abstract":"The theory, design, and implementation of emitter-coupled logic (ECL)-based voltage-controlled ring oscillators (R-VCOs) operating at X- and \u0000<inline-formula> <tex-math>$text{K}_{text {u}}$ </tex-math></inline-formula>\u0000-bands for cryogenic applications are presented. Five- and seven-stage R-VCOs were fabricated in a 130-nm SiGe:C BiCMOS process technology. They provide differential multi-phased local oscillator (LO) signals with a maximum time resolution of 5.4 ps and can operate at both room temperature (RT) and cryogenic temperature (CT). For designing under cryogenic conditions (6 K), the compact model HICUM/L2 was extended, and the corresponding model parameters were extracted at CTs. The implemented 5-/7-stage R-VCOs offer an adjustable frequency range of 9.7–16.5 GHz (52%) and 8.4–13.3 GHz (45%), respectively, with a maximum core power dissipation of 153 and 165 mW. At 6 K, the frequency of operation can be increased up to 18 GHz, while the power dissipation increases by only 30 mW. The R-VCOs occupy a very compact active area of 0.04 and 0.12 mm\u0000<sup>2</sup>\u0000. The phase noise of the R-VCOs at 16.5/13 GHz at an offset frequency of 10-MHz is −106.3/−107.3 dBc/Hz. They provide up to −6 dBm of saturated differential output power. To the best of our knowledge, this is the first time an hetero-junction bipolar transistor (HBT)-based 5-/7-stage R-VCO is being presented at X- and \u0000<inline-formula> <tex-math>$text{K}_{text {u}}$ </tex-math></inline-formula>\u0000-band that can operate under cryogenic conditions.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2021-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9650774/09635779.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45597695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Information for authors 作者信息

IF 2.4

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2021-12-01 DOI: 10.1109/JXCDC.2021.3135852

引用次数: 0