IEEE Journal on Exploratory Solid-State Computational Devices and Circuits最新文献

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RM-NTT: An RRAM-Based Compute-in-Memory Number Theoretic Transform Accelerator RM-NTT:一种基于ram的内存中计算数论转换加速器
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-08-30 DOI: 10.1109/JXCDC.2022.3202517
Yongmo Park;Ziyu Wang;Sangmin Yoo;Wei D. Lu
{"title":"RM-NTT: An RRAM-Based Compute-in-Memory Number Theoretic Transform Accelerator","authors":"Yongmo Park;Ziyu Wang;Sangmin Yoo;Wei D. Lu","doi":"10.1109/JXCDC.2022.3202517","DOIUrl":"10.1109/JXCDC.2022.3202517","url":null,"abstract":"As more cloud computing resources are used for machine learning training and inference processes, privacy-preserving techniques that protect data from revealing at the cloud platforms attract increasing interest. Homomorphic encryption (HE) is one of the most promising techniques that enable privacy-preserving machine learning because HE allows data to be evaluated under encrypted forms. However, deep neural network (DNN) implementations using HE are orders of magnitude slower than plaintext implementations. The use of very long polynomials and associated number theoretic transform (NTT) operations for polynomial multiplications is the main bottlenecks of HE implementation for practical uses. This article introduces RRAM number theoretic transform (RM-NTT): a resistive random access memory (RRAM)-based compute-in-memory (CIM) system to accelerate NTT and inverse NTT (INTT) operations. Instead of running fast Fourier transform (FFT)-like algorithms, RM-NTT uses a vector-matrix multiplication (VMM) approach to achieve maximal parallelism during NTT and INTT operations. To improve the efficiency, RM-NTT stores modified forms of the twiddle factors in the RRAM arrays to process NTT/INTT in the same RRAM array and employs a Montgomery reduction algorithm to convert the VMM results. The proposed optimization methods allow RM-NTT to significantly reduce NTT operation latency compared with other NTT accelerators, including both CIM and non-CIM-based designs. The effects of different RM-NTT design parameters and device nonidealities are also discussed.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9969523/09870678.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44468639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM) 磁电三元内容可寻址存储器(TCAM)的建模与设计
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-09 DOI: 10.1109/JXCDC.2022.3181925
Siri Narla;Piyush Kumar;Ann Franchesca Laguna;Dayane Reis;X. Sharon Hu;Michael Niemier;Azad Naeemi
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引用次数: 6
Yttrium Iron Garnet-Based Combinatorial Logic and Memory Devices 基于钇铁石榴石的组合逻辑和存储器件
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3202180
Michael Balinskiy;Alexander Khitun
{"title":"Yttrium Iron Garnet-Based Combinatorial Logic and Memory Devices","authors":"Michael Balinskiy;Alexander Khitun","doi":"10.1109/JXCDC.2022.3202180","DOIUrl":"10.1109/JXCDC.2022.3202180","url":null,"abstract":"Yttrium iron garnet Y3Fe2(FeO4)3 (YIG) has a uniquely low magnetic damping for spin waves, which makes it a perfect material for magnonic devices. Spin waves typically exist in the microwave frequency range, and their wavelength can be decreased to the nanoscale. Their dispersion in YIG waveguides depends on the strength and orientation of the bias magnetic field. It may be possible to exploit YIG waveguides as field-controlled filters and delay lines. In this work, we describe combinatorial logic and memory devices to benefit YIG properties. An act of computation in the combinatorial device is associated with finding a route connecting the input and output ports. We present experimental data demonstrating the pathfinding in the active ring circuit with YIG waveguide. The ability to search in parallel through multiple paths is the most appealing property of combinatorial devices. Potentially, they may compete with quantum computers in functional throughput.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09868767.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42869408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits—Vol. 8, No. 1 探索性固态计算器件和电路IEEE杂志-卷。8、No. 1
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3204198
Azad Naeemi
{"title":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits—Vol. 8, No. 1","authors":"Azad Naeemi","doi":"10.1109/JXCDC.2022.3204198","DOIUrl":"10.1109/JXCDC.2022.3204198","url":null,"abstract":"Welcome to the seventh volume, second semiannual issue of the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC), a multidisciplinary, open access IEEE journal that is focused on publishing seminal research in the exploration for energy-efficient computing based on physics and materials to enable new devices, circuits, and architecture that will be of great interest to integrated circuit researchers and those working in the information technology (IT) industry. The articles in the journal are selectively chosen to provide insight into the architectural, circuit, and device implications of emerging quantum nanoelectronic and nanomagnetic device technologies. Discovery of new materials, devices, and circuits for energy-efficient computational circuits will be needed to enable Moore’s law to continue for computing beyond the end of the roadmap for CMOS technologies, with significant improvement in energy efficiency and cost per function.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09903016.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44882687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information 探索性固态计算器件和电路IEEE杂志出版信息
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143391
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引用次数: 0
Guest Editorial Special Topic on Oxide Electronics for Beyond CMOS Logic and Memory 超越CMOS逻辑和存储器的氧化物电子客座编辑专题
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3207087
Dmitri E. Nikonov
{"title":"Guest Editorial Special Topic on Oxide Electronics for Beyond CMOS Logic and Memory","authors":"Dmitri E. Nikonov","doi":"10.1109/JXCDC.2022.3207087","DOIUrl":"10.1109/JXCDC.2022.3207087","url":null,"abstract":"As is well known, the traditional electronics as well as exploratory logic and memory devices have relied on mono- or bi-elemental semiconductors for many decades. Oxides served an indispensable, but still secondary role of capacitor dielectrics, insulation, tunneling barriers, and so on. The functionality of oxides putting them at the center stage of computing (such as conduction, ferroelectricity, magnetic/spin, piezoelectric, ion drift, metal–insulator transitions, etc.) was researched from the material science side throughout this time. However, the work on realistic computing devices based on these properties really took off in the past decade. Oxides allow for a wider variety of phenomena which can be utilized (multiferroic materials, spin waves, to name a few). They require more sophisticated theoretical treatment (such as indirect exchange, Dzyaloshinskii–Moriya interaction, and topological materials) than traditional semi-conductors. In some cases, the single crystal state and close to atomically flat interfaces require novel fabrication methods. All these provide exciting opportunities to advance computing.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09906568.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43591151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information 探索性固态计算器件和电路IEEE杂志出版信息
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143399
{"title":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information","authors":"","doi":"10.1109/JXCDC.2022.3143399","DOIUrl":"10.1109/JXCDC.2022.3143399","url":null,"abstract":"Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09916566.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43858938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM) 磁电三元内容可寻址存储器(TCAM)的建模与设计
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3181925
Siri Narla, Piyush Kumar, Ann Franchesca Laguna, D. Reis, X. S. Hu, M. Niemier, A. Naeemi
{"title":"Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM)","authors":"Siri Narla, Piyush Kumar, Ann Franchesca Laguna, D. Reis, X. S. Hu, M. Niemier, A. Naeemi","doi":"10.1109/JXCDC.2022.3181925","DOIUrl":"https://doi.org/10.1109/JXCDC.2022.3181925","url":null,"abstract":"This article proposes a novel magnetoelectric (ME) effect-based ternary content addressable memory (TCAM). The potential array-level write and search performances of the proposed ME-TCAM are studied using experimentally calibrated compact physical models and SPICE simulations. The voltage-controlled operation of the ME devices eliminates the large joule heating present in the current-controlled magnetic devices and their low-voltage write operation makes them more energy-efficient compared to static random access memory-based TCAMs (SRAM-TCAMs). The proposed compact TCAM outperforms its SRAM counterpart with <inline-formula> <tex-math notation=\"LaTeX\">$1.35times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation=\"LaTeX\">$14.4times $ </tex-math></inline-formula> improvements in search and write energy, respectively, and its nonvolatility eliminates the standby leakage. We project an error rate below <inline-formula> <tex-math notation=\"LaTeX\">$10^{-4}$ </tex-math></inline-formula> while considering various sources of variation in magnetic and CMOS devices. At the application level, using memory-augmented neural networks (MANNs), we project a <inline-formula> <tex-math notation=\"LaTeX\">$2times $ </tex-math></inline-formula> energy-delay–area-product (EDAP) improvement over an SRAM-TCAM.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62234230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Information for Authors 面向作者的探索性固态计算器件和电路杂志
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3143393
{"title":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Information for Authors","authors":"","doi":"10.1109/JXCDC.2022.3143393","DOIUrl":"10.1109/JXCDC.2022.3143393","url":null,"abstract":"These instructions give guidelines for preparing papers for this publication. Presents information for authors publishing in this journal.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9684158/09916562.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44907479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IGZO CIM: Enabling In-Memory Computations Using Multilevel Capacitorless Indium–Gallium–Zinc–Oxide-Based Embedded DRAM Technology IGZO CIM:使用基于多电平无电容铟镓锌氧化物的嵌入式DRAM技术实现内存计算
IF 2.4
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2022-06-01 DOI: 10.1109/JXCDC.2022.3188366
Siddhartha Raman Sundara Raman;Shanshan Xie;Jaydeep P. Kulkarni
{"title":"IGZO CIM: Enabling In-Memory Computations Using Multilevel Capacitorless Indium–Gallium–Zinc–Oxide-Based Embedded DRAM Technology","authors":"Siddhartha Raman Sundara Raman;Shanshan Xie;Jaydeep P. Kulkarni","doi":"10.1109/JXCDC.2022.3188366","DOIUrl":"10.1109/JXCDC.2022.3188366","url":null,"abstract":"Compute-in-memory (CIM) is a promising approach for efficiently performing data-centric computing (such as neural network computations). Among the multiple semiconductor memory technologies, embedded DRAM (eDRAM), which integrates the DRAM bit cell with high-performance logic transistors, can enable efficient CIM designs. However, the silicon-based eDRAM technology suffers from poor retention time-incurring significant refresh power overhead. However, eDRAM using back-end-of-line (BEOL) integrated \u0000<inline-formula> <tex-math>$C$ </tex-math></inline-formula>\u0000-axis aligned crystalline (CAAC) indium–gallium–zinc–oxide (IGZO) transistors, exhibiting extreme low leakage, is a promising memory technology with lower refresh power overhead. A long retention time in IGZO eDRAM can enable multilevel cell functionality, which can improve its efficacy in CIM applications. In this article, we explore a capacitorless IGZO eDRAM-based multilevel cell, capable of storing 1.5 bits/cell for CIM designs focused on deep neural network (DNN) inference applications. We perform a detailed design space exploration of IGZO eDRAM sensitivity to process temperature variations for read, write, and retention operations followed by architecture-level simulations comparing performance and energy for different workloads. The effectiveness of IGZO eDRAM-based CIM architecture is evaluated using a representative neural network, and the proposed approach achieves 82% Top-1 inference accuracy for the CIFAR-10 dataset, compared with 87% software accuracy with high bit cell storage density.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.4,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9903013/09815041.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46072256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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