Aeu-International Journal of Electronics and Communications最新文献

{"title":"Fractional-order bi-Hopfield neuron coupled via a multistable memristor: Complex neuronal dynamic analysis and implementation with microcontroller","authors":"Victor Kamdoum Tamba ,&nbsp;Arsene Loic Mbanda Biamou ,&nbsp;Viet-Thanh Pham ,&nbsp;Giuseppe Grassi ,&nbsp;François Kapche Tagne ,&nbsp;Armand Cyrille Nzeukou Takougang","doi":"10.1016/j.aeue.2025.155661","DOIUrl":"10.1016/j.aeue.2025.155661","url":null,"abstract":"<div><div>The Hopfield neuron is an artificial neuron model used for pattern memorization and recognition. It exhibits a complex dynamic with stable states corresponding to memorized patterns. In order to grasp a more complete representation of the information exchange between two neurons, emphasizing the importance of neuronal connections in brain processing, we propose in this work the coupling of two fractional-order Hopfield neurons via a fractional-order flux-controlled multistable memristor. Each of these two neurons incorporates a self-coupling memristive component, called an autapse memristor. Additionally, the second neuron is subjected to an external electromagnetic radiation, simulated by an additional memristor. The I-V characteristics of the memristors integrated in this model are analyzed through numerical simulations. The simulations of model dynamics versus its diverse parameters have revealed rich and complex dynamical behaviors. These simulations demonstrate that the proposed model generates a variety of homogeneous and heterogeneous chaotic attractors, distributed at diverse locations. The elaborated memristor coupled fractional-order bi-Hopfield neuron MCFBHN model is implemented on an Arduino-Due platform. A comparison of the results of the two approaches shows good consistency.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155661"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A UWB vector synthesis phase shifter based on an improved current array control circuit and an RC-RL polyphase filter","authors":"Zheming Zhang ,&nbsp;Yongqing Leng ,&nbsp;Xin Qiu ,&nbsp;Shuhui Yang ,&nbsp;Xingli Cui","doi":"10.1016/j.aeue.2024.155659","DOIUrl":"10.1016/j.aeue.2024.155659","url":null,"abstract":"<div><div>This paper presents the design of a 2-18 GHz 6-bit vector synthesis phase shifter based on a <span><math><mrow><mn>0</mn><mo>.</mo><mn>18</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> RF CMOS process, featuring low root mean square (RMS) phase and gain errors. An RC-RL polyphase filter (PPF) is utilized to generate two pairs of in-phase/quadrature (I/Q) signals with high orthogonal precision across a wide frequency band, while insertion loss is minimized by reducing inter-stage mismatch. The I/Q signals are then fed into an analog adder based on Gilbert cell architecture. The tail current ratio for the I/Q paths is adjusted using a current array control circuit to achieve a 6-bit phase resolution for signal phase shifts between 0°and 360°. This current array independently controls the currents of the I/Q paths by duplicating two sets of current branches, ensuring that both currents closely approximate the theoretical ratio. This approach enhances the phase shifting accuracy and reduces gain errors in the phase shifter. Simulation results demonstrate that the phase shifter achieves a maximum gain of -1.2 dB at 6.48 GHz, with an RMS gain error of less than 0.83 dB and an RMS phase error of less than 5°across all 64 phase states within the 2-18 GHz range. With a supply voltage of 1.8 V, the total current is 4.2 mA, and the total chip size is 2307 × <span><math><mrow><mn>723</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> <span><math><msup><mrow></mrow><mrow><mn>2</mn></mrow></msup></math></span>.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155659"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Energy-efficient high-linearity SAR ADC with a unary–binary hybrid capacitor switching method","authors":"Guangjian Xu,&nbsp;Chang Zhang,&nbsp;Qinqin Li,&nbsp;Xingyuan Tong","doi":"10.1016/j.aeue.2024.155598","DOIUrl":"10.1016/j.aeue.2024.155598","url":null,"abstract":"<div><div>This study developed a 10-bit 10 MS/s energy-efficient and high-linearity successive approximation register (SAR) analog-to-digital converter (ADC). The design utilized a capacitor array structure employing “3-bit thermometer code + 6-bit binary code” to achieve 10-bit quantization through a <span><math><msub><mrow><mi>V</mi></mrow><mrow><mi>c</mi><mi>m</mi></mrow></msub></math></span>-based three-level capacitor switching scheme. The thermometer codes optimized the switching capacitors of the most significant bits to enhance linearity. Further, a unary and binary code control method was implemented to automatically switch across the remaining unary code capacitors when the differential output of the digital-to-analog converter was below 64 least significant bits (LSB). This method reduces the switching energy by 30% compared to the binary CDAC, while RMSDNL and RMSINL are reduced by 47.50% and 26.08%, respectively. The 10-bit SAR ADC was designed with <span><math><mrow><mn>0</mn><mo>.</mo><mn>18</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> CMOS technology, and the ADC core occupied an area of 0.077 mm<span><math><msup><mrow></mrow><mrow><mn>2</mn></mrow></msup></math></span>. At supply and reference voltages of 1.2 V, the ADC achieved differential non-linearity and integral non-linearity values of <span><math><mrow><mo>+</mo><mn>0</mn><mo>.</mo><mn>36</mn><mo>/</mo><mo>−</mo><mn>0</mn><mo>.</mo><mn>32</mn></mrow></math></span> and <span><math><mrow><mo>+</mo><mn>0</mn><mo>.</mo><mn>4</mn><mo>/</mo><mo>−</mo><mn>0</mn><mo>.</mo><mn>37</mn></mrow></math></span> LSB, respectively, at a sampling frequency of 10 MS/s and with a 1% capacitor mismatch. At an input signal frequency of 4.65 MHz, the ADC achieved a signal-to-noise-and-distortion ratio (SNDR) and spurious-free dynamic range (SFDR) of 60.07 and 80.03 dB, respectively. The ADC consumed a power of 137.36 <span><math><mi>μ</mi></math></span>W, and the Walden figure of merit was 16.74 fJ/conversion-step.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"190 ","pages":"Article 155598"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143183269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An analog predistortion linearizer with independently tunable gain and adjustable shape using an asymmetric reflective structure","authors":"Benhua Ma ,&nbsp;Hailin Deng ,&nbsp;Dewei Zhang ,&nbsp;Hang Qian ,&nbsp;Dalong Lv ,&nbsp;Dongfang Zhou","doi":"10.1016/j.aeue.2024.155620","DOIUrl":"10.1016/j.aeue.2024.155620","url":null,"abstract":"<div><div>This paper presents a novel reflective analog predistortion (RAPD) linearizer with independently tunable gain conversion and tunable shape. Based on an asymmetric reflective topology consisting of a nonlinear branch and a linear branch, this linearizer achieves a simple circuit structure. Independent tuning of gain conversion of this linearizer is realized by changing the bias voltage of the linear branch. Meanwhile, the shape of the amplitude compensation of the linearizer can be adjusted by changing the bias voltage of the nonlinear impedance matching network (NIMN) in the nonlinear branch. The theoretical analysis and tuning process of this linearizer are discussed in detail. The tunability of the APD is verified by simulation and measurement results, which are in agreement. Furthermore, a Ku-band 50 W solid state power amplifier (SSPA) is linearized by the APD. The third-order intermodulation (C/IM3) is greater than 26.1 dBc at 2 dB output power backoff (OPBO) over the operating band of 10.7–12.7 GHz.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"190 ","pages":"Article 155620"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143183302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Circularly polarized hybrid fractal antenna for Ku band application","authors":"Prasannajeet Mohanty,&nbsp;Subhasish Pandav,&nbsp;Santanu Kumar Behera","doi":"10.1016/j.aeue.2024.155641","DOIUrl":"10.1016/j.aeue.2024.155641","url":null,"abstract":"<div><div>This article presents a hybrid fractal microstrip antenna design, referred to as the Vicsekcross &amp; Koch Curve Fractal Antenna (VKFA). The term “hybrid” reflects the integration of two distinct fractal geometries—Vicsekcross and Koch curves—within the same antenna structure. This combination leverages the unique properties of both geometries: the space-filling characteristic of the Vicsekcross fractal, which enhances the effective electrical length for improved miniaturization, and the self-similarity of the Koch fractal, which optimizes bandwidth and gain. The advantages of the proposed hybrid fractal microstrip antenna are enhanced bandwidth, compact size, and enhanced key parameters like gain and efficiency. Finally, it reduces the fabrication cost. The antenna integrates a 2nd order Vicsekcross fractal geometry along with a 2nd order Koch Curve fractal, optimizing its structure for multiband operation and miniaturization. The proposed VKFA covers an operational frequency range from 16.92 GHz to 18.74 GHz, demonstrating a peak gain of 5.14 dBic at 17.19 GHz, with good gain throughout the band. The current vector distribution plot reveals that the antenna features two L-shaped slots positioned 180° apart at the center of the radiating patch to achieve circularly polarized (CP) radiation. By etching these L-shaped slots into the patch, two orthogonal field components are generated, enabling CP characteristics. This occurs due to the establishment of currents on the radiating patch, which results in the formation of two orthogonal modes with a 90° phase shift, essential for CP radiation. The antenna exhibits right-hand circular polarization (RHCP) with a 3 dB axial ratio bandwidth (ARBW) spanning from 17.12 GHz to 18.04 GHz, making it highly suitable for circular polarization applications. The structure is fabricated on an inexpensive FR4 Epoxy substrate with a dielectric constant (<span><math><mrow><msub><mi>ε</mi><mi>r</mi></msub><mrow><mo>)</mo></mrow></mrow></math></span> 4.4. The patch antenna achieves compactness, with overall dimensions of 2.18λ₀ × 2.18λ₀ × 0.09λ₀ at a resonance frequency <span><math><mrow><mo>(</mo><msub><mi>f</mi><mi>r</mi></msub><mo>)</mo></mrow></math></span> of 17.9 GHz. The Comparative analysis of the measured and simulated results reveals a high level of agreement after the evolution of the antenna’s effectiveness. Due to its compact size, high gain, and broad ARBW, the VKFA can be a suitable candidate for applications in the Ku-band, especially for satellite communications and radar systems.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"190 ","pages":"Article 155641"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143183577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multi-functional reconfigurable intelligent surface for maximizing sum rate in wireless communication systems","authors":"Yinping Zhou,&nbsp;Yucheng Wu,&nbsp;Weiyang Xu","doi":"10.1016/j.aeue.2024.155648","DOIUrl":"10.1016/j.aeue.2024.155648","url":null,"abstract":"<div><div>Current passive reflecting intelligent surfaces (RISs) face challenges, including restricted limited half-space coverage and dual fading attenuation, despite their potential to enhance wireless network performance. This paper introduces a novel multi-functional RIS (MF-RIS) that address problems, offering improved performance and full-space coverage. The working principle of the MF-RIS is first presented, followed by the introduction of an advanced beamforming strategy that leverages the MF-RIS to enhance wireless communication. To maximize the sum rate in the system, taking into account power budget and energy conservation constraints, a non-convex optimization problem is formulated, involving the optimization of MF-RIS coefficients. To address this problem, a robust iterative algorithm based on fractional programming (FP) is proposed. Experimental results validate the proposed approach, demonstrating the superior performance of the MF-RIS scheme under identical power constraints compared to dual-functional RIS (DF-RIS) and single-functional RIS (SF-RIS) schemes.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155648"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Neural network based optimization of transmit beamforming and RIS coefficients using channel covariances in MISO downlink","authors":"Khin Thandar Kyaw ,&nbsp;Wiroonsak Santipach ,&nbsp;Kritsada Mamat ,&nbsp;Kamol Kaemarungsi ,&nbsp;Kazuhiko Fukawa ,&nbsp;Lunchakorn Wuttisittikulkij","doi":"10.1016/j.aeue.2024.155656","DOIUrl":"10.1016/j.aeue.2024.155656","url":null,"abstract":"<div><div>We propose an unsupervised beamforming neural network (BNN) and a supervised reconfigurable intelligent surface (RIS) convolutional neural network (CNN) to optimize transmit beamforming and RIS coefficients of multi-input single-output (MISO) downlink with RIS assistance. To avoid frequent beam updates, the proposed BNN and RIS CNN are based on slow-changing channel covariances and are different from most other neural networks that utilize channel instances. Numerical simulations show that for a small or moderate signal-to-noise ratio (SNR), the proposed BNN with RIS CNN can achieve a sum rate close to that of a system with optimal beams and RIS coefficients. Furthermore, the proposed scheme significantly reduces the computation time.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155656"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Broadband Doherty Power Amplifier with baseband impedance control for concurrent application","authors":"Ke Liu ,&nbsp;Weimin Shi ,&nbsp;Ning Lu ,&nbsp;Yu Li ,&nbsp;Jinting Liu ,&nbsp;Yufeng Zang ,&nbsp;Chunyu Hu ,&nbsp;Mingyu Li","doi":"10.1016/j.aeue.2025.155680","DOIUrl":"10.1016/j.aeue.2025.155680","url":null,"abstract":"<div><div>Traditionally, the concurrent power amplifier (PA) works at two fixed frequency point, limiting its application. Indeed, broadband PA with flexible concurrent frequency point is highly expected. This paper presents a broadband Doherty PA (DPA) with base-band impedance control for concurrent application. The bias network is carefully designed to control base-band impedance over a wide bandwidth, enabling flexible concurrent frequency adjustment in the DPA operation frequency band. Simultaneously, the basic theory of a concurrent class-B PA is analyzed. Then, the efficiency response of a concurrent DPA is derived. As a validation, this paper implements a 1.8–2.2 GHz broadband DPA for concurrent application. Under a continuous-wave (CW) signal excitation, the fabricated DPA achieves a maximum output power of 43.4–44.1 dBm, a saturation drain efficiency (DE) of 55.4%–67% and a 6 dB back-off DE of 47%–54% over 1.8–2.2 GHz. Moreover, under the excitation of an equal-amplitude two-tone signal, the fabricated DPA achieves a maximum concurrent output power of 40.7–42.2 dBm over tone spacing of 20–400 MHz, the measured back-off concurrent DE changes from 44% to 48% and the saturation concurrent DE changes from 55% to 68.5% over tone spacing of 20–400 MHz.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155680"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Wideband impedance network design of 3-D printed Vivaldi antenna based on surface wave suppression","authors":"Shaofei Wang ,&nbsp;Haiwen Liu ,&nbsp;Hongliang Tian ,&nbsp;Ruolin Wang","doi":"10.1016/j.aeue.2025.155681","DOIUrl":"10.1016/j.aeue.2025.155681","url":null,"abstract":"<div><div>Aiming at fast radio burst (FRB) observation and receiving other radio frequency signals in process of deep space exploration, an additive manufactured C- and X-band 3-dimensional (3-D) printed Vivaldi antenna element is designed for phased array feed in radio telescope applications in astronomy observatories. To realize the impedance match between coaxial feeding probe and the parallel waveguide transmission line connected with the exponential shaped radiation flares, a 3-D printed Marchand Balun for the Vivaldi antenna element is designed and optimized to help the Vivaldi antenna cover 4–12 GHz bandwidth. Benefited from additive manufacturing processing, a cylindrical cavity and an arch sector that are difficult to realize by traditional machining are loaded in the parallel plate waveguide (PPW) transmission line to suppress the surface wave. Therefore, the mismatch in both high and low part of the 4–12 GHz working band is offset and good stability of antenna gain in the required C- and X-band is maintained.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155681"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 75.12-nW 0.5-V MOS-based BGR comprising a curvature compensation circuit for analog-to-digital converter applications","authors":"Hamidreza Rashidian ,&nbsp;Iman Soltani ,&nbsp;Mohammad Maghsoudi","doi":"10.1016/j.aeue.2025.155678","DOIUrl":"10.1016/j.aeue.2025.155678","url":null,"abstract":"<div><div>This research presents a low-power metal–oxide–semiconductor field effect transistor (MOSFET)-based bandgap reference (BGR) circuit that operates without bipolar transistors, aiming to minimize the required supply voltage and active area for low-voltage applications. All MOSFETs within the proposed bandgap reference circuit function in the subthreshold region, effectively reducing power consumption. Additionally, a curvature compensation technique is presented to enhance the temperature coefficient and extend the operational temperature range. The proposed BGR circuit, simulated using a 65-nm complementary metal oxide semiconductor (CMOS) process, demonstrates a simulated reference voltage of 0.223 V and temperature coefficient (TC) of 18.16 ppm/°C for the reference output across a wide temperature range of −60 °C to 160 °C. Furthermore, the circuit occupies a compact silicon area of 0.0028 mm². and consumes a power of 75.12 nW at 25 °C. The proposed bandgap reference circuit is well-suited for providing reference voltages in various integrated circuits, particularly in high-precision low-voltage analog-to-digital converters.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"191 ","pages":"Article 155678"},"PeriodicalIF":3.0,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143285550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}