A Compact 2T1C and Cryo-2T1C CMOS Memristor Emulator for Neuromorphic and Quantum Computing

Abstract

In this a new 2T1C (2 Transistors and 1 Capacitor) memristor emulator design which is compact and energy efficient is proposed. It achieves a maximum operating frequency of 150 MHz. The simple circuit design leads to a power consumption of $13.1\mu W$ and occupies a minimal area of $1.25\mu m^2$ at room temperature (RT). The chip area and power consumption of 2T1C memristor emulator are 4 and 74 times lesser than the PMME/NMME memristor emulator respectively. In addition to that, a Cryo-2T1C memristor emulator is proposed and its performance is analysed at cryogenic temperature (4.2 K). The Cryo-2T1C could be considered as the first Cryo-CMOS memristor emulator, which has better memristive characteristics at 4.2 K. The Cryo-2T1C memristor has a power consumption of $47\mu$W and occupies an area of $3.1\mu m^2$ and also operates at a frequency of 150 MHz. To ensure the correctness of memristive characteristics, the proposed designs are verified at various frequencies and voltage levels at RT and 4.2 K in UMC 65 nm process technology. The proposed 2T1C and Cryo-2T1C emulator designs are able to retain the Pinched Hysteresis Loop (PHL) for different process variations and mismatches in both RT and 4.2 K. Hence, the proposed designs are suitable for low power and high frequency applications.