Aeu-International Journal of Electronics and Communications最新文献

Harvesting random telegraph noise for true random number generation

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-17 DOI: 10.1016/j.aeue.2025.155801

F.J. Rubio-Barbero, F. de los Santos-Prieto, R. Castro-Lopez, E. Roca, F.V. Fernandez

{"title":"Harvesting random telegraph noise for true random number generation","authors":"F.J. Rubio-Barbero, F. de los Santos-Prieto, R. Castro-Lopez, E. Roca, F.V. Fernandez","doi":"10.1016/j.aeue.2025.155801","DOIUrl":"10.1016/j.aeue.2025.155801","url":null,"abstract":"<div><div>At first glance, Random Telegraph Noise (RTN) in deeply scaled CMOS transistors may seem like a reliability nuisance. Yet, behind the discrete trapping-and-detrapping events lurks a potent source of hardware entropy. In this paper, we harness RTN to build a dual-purpose security module that serves as both a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG). By measuring the so-called Maximum Current Fluctuation (MCF) at carefully chosen observation windows, our design switches effortlessly between the stable outputs needed for a PUF and the maximally unpredictable bitstreams demanded by a TRNG. Although single-defect RTN has long been deemed ideal for randomness, we show that multi-defect RTN scenarios, much more prevalent in real-world manufacturing, can also yield high-quality random bits, especially when aided by lightweight post-processing. Simple statistical metrics guide the initial tuning, after which the final bitstreams pass the NIST SP 800-22 test suite to validate the statistical soundness of our proposal. In doing so, we address key challenges that arise when designing an RTN-based TRNG and compare our results against state-of-the-art solutions, highlighting advantages in circuit simplicity, bit-rate scalability, and dual-use capability.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155801"},"PeriodicalIF":3.0,"publicationDate":"2025-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143843519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A high gain filtenna with radiation nulls using a novel split-merge feed line on a slot-loaded rectangular patch for X-band RADAR application

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-11 DOI: 10.1016/j.aeue.2025.155789

Ramkumar S., Saravanan M., Saran S., Sibi Varshith S.

{"title":"A high gain filtenna with radiation nulls using a novel split-merge feed line on a slot-loaded rectangular patch for X-band RADAR application","authors":"Ramkumar S., Saravanan M., Saran S., Sibi Varshith S.","doi":"10.1016/j.aeue.2025.155789","DOIUrl":"10.1016/j.aeue.2025.155789","url":null,"abstract":"<div><div>This study presents a single-layer microstrip filtenna designed to achieve a high gain performance. The design incorporates a slot-loaded rectangular patch along with a defected ground structure (DGS). The design of antenna-1 begins with a rectangular patch that includes four vias, a rectangular ring slot and two triangular slots in the ground structure. For improved bandwidth and enhanced filtering performance, antenna-2 employs a unique split-merge feeding approach, incorporating a rectangular slot into the antenna-1 structure. For the proposed filtenna, two rectangular parasitic patches are placed on either side of the split-merge feedline, with a diamond-shaped slot inserted in the middle of the patch in the antenna-2 for improved upper stopband rejection and less reflection coefficient. The proposed antenna ensures accurate frequency selectivity and effective radiation performance by utilizing the TM<sub>10</sub> and TM<sub>11</sub> resonant modes. The antenna is developed, fabricated, and tested experimentally on Rogers 4003C material. The proposed filtenna’s measured results show that its radiation nulls in the lower and upper rejection bands are <span><math><mrow><mo>−</mo><mn>25</mn><mo>.</mo><mn>19</mn></mrow></math></span> dB and <span><math><mrow><mo>−</mo><mn>35</mn><mo>.</mo><mn>01</mn></mrow></math></span> dB, respectively, a reflection coefficient less than <span><math><mrow><mo>−</mo><mn>14</mn></mrow></math></span> dB and a peak gain of 11 dB. Its overall dimensions measure <span><math><mrow><mn>60</mn><mo>×</mo><mn>46</mn><mo>×</mo><mn>0</mn><mo>.</mo><mn>8</mn></mrow></math></span> mm<sup>3</sup>.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155789"},"PeriodicalIF":3.0,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143828460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Pattern reconfigurable antenna with circular polarization characteristics using transmissive coding metasurface 利用透射编码元表面实现具有圆极化特性的图案可重构天线

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-11 DOI: 10.1016/j.aeue.2025.155795

Gandham V. Vinod, Vikas V. Khairnar

{"title":"Pattern reconfigurable antenna with circular polarization characteristics using transmissive coding metasurface","authors":"Gandham V. Vinod, Vikas V. Khairnar","doi":"10.1016/j.aeue.2025.155795","DOIUrl":"10.1016/j.aeue.2025.155795","url":null,"abstract":"<div><div>In this paper, a pattern reconfigurable antenna with circular polarization characteristics is presented. The proposed antenna comprises a circularly polarized (CP) source antenna element along with transmissive coding metasurface (TCMS) as a superstrate. The CP source antenna element is designed using two distinct approaches referred to as antenna 1 and antenna 2. Antenna 1 includes a dual-feed CP patch with a 3-dB hybrid coupler. The antenna 2 incorporates an unequal-length cross-slot, and a 25 × 25 artificial magnetic conductor (AMC) is placed below the source antenna. Both antenna 1 and antenna 2 feature a 7 × 7 dual-polarized TCMS as the superstrate. Three PIN diodes are used in the unit cell to regulate transmission. The proposed antenna performance is verified in eight different operational states, enabling CP beam steering along the <span><math><mrow><mi>y</mi><mi>z</mi></mrow></math></span>-plane. The antenna 1 provides CP beam steering from <span><math><mo>−</mo></math></span>18° to 22°, with an overall <span><math><mo>−</mo></math></span>10 dB impedance bandwidth of 2.2% and an axial ratio bandwidth of 1.7%. The antenna 2 provides CP beam steering from <span><math><mo>−</mo></math></span>34° to 22°, offering a wider bandwidth of 9.5% and an axial ratio bandwidth of 7.3%. The proposed antennas are fabricated and tested, showing good agreement between simulated and measured results.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155795"},"PeriodicalIF":3.0,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143828461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design and performance analysis of a DNG metamaterial-enhanced underwater MIMO antenna array for reliable underwater communication

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-09 DOI: 10.1016/j.aeue.2025.155772

Bhagya Sri N.K. Kagitha , Kalyanbrata Ghosh , Ujjal Chakraborty

{"title":"Design and performance analysis of a DNG metamaterial-enhanced underwater MIMO antenna array for reliable underwater communication","authors":"Bhagya Sri N.K. Kagitha , Kalyanbrata Ghosh , Ujjal Chakraborty","doi":"10.1016/j.aeue.2025.155772","DOIUrl":"10.1016/j.aeue.2025.155772","url":null,"abstract":"<div><div>This paper presents the design and performance analysis of a novel 2 × 1 MIMO (multiple-input multiple-output) antenna array for reliable communication across multiple frequency bands in surface and submerged environments. The antenna incorporates double negative metamaterials(DNG) in the superstrate to enhance isolation, improve gain, and optimize efficiency. Operating at 1.31-1.37 GHz (L-band), 1.88-1.95 GHz, 2.2-2.32 GHz, 2.63-2.69 GHz (S-band) and 2.82-2.95 GHz (S-Band), it demonstrates strong multiband performance. Performance metrics such as return loss, VSWR, total active reflection coefficient (TARC), envelope correlation coefficient (ECC), and directivity are evaluated through simulations and experiments. The antenna achieves a maximum gain of 12.27 dBi and a TARC value of -22.32 dB at 2.25 GHz, with minimal mismatch loss and high efficiency of 81.3%, even when tested under dynamic underwater conditions. Electromagnetic analysis, including E-field distributions and surface current density plots, highlights the role of the DNG superstrate in wave manipulation and isolation enhancement. The proposed design demonstrates significant performance improvements, positioning it as a promising solution for underwater communication in marine exploration, underwater navigation, and remote sensing applications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155772"},"PeriodicalIF":3.0,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143814973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Gain and axial ratio bandwidth enhancement of circularly polarised antenna using PRMS

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-08 DOI: 10.1016/j.aeue.2025.155797

Rohit Khandekar, Deepika Sipal

{"title":"Gain and axial ratio bandwidth enhancement of circularly polarised antenna using PRMS","authors":"Rohit Khandekar, Deepika Sipal","doi":"10.1016/j.aeue.2025.155797","DOIUrl":"10.1016/j.aeue.2025.155797","url":null,"abstract":"<div><div>This article presents a 9 × 9 partially reflective metasurface (PRMS) array used to form a Fabry-Perot cavity (FPC) to enhance gain and enhance 3 dB axial ratio bandwidth (ARBW) of the wideband circularly polarised (CP) antenna. The bottom side of the PRMS unit cell produces high reflectivity, while the top side yields positive phase gradience. The CP feeder resonates from 10.26 GHz to 12.19 GHz, and AR < 3 dB is from 10.84 GHz to 11.63 GHz and elliptical polarisation (EP) is observed at 10 GHz and 12 GHz. Which is leveraged in the FPC configuration to convert EP into CP waves, thus enhancing ARBW. The proposed FPC antenna resonates from 9.9 GHz to 12.31 GHz and has enhanced ARBW below 3 dB from 9.9 GHz to 12.21 GHz. The enhanced ARBW of 2.31 GHz overlaps 2.41 GHz of impedance BW. The maximum enhanced gain at 10 GHz is 17.1 dBi from 7.3 dBi. The proposed antenna is right-hand circularly polarised (RHCP), and the total profile is 2.6 λ<sub>0</sub> × 2.6 λ<sub>0</sub> × 0.52 λ<sub>0</sub> only (where λ<sub>0</sub> is free space wavelength at 9.9 GHz), which can be installed on 1U-Cube Sat.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155797"},"PeriodicalIF":3.0,"publicationDate":"2025-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143823471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-speed convolutional neural networks using parallel prefix adders

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-07 DOI: 10.1016/j.aeue.2025.155791

Butchi Babu Sarnala, Siva Ramakrishna Pillutla

{"title":"High-speed convolutional neural networks using parallel prefix adders","authors":"Butchi Babu Sarnala, Siva Ramakrishna Pillutla","doi":"10.1016/j.aeue.2025.155791","DOIUrl":"10.1016/j.aeue.2025.155791","url":null,"abstract":"<div><div>Many deep learning applications, particularly image processing, frequently utilize convolutional neural networks (CNNs) due to their remarkable accuracy. However, the heavy computational demands of CNNs pose a challenge for high-speed applications. First, this work introduces a delay efficient hybrid-parallel prefix adder (HPPA) where the total delay is minimized by changing black and gray cell paths. The proposed adder achieves lowest delay compared to the other available PPA adders. It achieves 10.64% reduction in total delay compared to recent PPA Adders. Secondly, we have employed the proposed HPPA adder to obtain a high-speed LeNet CNN architecture. Integration of the proposed hybrid adder into the LeNet CNN architecture significantly reduces the delay in the convolution layer. FPGA implementations of the proposed PPA adder and convolutional layer of LeNet architecture are performed. The proposed PPA adder achieves a 3.05% delay improvement while the critical path delay of the LeNet CNN is reduced by 16.78% compared to the relevant implementations. The implemented LeNet architecture using the proposed delay-efficient PPA adder offers a promising solution for deploying CNNs at high speed applications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155791"},"PeriodicalIF":3.0,"publicationDate":"2025-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A review of the state-of-the-art in fractional-order analog filters

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-04 DOI: 10.1016/j.aeue.2025.155786

Yunus Emre Yokuş , Jaroslav Koton , Roman Sotner , Aslihan Kartci , Umut Engin Ayten

{"title":"A review of the state-of-the-art in fractional-order analog filters","authors":"Yunus Emre Yokuş , Jaroslav Koton , Roman Sotner , Aslihan Kartci , Umut Engin Ayten","doi":"10.1016/j.aeue.2025.155786","DOIUrl":"10.1016/j.aeue.2025.155786","url":null,"abstract":"<div><div>Today, there is a great tendency toward using fractional calculus to solve engineering problems. The analog filters are one of the fields in which fractional calculus has attracted significant attention. The invention of the fractance device has led to the possibility of exploring analog filtering techniques from a practical perspective, enlarging the horizon to a wider frequency range, with increased robustness to component variation, stability and noise reduction. In addition to the use of fractance device, fractional-order analog filters (FOAFs) can also be realized by integer-order approximation of the <span><math><msup><mrow><mi>s</mi></mrow><mrow><mi>α</mi></mrow></msup></math></span>, optimization and curve fitting techniques (power-law/double-order) methods. The design of FOAFs is thoroughly studied and presented in a manifold of research works, mostly from a theoretic perspective. Most of these papers present the physical realization of the proposed FOAF from a conceptual perspective. This survey paper gives an account of the progress made on the evolution of FOAFs so far and highlights several unresolved problems and issues, including the lack of standardization in design methods, challenges in realizing fractional operators in hardware, complications related to parameter sensitivity and tuning, computational complexity and efficiency, stability analysis and robustness, difficulties in integrating with emerging technologies, and scalability challenges. Furthermore, the supremacies of having a near-ideal FO behavior in filter application are stated and the significant advantages of FOAFs against integer-order analog filters (IOAFs) are emphasized. The paper, thus, presents the current state-of-the art of FOAFs by providing an appraisal of a variety of realizations of FOAFs.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155786"},"PeriodicalIF":3.0,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143822356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A compact low phase-noise reconfigurable voltage-controlled oscillator using tunable phase shifter

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-03 DOI: 10.1016/j.aeue.2025.155773

Upasana Nayak , Prasun Chongder , Animesh Biswas

{"title":"A compact low phase-noise reconfigurable voltage-controlled oscillator using tunable phase shifter","authors":"Upasana Nayak , Prasun Chongder , Animesh Biswas","doi":"10.1016/j.aeue.2025.155773","DOIUrl":"10.1016/j.aeue.2025.155773","url":null,"abstract":"<div><div>This article presents a reconfigurable voltage-controlled oscillator (VCO) featuring low phase noise. The design incorporates a highly selective tunable bandpass filter employing two identical stub-loaded open-loop resonators. The filter provides a fixed lower frequency band and a tunable higher band, achieving a total tuning bandwidth of 1.4 GHz. This filter, integrated into the amplifier’s feedback loop as a stabilizing element, ensures that the oscillator operates at a specific frequency within the filter’s frequency range. Reconfigurability is achieved by incorporating a tunable phase-shifter, which introduces additional phase shift to the oscillator circuit. By varying the bias voltage of the phase-shifter’s varactor diodes, the oscillator generates discrete oscillation frequencies (2.74 GHz, 3 GHz, 3.22 GHz, 3.68 GHz, 3.82 GHz and 4.22 GHz) corresponding to the tunable filter’s frequency bands without altering the physical structure of the oscillator. To validate, the proposed design is fabricated. The prototype demonstrates robust performance, achieving measured output powers of −3.97 dBm at 2.74 GHz and −4.37 dBm at 3.68 GHz. Furthermore, the measured phase noise remains low at −129.5 dBc/Hz for 2.74 GHz and −126.9 dBc/Hz for 3.68 GHz at a 1 MHz offset, demonstrating its suitability for RF applications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155773"},"PeriodicalIF":3.0,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143792325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An ultra-broadband polarization conversion metasurface for enhanced stealth and RCS mitigation in MIMO configurations

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-01 DOI: 10.1016/j.aeue.2025.155793

Madhusudhan Goud Rangula , Princy Paul , Basudev Majumder , Krishnamoorthy Kandasamy

{"title":"An ultra-broadband polarization conversion metasurface for enhanced stealth and RCS mitigation in MIMO configurations","authors":"Madhusudhan Goud Rangula , Princy Paul , Basudev Majumder , Krishnamoorthy Kandasamy","doi":"10.1016/j.aeue.2025.155793","DOIUrl":"10.1016/j.aeue.2025.155793","url":null,"abstract":"<div><div>A single-layer broadband metasurface for efficient cross-polarization conversion, aiming at improving the stealth performance of a MIMO antenna, is proposed in this work. A low-profile, minimally complex <em>meta</em>-atom and its mirror image are proposed, featuring a diagonal metallic strip and two narrow horizontal edge strips. This configuration achieves more than 90 % polarization conversion efficiency while maintaining an absolute 180-degree phase gradient between the reflected waves of the two <em>meta</em>-atoms. A chessboard metasurface with 10x10 elements, constructed with the proposed <em>meta</em>-atom and mirror image, is integrated with the slot antenna-based MIMO configuration. A slot antenna is orthogonally arranged to form a four-element MIMO configuration, ensuring high isolation exceeding 25 dB between the individual elements. The realized peak gain of this arrangement is 6.95 dBi radiating orthogonally. Monostatic, bistatic, and 3D scattering patterns of a MIMO configuration with and without metasurface are evaluated. Under oblique incidence, the metasurface demonstrates exceptional angular stability, maintaining a minimum RCS reduction of 10 dB for incidence angles up to 60°. The fabricated and optimized prototype exhibits measurement outcomes that closely correspond to the simulation results for normal and oblique incidence scenarios.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"196 ","pages":"Article 155793"},"PeriodicalIF":3.0,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143769070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 500MS/s 9-bit two-step SAR ADC with loop-unrolling

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-04-01 DOI: 10.1016/j.aeue.2025.155783

Xuanhe Zhang, Huijuan Li, Annan Wang, Hui Zeng, Zhang Zhang

{"title":"A 500MS/s 9-bit two-step SAR ADC with loop-unrolling","authors":"Xuanhe Zhang, Huijuan Li, Annan Wang, Hui Zeng, Zhang Zhang","doi":"10.1016/j.aeue.2025.155783","DOIUrl":"10.1016/j.aeue.2025.155783","url":null,"abstract":"<div><div>This paper introduces a passive transfer Two-Step asynchronous loop-unrolling successive approximation register analog-to-digital converter (Two-step LU-SAR ADC). The design employs a loop-unrolling architecture, which traditionally requires calibration operations for comparators that consume time allocated for quantization, thereby reducing speed. To address this issue, the calibration cycle of the second stage is deferred to the subsequent sampling instance by incorporating a pair of switches. This adjustment allows the entire holding time of the second stage to be dedicated to quantization. Furthermore, to overcome the comparison time limitations inherent in SAR ADCs, a novel double-tail comparator is proposed. This comparator initiates its comparison from a mid-voltage state, facilitating a faster determination of outcomes. The proposed ADC is operated at a supply voltage of 1.2 V when simulated using 65-nm CMOS technology. Post-layout simulation results demonstrate that, at a sampling speed of 500 MS/s, the proposed ADC achieves a signal-to-noise and distortion ratio (SNDR) of 53.08 dB, with a power consumption of 3.3 mW, and the figure of merit (FOMw) is 17.98 fJ/conv-step.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"195 ","pages":"Article 155783"},"PeriodicalIF":3.0,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143747519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0