Aeu-International Journal of Electronics and Communications最新文献

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Highly-miniaturized microfluidically-based frequency reconfigurable antenna diplexer employing half-mode SIRW 采用半模 SIRW 的高度微型化微流控频率可重构天线双工器
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-28 DOI: 10.1016/j.aeue.2024.155534
{"title":"Highly-miniaturized microfluidically-based frequency reconfigurable antenna diplexer employing half-mode SIRW","authors":"","doi":"10.1016/j.aeue.2024.155534","DOIUrl":"10.1016/j.aeue.2024.155534","url":null,"abstract":"<div><div>This article introduces a super-miniaturized frequency reconfigurable antenna diplexer based on microfluidic techniques. The proposed structure is developed using a half-mode substrate-integrated rectangular waveguide (HMSIRW). The antenna architecture consists of two HMSIRW cavities loaded with L-shaped slots, which are excited by two microstrip feedlines to realize two distinct radiating frequency bands. The footprint of the antenna diplexer is miniaturized by using the half-mode cavities. Further size reduction is achieved by the capacitive loading of the slots. The design evaluation, radiation mechanism, parametric analysis, and equivalent circuit model are discussed in detail. The empty fluidic vias are drilled on the bottom plane of the cavities and poured with various dielectric liquids to obtain independent frequency reconfigurability at two operating bands. For validation, a frequency reconfigurable antenna diplexer is designed, manufactured, and demonstrated experimentally. The measured results show that the return loss, isolation, and realized gains are greater than −20 dB, 28 dB, and 3.3 dBi, respectively, while ensuring small footprint of only 0.071λ<sub>g</sub><sup>2</sup>. The fabricated diplexer exhibits a frequency reconfiguration range greater than 17 % at both frequency bands.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142357738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis and design of voltage-source parallel resonant class E/F3 inverter 电压源并联谐振式 E/F3 类逆变器的分析与设计
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-27 DOI: 10.1016/j.aeue.2024.155542
{"title":"Analysis and design of voltage-source parallel resonant class E/F3 inverter","authors":"","doi":"10.1016/j.aeue.2024.155542","DOIUrl":"10.1016/j.aeue.2024.155542","url":null,"abstract":"<div><div>In this paper, a detailed mathematical analysis process of the voltage-source parallel resonant (VSPR) class <span><math><mrow><mi>E</mi><mo>/</mo><msub><mrow><mi>F</mi></mrow><mrow><mn>3</mn></mrow></msub></mrow></math></span> inverter at 50% duty ratio is proposed. Combining the advantages of VSPR class E and F inverters, the performance of the proposed inverter can be improved greatly compared to the traditional. The transistor in the VSPR class <span><math><mrow><mi>E</mi><mo>/</mo><msub><mrow><mi>F</mi></mrow><mrow><mn>3</mn></mrow></msub></mrow></math></span> inverter is satisfied with zero-voltage switching(ZVS) and zero-voltage derivative switching(ZVDS) conditions. Moreover, two design freedoms can be obtained and the proposed analysis process is based on them, which can provide more flexible selections. Finally, a VSPR class <span><math><mrow><mi>E</mi><mo>/</mo><msub><mrow><mi>F</mi></mrow><mrow><mn>3</mn></mrow></msub></mrow></math></span> inverter is fabricated and the experiment is carried out. The measured normalized peak transistor voltage decreases by 25.6%. The output power reaches 5.06 W, and the efficiency reaches 93.75%. The measured results are well agreed with the theoretical and simulated.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142357736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A simple way to achieve planar excitation of arc-shaped array feeds in two-dimensional beam-steerable spherical lens antenna 在二维波束稳定球透镜天线中实现弧形阵列馈电平面激励的简单方法
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-26 DOI: 10.1016/j.aeue.2024.155536
{"title":"A simple way to achieve planar excitation of arc-shaped array feeds in two-dimensional beam-steerable spherical lens antenna","authors":"","doi":"10.1016/j.aeue.2024.155536","DOIUrl":"10.1016/j.aeue.2024.155536","url":null,"abstract":"<div><div>In this article, a simple technique for achieving planar excitation positions of arc-shaped array feeds in a two-dimensional (2D) beam-steerable spherical lens antenna (SLA) is proposed. Specifically, a cuboid solder model is introduced to connect the feedlines of the feeds with the coaxial probe. An equivalent circuit model of the bowtie feed unit with solder is proposed to illustrate the impact of the introduced solder on the port matching. Additionally, the excitation position is altered by extending the microstrip feedline, which does not change the radiation structure of the feed nor affect its phase center. Subsequently, a homogeneous dielectric SLA with a 139-element bowtie-shaped dipole feed array is constructed to verify the planar excitation position scheme for the arc-shaped array feeds, which facilitates system integration. The theoretical calculation formulas for the beam pointing angles of numerous beams are also proposed. In the fabricated prototype, all feeds exhibit an overlapping bandwidth of 31–36.7 GHz for reflection coefficients, with the coupling less than -20 dB. The 139 switched beams cover a 2D continuous beam space of [<span><math><mo>−</mo></math></span>33°, 33°], with adjacent beam crossover levels around -4 dB. The measured peak gain is 28.7 dBi at 34.5 GHz, with an aperture efficiency of 57%.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142357737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Radar pre-sorting algorithm based on autoencoder and LSTM 基于自动编码器和 LSTM 的雷达预排序算法
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-24 DOI: 10.1016/j.aeue.2024.155535
{"title":"Radar pre-sorting algorithm based on autoencoder and LSTM","authors":"","doi":"10.1016/j.aeue.2024.155535","DOIUrl":"10.1016/j.aeue.2024.155535","url":null,"abstract":"<div><div>As the electromagnetic environment becomes increasingly complex, most current radar signal sorting methods are unsustainable. They often perform poorly when dealing with unknown radar types and low-frequency radar pulse data. This paper introduces a radar pre-sorting algorithm based on autoencoder and LSTM. The algorithm utilizes multi-dimensional information such as pulse width, carrier frequency, and time of arrival. The autoencoder network is employed to achieve automatic feature extraction and clustering, enhancing the extraction of latent features in the data. The proposed network model mainly consists of three parts: an encoding module composed of a convolutional neural network (CNN), a feature aggregation module composed of long short-term memory (LSTM), and a decoding module obtained through a convolutional autoencoder, referred to as CLDE (CNN-LSTM-Decode). The encoding module extracts features from multi-dimensional data to obtain compressed features, the feature accumulation module processes the compressed features, further extracting hidden features between pulses. Subsequently, the decoding module determines the pulse modulation type of each pulse, achieving the purpose of radar pulse signal pre-sorting. Simulation results show that this network structure effectively pre-classifies unknown radar signals and has a high recognition rate for low-frequency pulses. Additionally, CLDE exhibits high reliability and stability in environments with pulse loss.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142326865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Radiation-hardened latch design with triple-node-upset recoverability 抗辐射加固闩锁设计,具有三节点重置恢复能力
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-24 DOI: 10.1016/j.aeue.2024.155539
{"title":"Radiation-hardened latch design with triple-node-upset recoverability","authors":"","doi":"10.1016/j.aeue.2024.155539","DOIUrl":"10.1016/j.aeue.2024.155539","url":null,"abstract":"<div><div>As CMOS technology scales down the susceptibility of integrated circuits to radiation effects makes them vulnerable to single-event upsets (SEUs) that may cause the formation of soft errors. In nanometer technologies, SEUs have the potential to impact many nodes within a circuit, resulting to Multiple Node Upsets (MNUs). Several techniques have been proposed to deal with SEUs that simultaneously influence either one, two, or three nodes. This paper presents a latch design that is capable of tolerating up to triple-node upsets (TNUs). Hardware redundancy is exploited to store data in many nodes inside the latch, along with a multiple feedback scheme that provides the recovery of the correct latch state in the case of SEUs. The proposed method provides faster recovery time after an SEU, and at the same time reduced power-delay and area-power-delay products with respect to existing solutions in the literature.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142326867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Compact dual-band enhanced bandwidth 5G mm – wave MIMO dielectric resonator antenna utilizing metallic strips 利用金属带的紧凑型双频增强带宽 5G 毫米波 MIMO 介质谐振器天线
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-24 DOI: 10.1016/j.aeue.2024.155510
{"title":"Compact dual-band enhanced bandwidth 5G mm – wave MIMO dielectric resonator antenna utilizing metallic strips","authors":"","doi":"10.1016/j.aeue.2024.155510","DOIUrl":"10.1016/j.aeue.2024.155510","url":null,"abstract":"<div><div>A compact dual-band Multiple-Input Multiple-Output Dielectric Resonator Antenna with improved bandwidth for 5G mm-wave applications is presented. Two rectangular DRAs mounted on a substrate backed ground plane are excited by microstrip feed through aperture coupling. Notches cut out from center of the DRAs helps to achieve a dual-band response with improved bandwidth by exciting several modes. The isolation between the DRAs is achieved by appropriately positioning metallic strips on walls on of the DRAs. A dual-band response with enhanced bandwidth and mutual coupling reduction. The impedance bandwidth for the proposed design is between 26.5–30 GHz (12.4 %) and 34.2–40 GHz (15.6 %). The maximum isolation achieved in the lower band is 32 dB and above 45 dB in the upper band. The overall size of the design is 1.88λ<sub>o</sub> x 0.94λ<sub>o</sub> x 0.20λ<sub>o</sub>. The design procedure is described, and the role of decoupling strips are explained. A prototype is fabricated and measured to validate the proposed design.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142326863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Priority-based band sharing for secondary users in cognitive radio networks 认知无线电网络中二级用户基于优先级的频段共享
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-23 DOI: 10.1016/j.aeue.2024.155533
{"title":"Priority-based band sharing for secondary users in cognitive radio networks","authors":"","doi":"10.1016/j.aeue.2024.155533","DOIUrl":"10.1016/j.aeue.2024.155533","url":null,"abstract":"<div><div>To improve wireless spectrum utilization, cognitive radio networks (CRNs) allow secondary users (SUs) opportunistic access to the frequency bands owned by primary users (PUs), when such PUs are inactive. A fully distributed CRN architecture is quite favorable, as it does not require any centralized scheduling, nor does it require coordination between SUs via a common control channel. This can reduce cost and avoid single point-of-failure issues. However, uncoordinated access to the spectrum by competing SUs, if not done judiciously, can cause excessive collisions and limit performance, which can be detrimental to the usefulness of CRNs, especially if some SUs have urgent traffic to send. Hence, we present a novel protocol to support traffic with multiple classes of priority within a fully distributed CRN. In such protocol, competing SUs attempt to access the spectrum autonomously, but rationally, based on their priority level, opting to transmit their packets when it is beneficial to both the SU itself and also to the overall system performance. Simulations confirm that the proposed protocol achieves excellent overall network performance, while ensuring that higher priority packets experience higher throughput and smaller delay compared to lower priority packets.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142326866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Pico-ampere resolution current measurement circuit using Gm-C filter sigma-delta modulator for low-power nanopore DNA sequencing 使用 Gm-C 滤波器 sigma-delta 调制器的皮安培分辨率电流测量电路,用于低功耗纳米孔 DNA 测序
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-19 DOI: 10.1016/j.aeue.2024.155508
{"title":"Pico-ampere resolution current measurement circuit using Gm-C filter sigma-delta modulator for low-power nanopore DNA sequencing","authors":"","doi":"10.1016/j.aeue.2024.155508","DOIUrl":"10.1016/j.aeue.2024.155508","url":null,"abstract":"<div><div>New generation DNA sequencers use an array of electrochemical cells equipped with nanopores, which produce pico-ampere current levels. Due to the large number of channels, low current levels and bandwidths in the order of a few kHz, in the design of these readout circuits, 2D arrays of in-channel, low noise and low power analog to digital converters are preferred. Previously many different sigma-delta modulators have been presented to convert the nanopore current signal into a digital code. Conventionally, the opamps required in these converters will eventually increase the power dissipation of each channel. In this paper a novel Gm-C filter based second order sigma-delta converter is proposed. In the given design, rather than relying on multiple opamps to achieve the necessary gain and noise performance, only a 4 transistor Gm block is used. Evaluations show that while the input referred noise remains close to previous methods, the power dissipation is considerably reduced. A prototype is also implemented to show the effectiveness of the approach. In a 180-nm design, an ENOB of 12.16 bits, RMS input referred noise of 0.2 pA at 10 kHz bandwidth and power dissipation of 8.27 μW is obtained per channel.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142316096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation and analysis of design techniques for ultra-wideband CMOS on-chip dipole antennas for 6G sub-THz applications 针对 6G sub-THz 应用的超宽带 CMOS 片上偶极子天线设计技术的研究与分析
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-18 DOI: 10.1016/j.aeue.2024.155532
{"title":"Investigation and analysis of design techniques for ultra-wideband CMOS on-chip dipole antennas for 6G sub-THz applications","authors":"","doi":"10.1016/j.aeue.2024.155532","DOIUrl":"10.1016/j.aeue.2024.155532","url":null,"abstract":"<div><p>This article explores different techniques to improve the impedance bandwidth of on-chip dipole antennas in the sub-THz frequency range. Increasing the area of the dipole antenna has shown considerable improvement in bandwidth. However, this violates the design rule checks (DRC) of the foundry. Various topologies, such as squared-slotted dipole, meandered-slotted dipole, and straight-slotted dipole antennas, are introduced and implemented to increase the width of the on-chip antennas and thus the impedance bandwidth while meeting the DRC rules. All three topologies show better performance in terms of providing improved bandwidth. The straight-slotted technique is adopted as it offers less complexity and flexibility. The behavior of the impedances for different widths implemented by the straight-slotted topology has been analyzed in detail. A 6-strip straight-slotted dipole antenna results in an ultra-wide impedance bandwidth ranging from 76–262 GHz with a fractional bandwidth of 110% and a gain of −0.6 dBi at 159 GHz, while occupying a small silicon area of <span><math><mrow><mn>567</mn><mspace></mspace><mi>μ</mi><mi>m</mi><mo>×</mo><mn>112</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span>. To the best of the authors’ knowledge, this is the highest fractional bandwidth that is reported to date at these frequencies.</p></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142270583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An exponential variation based PSO for analog circuit sizing in constrained environment 基于指数变化的 PSO,适用于受限环境中的模拟电路选型
IF 3 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-17 DOI: 10.1016/j.aeue.2024.155531
{"title":"An exponential variation based PSO for analog circuit sizing in constrained environment","authors":"","doi":"10.1016/j.aeue.2024.155531","DOIUrl":"10.1016/j.aeue.2024.155531","url":null,"abstract":"<div><p>This work presents an Exponential Variation based Particle Swarm Optimization (EV-PSO) algorithm to improve the convergence rate and find an optimal solution to analog circuit optimization problems in a constrained-driven environment. Existing evolutionary algorithms have a lower convergence rate leading to higher design time. This work introduces two novel parameters, <span><math><msub><mrow><mi>ζ</mi></mrow><mrow><mn>1</mn></mrow></msub></math></span> and <span><math><msub><mrow><mi>ζ</mi></mrow><mrow><mn>2</mn></mrow></msub></math></span>, into the velocity update equation. These parameters dynamically vary with the number of iterations. The algorithm was implemented on the Python platform. The results have shown that, in comparison to the considered existing methods, the exponential variation of the parameters <span><math><msub><mrow><mi>ζ</mi></mrow><mrow><mn>1</mn></mrow></msub></math></span> and <span><math><msub><mrow><mi>ζ</mi></mrow><mrow><mn>2</mn></mrow></msub></math></span> in the proposed algorithms have a larger rate of convergence. The proposed EV-PSO has a convergence rate of 27 iterations, which is 57.8%, 65.38%, and 59.1% better than the conventional PSO, differential evolution (DE) and genetic algorithm (GA) respectively. The typical design obtained from the optimal solution is verified through the simulation using 45-nm CMOS technology. The optimal solution presented in this work meets the desired input specifications within the specified constrained environment.</p></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0,"publicationDate":"2024-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S1434841124004175/pdfft?md5=ae96eacee54d840f33a6601669a1c3f4&pid=1-s2.0-S1434841124004175-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142243136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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