Aeu-International Journal of Electronics and Communications最新文献

Using Denoising Diffusion Probabilistic Models to solve the inverse sizing problem of analog Integrated Circuits

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-21 DOI: 10.1016/j.aeue.2025.155767

Pedro Eid, Filipe Azevedo, Nuno Lourenço, Ricardo Martins

{"title":"Using Denoising Diffusion Probabilistic Models to solve the inverse sizing problem of analog Integrated Circuits","authors":"Pedro Eid, Filipe Azevedo, Nuno Lourenço, Ricardo Martins","doi":"10.1016/j.aeue.2025.155767","DOIUrl":"10.1016/j.aeue.2025.155767","url":null,"abstract":"<div><div>In this paper, we focus on using Artificial Neural Networks (ANNs), particularly diffusion models, to automate the sizing of analog Integrated Circuits (ICs), given the constraints of their performance metrics. Researchers have explored various automation methods, including meta-heuristics and optimization-based approaches, to address this challenge. However, each method presents distinct drawbacks and, at times, yields inefficient results. While studies have made some attempts using ANNs, they commonly face the hurdle of the ill-posed nature of the problem exacerbated by the scarcity of databases for training the models. Therefore, this work introduces a novel approach to automate the design process by leveraging diffusion models to enhance the existing ANNs-based framework and address the limitations of previous methodologies. Specifically, Denoising Diffusion Probabilistic Model (DDPM) to tackle the inverse problem of the analog IC sizing. DDPMs employ a noising and denoising architecture, where they learn to reconstruct input distributions by progressively adding and removing noise. Once trained, the DDPM can generate new data from pure noise. We show that even a simple DDPM can sample sizing solutions in a small amount of time, which is an important steppingstone for future research. Experimental results indicate that our models successfully sized the two tested circuits with an average median error of around 6%, surpassing the state-of-the-art approaches whose error was over 60 to 70% higher. Moreover, by taking advantage of the generative capabilities of our models, we were able to generate points for targets within the dataset, with most of them showing an error below 3%. For the more challenging targets, we managed to find solutions with errors below 10%, while the supervised approaches struggled to achieve errors under 20%.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"195 ","pages":"Article 155767"},"PeriodicalIF":3.0,"publicationDate":"2025-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143695997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mitigating performance degradation of RIS due to element failures using a genetic algorithm-based sparse array strategy

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-20 DOI: 10.1016/j.aeue.2025.155770

Yangkun Zhu , Wenquan Cao , Chong He , Ning Wang , Jiemin Jing

{"title":"Mitigating performance degradation of RIS due to element failures using a genetic algorithm-based sparse array strategy","authors":"Yangkun Zhu , Wenquan Cao , Chong He , Ning Wang , Jiemin Jing","doi":"10.1016/j.aeue.2025.155770","DOIUrl":"10.1016/j.aeue.2025.155770","url":null,"abstract":"<div><div>A Genetic Algorithm (GA)-based sparse array strategy is introduced to mitigate the performance degradation of Reconfigurable Intelligent Surfaces (RIS) in satellite communication systems due to reconfigurable element failures in this paper. Such failures hinder real-time adjustment via Field Programmable Gate Array (FPGA), leading to permanent open or short circuit conditions. Modeling the remaining operational elements as sparse array elements and optimizing their states with a GA, a new compensation phase distribution can be obtained. Based on this optimized result, the phase states of the remaining operational elements can be dynamically adjusted using an FPGA, thereby mitigating the degradation in RIS radiation performance. This study systematically analyzes the impact of varying failure rates on RIS performance and evaluates the effects of different beam steering angles at a failure rate of 50 % with identical failed elements. The experimental results show the RIS performance enhancement, with a maximum peak gain improvement of 3.26 dB under varying failure rates and 7.1 dB with different beam steering angles.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"195 ","pages":"Article 155770"},"PeriodicalIF":3.0,"publicationDate":"2025-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143686075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Selective harmonic Elimination using Dwarf mongoose optimization in Single-Phase Seven-Level switched capacitor inverter with reduced components

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-18 DOI: 10.1016/j.aeue.2025.155768

Ankit Singh , Vibhu Jately , Peeyush Kala , Rahul Singhal , Yongheng Yang

{"title":"Selective harmonic Elimination using Dwarf mongoose optimization in Single-Phase Seven-Level switched capacitor inverter with reduced components","authors":"Ankit Singh , Vibhu Jately , Peeyush Kala , Rahul Singhal , Yongheng Yang","doi":"10.1016/j.aeue.2025.155768","DOIUrl":"10.1016/j.aeue.2025.155768","url":null,"abstract":"<div><div>The advancement of high-performance multilevel inverters is essential for contemporary power electronics applications. Nonetheless, attaining a compact topology that offers high gain, minimized component count, and enhanced harmonic mitigation continues to pose a difficulty. This study presents a single-phase seven-level switched capacitor multilevel inverter (SCMLI) that employs ten switches, two capacitors, and a single DC source, utilizing the self-voltage balancing properties of switched capacitors to eliminate the necessity for auxiliary circuits or complex control mechanisms. The Dwarf Mongoose Optimization Algorithm (DMOA) improves the optimization of switching angles, hence enhancing selective harmonic removal and providing substantial control over individual harmonics. Comparative analysis and experimental results validate the inverter’s resilience and exceptional performance, exhibiting a threefold voltage gain. Moreover, DMOA surpasses conventional and state-of-the-art optimization algorithms in terms of both speed and convergence accuracy, and achieves the best accuracy of around <span><math><mrow><mn>1</mn><mo>×</mo><msup><mrow><mn>10</mn></mrow><mrow><mo>-</mo><mn>52</mn></mrow></msup></mrow></math></span> which helps in significant reductions in the overall harmonic distortion, especially in the 5th and 7th harmonics. The inverter’s effectiveness in reducing switching losses, attributed to its low switching frequency and high operating efficiency, makes it an effective option for industrial applications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"195 ","pages":"Article 155768"},"PeriodicalIF":3.0,"publicationDate":"2025-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143686073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Implementation of chaining in operant conditioning by a neural network circuit

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-13 DOI: 10.1016/j.aeue.2025.155760

Bei Chen, Fazhan Liu, Ning Wang, Han Bao, Quan Xu

{"title":"Implementation of chaining in operant conditioning by a neural network circuit","authors":"Bei Chen, Fazhan Liu, Ning Wang, Han Bao, Quan Xu","doi":"10.1016/j.aeue.2025.155760","DOIUrl":"10.1016/j.aeue.2025.155760","url":null,"abstract":"<div><div>Chaining training is an effective training method in operant conditioning to help agents learn complex tasks that must occur in a specific sequential order. This approach deconstructs a complex task into its constituent components and systematically teaches each component in a step-by-step manner. This paper presents a memristive neural network circuit to implement chaining training in operant conditioning. The whole circuit is constructed from several single-behavioral training circuits connected in sequence, with the action output of one circuit serving as the cue input of the subsequent one. The single-behavioral training circuit consists of time-delay modules, a reward adjustment module, and a read/write circuit for synapse weight. This single-behavioral training circuit not only simulates basic processes in operant conditioning, but also demonstrates that the training speed continues to decrease due to reward fatigue. By introducing multiple rewards, the impact of reward fatigue can be mitigated. Chaining training is also successfully implemented for a two-step target task. Finally, this neural network circuit is applied to assembly robots, enabling them to perform grasping and installation tasks adaptively. This work has significant application potential in the field of industrial robotics.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155760"},"PeriodicalIF":3.0,"publicationDate":"2025-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143628119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A robust noise power and SNR estimator for MCIK OFDM systems over-generalised α-μfading channel with imperfect CSI

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-13 DOI: 10.1016/j.aeue.2025.155763

Bandi Narasimha Rao, Anuradha Sundru

{"title":"A robust noise power and SNR estimator for MCIK OFDM systems over-generalised α-μfading channel with imperfect CSI","authors":"Bandi Narasimha Rao, Anuradha Sundru","doi":"10.1016/j.aeue.2025.155763","DOIUrl":"10.1016/j.aeue.2025.155763","url":null,"abstract":"<div><div>Estimating the noise power and signal-to-noise ratio (SNR) are the core issues in any communication system. This paper introduces a novel algorithm to calculate the noise power and SNR for multi-carrier index keying (MCIK)-based orthogonal frequency division multiplexing (OFDM) systems operating over a generalised <span><math><mi>α</mi></math></span>-<span><math><mi>μ</mi></math></span> fading channel. The impact of imperfect channel state information (CSI) uncertainty on the performance of the proposed estimator is investigated. An efficient algorithm is introduced on the transmitter side to transmit the nulled subcarriers effectively. Similarly, another effective algorithm is developed at the receiver side to identify the position of transmitted nulled subcarriers, as these positions are not fixed in the MCIK OFDM system. The average SNR, along with the average noise power is determined. The proposed estimator’s performance is compared with the Preamble, Boumard, Ren’s, Pilot, MMSE, CAZAC, and correlation-based CP-less estimators of OFDM systems. Additionally, the performance is also analysed using mean square error (MSE). The proposed estimator significantly improves spectral efficiency (SE) and energy efficiency (EE). It also achieves lower MSE over the existing estimators.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155763"},"PeriodicalIF":3.0,"publicationDate":"2025-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143641727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Metamaterial inspired Ultra-Thin Polarization-Separated UWB FSS to mitigate Ku and K-Band electromagnetic interference

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-11 DOI: 10.1016/j.aeue.2025.155764

Srimita Coomar , Rajarshi Sanyal , Santanu Mondal

{"title":"Metamaterial inspired Ultra-Thin Polarization-Separated UWB FSS to mitigate Ku and K-Band electromagnetic interference","authors":"Srimita Coomar , Rajarshi Sanyal , Santanu Mondal","doi":"10.1016/j.aeue.2025.155764","DOIUrl":"10.1016/j.aeue.2025.155764","url":null,"abstract":"<div><div>A novel design approach is proposed for a sub-wavelength ultrathin (0.00973λ<sub>0</sub>) hexagonal snowflake-like fractal configured and diagonally coupled resonator-based frequency selective surface (DCR-FSS), where λ<sub>0</sub> is the lower stop band wavelength in free space. The proposed DCR-FSS demonstrates excellent polarization separation characteristics, revealing a single transmission zero (TZ) in TE mode and dual TZs in TM mode, while maintaining |S<sub>21</sub> |≤ −10 dB from 14.6 to 26 GHz, covering the Ku and K band spectral range. Metallic gap adjustment between triangular slotted regions in corner-coupled metallic patches is utilized to finely adjust the TZ and bandwidth. Equivalent circuit models (ECM) in TE and TM modes are introduced to validate the proposed design strategy. Notably, the stop band exhibits dual-negative negative index metamaterial (DNG-NIM) (Re[ε<sub>r</sub>] < 0, Re[μ<sub>r</sub>] < 0) characteristics around the corresponding TZs for both the TE and TM polarization. Furthermore, significant angular stability up to 30° angles of incidence is achieved with a 2.1 % and 2.5 % frequency deviation in TE and TM modes respectively. Eventually, the proposed design is experimentally validated for both planar and conformal surfaces, yielding results consistent with simulations and measurements.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155764"},"PeriodicalIF":3.0,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143641728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Intelligent reflecting surface assisted sparse vector coding based short packet communication for 6G wireless networks 基于智能反射面辅助稀疏矢量编码的 6G 无线网络短数据包通信

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-11 DOI: 10.1016/j.aeue.2025.155751

Dolly Kumari, Mahima Chaudhary, Shravan Kumar Bandari

{"title":"Intelligent reflecting surface assisted sparse vector coding based short packet communication for 6G wireless networks","authors":"Dolly Kumari, Mahima Chaudhary, Shravan Kumar Bandari","doi":"10.1016/j.aeue.2025.155751","DOIUrl":"10.1016/j.aeue.2025.155751","url":null,"abstract":"<div><div>Sparse vector coding (SVC) is a viable solution to tackle simultaneously the stringent requirements of achieving high reliability and low latency in short packet communications (SPC). On the other hand, the intelligent reflecting surface (IRS), a cutting-edge technology, shows more significant potential to circumvent obstructions and establish consistent communication using low-cost, energy-efficient reflecting elements. Owing to the advantages of both SVC and IRS, in this work, we integrate IRS and SVC for SPC to connect the unconnected users. We derived the probability density function of the overall cascaded wireless channel, which helped deduce the upper-bound block error rate (BLER) theoretical expressions, and the results suggest improved reliability performance compared to conventional SVC. In addition, we also observed the impact of parameters such as the number of reflecting elements, multiple antennas at the base station, position of the IRS, number of resources, amplitude reflection coefficient, and phase shift coefficient on the IRS-SVC. Further, the proposed model is tested under international telecommunication union (ITU) realistic channels, namely, extended pedestrian-A (EPA), and extended vehicular-A (EVA), and shown to be superior performance over the conventional SVC, with 20.5 dB and 21 dB respectively at BLER point of <span><math><mrow><mn>1</mn><msup><mrow><mn>0</mn></mrow><mrow><mo>−</mo><mn>4</mn></mrow></msup></mrow></math></span>. Lastly, the complexity analysis has been carried out highlighting the trade-off between the reliability and the ease of implementation for the IRS-SVC compared to the conventional SVC.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155751"},"PeriodicalIF":3.0,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143628118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Wideband omnidirectional radiation linearly polarized antenna for UHF and DTV applications

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-10 DOI: 10.1016/j.aeue.2025.155749

Shokooh Sadat Kooshki , Fatemeh Dehghani , Keivan Kaboutari , Javad Ghalibafan

{"title":"Wideband omnidirectional radiation linearly polarized antenna for UHF and DTV applications","authors":"Shokooh Sadat Kooshki , Fatemeh Dehghani , Keivan Kaboutari , Javad Ghalibafan","doi":"10.1016/j.aeue.2025.155749","DOIUrl":"10.1016/j.aeue.2025.155749","url":null,"abstract":"<div><div>An innovative wideband omnidirectional linearly polarized antenna is presented in this paper that is specially designed for Ultra-High Frequency (UHF) applications, with a particular focus on Digital Television (DTV) broadcasting. The proposed antenna operates across a frequency range of 479–808 MHz, ensuring sufficient coverage for DTV applications. Key design features include the use of four-paired crossed-dipole antennas, encircling parasitic elements, and concentric circular circles on an FR4 substrate to enhance impedance bandwidth and gain. The fabricated antenna demonstrates a measured reflection coefficient better than -15 dB over the critical 550–750 MHz frequency band, achieving a peak gain of 0.90–1.35 dBi with stable performance across its operational spectrum. Its omnidirectional radiation pattern, characterized by a 360° <span><math><mi>E</mi></math></span>-plane and 121.2° <span><math><mi>H</mi></math></span>-plane Half Power Beam Width (HPBW), makes it ideal for uniform signal coverage in DTV broadcasting. The design prioritizes compactness with dimensions of 0.56<span><math><mrow><mi>λ</mi><mo>×</mo><mn>0</mn><mo>.</mo><mn>56</mn><mi>λ</mi><mo>×</mo><mn>0</mn><mo>.</mo><mn>005</mn><mi>λ</mi></mrow></math></span>, meeting space constraints for practical deployment. Detailed simulations and experimental validation demonstrate the antenna’s effectiveness in achieving its design objectives. This work advances wideband UHF antenna technology, offering a reliable and cost-effective solution for industrial broadcasting applications. The proposed design is optimized for manufacturability, ensuring compatibility with high-volume production.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155749"},"PeriodicalIF":3.0,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143611392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A cost-effective hardware accelerator for PMDC motor-based auxiliary component automation of electric three-wheelers

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-10 DOI: 10.1016/j.aeue.2025.155766

Pratikanta Mishra , Atanu Banerjee , Mousam Ghosh , Naresh Kumar Vemula , Pramod Kumar Meher , B. Chitti Babu

{"title":"A cost-effective hardware accelerator for PMDC motor-based auxiliary component automation of electric three-wheelers","authors":"Pratikanta Mishra , Atanu Banerjee , Mousam Ghosh , Naresh Kumar Vemula , Pramod Kumar Meher , B. Chitti Babu","doi":"10.1016/j.aeue.2025.155766","DOIUrl":"10.1016/j.aeue.2025.155766","url":null,"abstract":"<div><div>In this paper, a quadral-duty digital pulse width modulation (QDPWM) control-based hardware accelerator for the auxiliary permanent magnet brushed DC (PMDC) motors of electric three-wheelers (E3Ws) is proposed. The proposed accelerator involves a precise motor speed calculation circuit, including a buffer to hold the position encoder signal for a predefined number of clock cycles to eliminate encoder signal noise. The proposed hardware accelerator is described with supporting mathematical models and is implemented on field-programmable gate array (FPGA) as well as application-specific integrated circuit (ASIC) platforms using SCL 180 nm CMOS technology library. The ASIC implementation at 12.5 MHz shows that the proposed design has significantly less area and power consumption than the conventional PI-PWM controller-based architecture and is comparable to the dual-duty digital pulse width modulation (DDPWM) controller. The proposed FPGA prototype-driven motor attains a wider speed range with low-speed ripple than DDPWM controller-based architecture. The position signal buffer circuit also enables the accelerator to tolerate noise or glitches in the position encoder signal, which makes the speed calculation precise and reliable. The proposed hardware accelerator-based PMDC drive performance has been validated regarding settling time, speed tracking ability, tolerance to dynamic speed, and load variations on a laboratory test setup.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"195 ","pages":"Article 155766"},"PeriodicalIF":3.0,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143686074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A general design methodology for Dual-Resonant topology with inherent constant current and constant voltage outputs under varying mutual inductance

IF 3 3区计算机科学

Aeu-International Journal of Electronics and Communications Pub Date : 2025-03-09 DOI: 10.1016/j.aeue.2025.155761

Yiming Zhang, Guo Wei, Chao Wang, Lianbin Cheng, Lingjun Hao, Botong Yuan

{"title":"A general design methodology for Dual-Resonant topology with inherent constant current and constant voltage outputs under varying mutual inductance","authors":"Yiming Zhang, Guo Wei, Chao Wang, Lianbin Cheng, Lingjun Hao, Botong Yuan","doi":"10.1016/j.aeue.2025.155761","DOIUrl":"10.1016/j.aeue.2025.155761","url":null,"abstract":"<div><div>To accommodate the battery charging process in wireless power transfer (WPT) systems, dual-frequency topologies capable of supporting constant current (CC) and constant voltage (CV) output modes have been extensively studied. However, most existing topologies struggle to maintain two output modes and zero phase angle (ZPA) input under varying mutual inductance (MI). To overcome this limitation, this paper proposes a general design methodology for dual-resonant topologies with inherent CC and CV outputs, ensuring that two output modes and ZPA input are maintained across different MI values. The proposed methodology begins by segmenting the topology into three parts, effectively decoupling the compensation parameters from MI, with the mode conversion and resonance of each segment designed independently. The design process first establishes the two output modes, followed by the ZPA input design. To achieve ZPA input, additional parameter constraints and topology compensation are introduced. Moreover, principles for identifying feasible compensation positions and corresponding parameter calculation methods are provided, enabling systematic and efficient topology design. Finally, based on the proposed methodology, an LCCL-LCLC compensated topology is derived. Experimental validation confirms the effectiveness and practical applicability of the proposed design approach, demonstrating its potential for enhancing the performance and reliability of WPT systems.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"194 ","pages":"Article 155761"},"PeriodicalIF":3.0,"publicationDate":"2025-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143611552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0