Feasibility of Physical Unclonable Function (PUF) implementation using the pull-up/pull-down resistances integrated in microcontrollers GPIO

IF 3.2 3区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Marco Grossi, Martin Omaña
{"title":"Feasibility of Physical Unclonable Function (PUF) implementation using the pull-up/pull-down resistances integrated in microcontrollers GPIO","authors":"Marco Grossi,&nbsp;Martin Omaña","doi":"10.1016/j.aeue.2025.156053","DOIUrl":null,"url":null,"abstract":"<div><div>Security in wireless sensor networks is usually improved by lightweight authentication and data obfuscation approaches. In such wireless networks, authentication passwords and cryptographic keys can be generated at low cost by Physical Unclonable Function (PUF) devices, that exploit the occurrence of random variations in CMOS technology parameters during manufacturing. In this paper, we study the feasibility to implement PUFs by exploiting the pull-up and pull-down resistances integrated in the General Purpose Input Output (GPIO) interface of microcontrollers. For our study, we performed experimental measurements of the considered PUF on five different STM32F103C8T6 microcontrollers, and we derived its PUF performance metrics commonly used in the literature (uniqueness, uniformity, steadiness, reliability to temperature fluctuations and reliability to power supply fluctuations). The results have shown that different groups of microcontroller pins, that are able to tolerate different maximum voltages, can be characterized by significant differences in the values of the pull-up/pull-down resistances and thus on the performance of the designed PUF. The best results have been obtained for the case of the pull-up resistances of 5 V tolerant pins, for which we have obtained a uniqueness of 44.92 %, a uniformity of 53.31 %, a steadiness of a 99.41 %, a reliability for temperature fluctuations of 97.57 %, and a reliability for power supply fluctuations of 99.84 %.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"202 ","pages":"Article 156053"},"PeriodicalIF":3.2000,"publicationDate":"2025-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1434841125003942","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Security in wireless sensor networks is usually improved by lightweight authentication and data obfuscation approaches. In such wireless networks, authentication passwords and cryptographic keys can be generated at low cost by Physical Unclonable Function (PUF) devices, that exploit the occurrence of random variations in CMOS technology parameters during manufacturing. In this paper, we study the feasibility to implement PUFs by exploiting the pull-up and pull-down resistances integrated in the General Purpose Input Output (GPIO) interface of microcontrollers. For our study, we performed experimental measurements of the considered PUF on five different STM32F103C8T6 microcontrollers, and we derived its PUF performance metrics commonly used in the literature (uniqueness, uniformity, steadiness, reliability to temperature fluctuations and reliability to power supply fluctuations). The results have shown that different groups of microcontroller pins, that are able to tolerate different maximum voltages, can be characterized by significant differences in the values of the pull-up/pull-down resistances and thus on the performance of the designed PUF. The best results have been obtained for the case of the pull-up resistances of 5 V tolerant pins, for which we have obtained a uniqueness of 44.92 %, a uniformity of 53.31 %, a steadiness of a 99.41 %, a reliability for temperature fluctuations of 97.57 %, and a reliability for power supply fluctuations of 99.84 %.
利用集成在微控制器GPIO中的上拉/下拉电阻实现物理不可克隆功能(PUF)的可行性
无线传感器网络的安全性通常通过轻量级身份验证和数据混淆方法来提高。在这种无线网络中,可以通过物理不可克隆功能(PUF)设备以低成本生成认证密码和加密密钥,该设备利用CMOS技术参数在制造过程中随机变化的发生。在本文中,我们研究了利用集成在微控制器的通用输入输出(GPIO)接口中的上拉和下拉电阻来实现puf的可行性。在我们的研究中,我们在五种不同的STM32F103C8T6微控制器上对所考虑的PUF进行了实验测量,并得出了文献中常用的PUF性能指标(唯一性,均匀性,稳定性,温度波动可靠性和电源波动可靠性)。结果表明,能够承受不同最大电压的不同微控制器引脚组,可以通过上拉/下拉电阻值的显着差异来表征,从而影响所设计的PUF的性能。以5v容限引脚的上拉电阻为例,得到了最好的结果,其唯一性为44.92%,均匀性为53.31%,稳定性为99.41%,温度波动可靠性为97.57%,电源波动可靠性为99.84%。
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来源期刊
CiteScore
6.90
自引率
18.80%
发文量
292
审稿时长
4.9 months
期刊介绍: AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including: signal and system theory, digital signal processing network theory and circuit design information theory, communication theory and techniques, modulation, source and channel coding switching theory and techniques, communication protocols optical communications microwave theory and techniques, radar, sonar antennas, wave propagation AEÜ publishes full papers and letters with very short turn around time but a high standard review process. Review cycles are typically finished within twelve weeks by application of modern electronic communication facilities.
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