{"title":"Solder Dewetting and Reliability Challenges in Microbumps Due to NCF Entrapment","authors":"Jihoon Kim;Hyoungrok Lee;Yeonseop Yu;Jungwoo Pyun","doi":"10.1109/TDMR.2025.3571531","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3571531","url":null,"abstract":"The reliability of solder joints in Cu pillar microbumps is critical for advanced packaging technologies such as 2.5D and 3D integration. As thermocompression (TC) bonding with non-conductive film (NCF) becomes widely adopted, solder dewetting caused by NCF entrapment has emerged as one of major reliability concerns. In this study, we fabricated test vehicles with controlled NCF thickness and viscosity to intentionally induce solder dewetting. These test vehicles underwent multiple reflow cycles or high-temperature storage (HTS) to examine the evolution of dewetting behavior and assess the impact of thermal budget on solder wettability. Through microstructural analysis and dewetting rate measurements, we found that intermetallic compound (IMC) growth played a key role in recurrent dewetting during successive reflows. A modeling approach was proposed to describe how the dewetting rate decreases with increasing reflow cycles due to IMC growth and the size distribution of NCF entrapment. These findings provide insight into failure mechanisms related to solder dewetting and a tool for predicting the reliability of microbump interconnects after multiple reflow cycles during advanced packaging.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"649-653"},"PeriodicalIF":2.3,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Call for Nominations for Editor-in-Chief IEEE Transactions on Semiconductor Manufacturing","authors":"","doi":"10.1109/TDMR.2025.3535976","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3535976","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"173-173"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934108","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Announcing an IEEE/Optica Publishing Group Journal of Lightwave Technology Special Issue on: OFS-29","authors":"","doi":"10.1109/TDMR.2025.3551113","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3551113","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"174-174"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934087","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Device and Materials Reliability Information for Authors","authors":"","doi":"10.1109/TDMR.2025.3549643","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3549643","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"C3-C3"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934111","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143654915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Special Issue on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS 2023) in the IEEE Transactions on Device and Materials Reliability","authors":"Luca Cassano;Mihalis Psarakis","doi":"10.1109/TDMR.2025.3544351","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3544351","url":null,"abstract":"The ten articles in this special issue present innovative research in the field of defect and fault tolerance in VLSI and nanotechnology systems and provide readers with valuable insights into the latest advances and future trends in these challenging research areas. The focus of these articles is on the reliability in the design, technology and testing of electronic devices and systems, integrated circuits, printed modules, as well as methodologies and tools used for reliability and security prediction, verification and design validation.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"2-3"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934089","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Device and Materials Reliability Publication Information","authors":"","doi":"10.1109/TDMR.2025.3549656","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3549656","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"C2-C2"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934086","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Weak Snapback Silicon Controlled Rectifier ESD Device With Double Snapback Characteristics","authors":"Zhong-Xin Wu;Yang Wang;Shuo-Xin Ji;Jun Deng;Zhen-Dong Tang","doi":"10.1109/TDMR.2025.3571056","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3571056","url":null,"abstract":"This paper investigates three Silicon Controlled Rectifier (SCR) devices employing different shunting methods to enhance the holding voltage and prevent latch-up. The operating principles of these devices are analyzed using equivalent circuits and two-dimensional (2D) device simulations, while the device performance is validated through Transmission Line Pulse (TLP) testing and curve tracer characterization. The Weak Snapback SCR (WSSCR), utilizing the third shunting method, achieves the highest holding voltage (Vh) of 7.12 V while maintaining a trigger voltage as low as 8.92 V, fully meeting the 5V ESD design requirements. Meanwhile, during high-temperature and long-pulse-width TLP testing, its Vh remains above 5.5V, meeting the latch-up immunity requirement. The WSSCR exhibits unique double-snapback characteristics. Such feature is explained by analyzing transient waveforms at various points during the TLP test and Technology Computer Aided Design (TCAD) simulations.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"401-409"},"PeriodicalIF":2.3,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145050782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Exploration of the exciting world of multifunctional oxide-based electronic devices: from material to system-level applications","authors":"","doi":"10.1109/TDMR.2025.3551112","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3551112","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"177-178"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934109","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143654925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wide Band Gap Semiconductors for Automotive Applications","authors":"","doi":"10.1109/TDMR.2025.3551111","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3551111","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 1","pages":"175-176"},"PeriodicalIF":2.5,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934110","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143655005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis of Trapping Mechanisms and Capacitance Dispersion in Double-π Gate AlGaN/GaN HEMTs Under High-Temperature Conditions","authors":"Rayabarapu Venkateswarlu;Bibhudendra Acharya;Guru Prasad Mishra","doi":"10.1109/TDMR.2025.3570841","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3570841","url":null,"abstract":"High-temperature dc and ac capacitance dispersion analysis of the double-<inline-formula> <tex-math>$pi $ </tex-math></inline-formula> gate AlGaN/GaN high electron mobility transistor (HEMT) is simulated to analyze the trapping effects. Self-heating phenomena in electronic devices degrade both performance and lifetime. Self-heating effects (SHE) lead to a rise in channel temperature, which directly impacts the bandgap (EG), mobility of the electrons (<inline-formula> <tex-math>$mu _{e}$ </tex-math></inline-formula>), electron saturation velocity (Vsat), threshold voltage (VTH), breakdown voltage (VBD), transconductance (gm), drain saturation current (IDS), output power (Pout) as well as memory effects and noise performance. To mitigate self-heating effects, a new double-<inline-formula> <tex-math>$pi $ </tex-math></inline-formula> gate HEMT is designed with the gate stem divided into three pillars. This structure redistributes the electric field and reduces phonon scattering. Notably, the device current collapse (CC) percentage drastically decreased when operated at high temperature. Capacitance dispersion is simulated using 2-D TCAD across ambient temperatures ranging from 253°K to 1098°K. Simulation results showed minimal hot electron generation and trapping effects at extreme temperatures. A slight kink effect is observed at temperatures above 773°K for gate stem distances greater than 150 nm.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"574-584"},"PeriodicalIF":2.3,"publicationDate":"2025-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}