M. Inamori, K. Motoyoshi, T. Kitazawa, K. Tara, M. Hagio
{"title":"A new GaAs variable gain amplifier MMIC with a wide-dynamic-range and low-voltage-operation linear attenuation circuit","authors":"M. Inamori, K. Motoyoshi, T. Kitazawa, K. Tara, M. Hagio","doi":"10.1109/RFIC.1999.805235","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805235","url":null,"abstract":"A 40 dB-dynamic-range variable gain amplifier designed for CDMA cellular phones has been developed. A wide dynamic range variable gain amplifier under low control voltage of 2.0 V compatible with high linearity and low distortion characteristics essential for CDMA is realized by the new gain control technique. It greatly contributes to the high performance and small size RF circuits of CDMA cellular handsets.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124416021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Q. Lee, D. Mensa, J. Guthrie, S. Jaganathan, T. Mathew, Y. Betser, S. Krishnan, S. Ceran, M. Rodwell
{"title":"66 GHz static frequency divider in transferred-substrate HBT technology","authors":"Q. Lee, D. Mensa, J. Guthrie, S. Jaganathan, T. Mathew, Y. Betser, S. Krishnan, S. Ceran, M. Rodwell","doi":"10.1109/RFIC.1999.805245","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805245","url":null,"abstract":"We report a 66 GHz emitter coupled logic (ECL) 2:1 static frequency divider using InAlAs/InGaAs transferred-substrate HBTs. To our knowledge this is the fastest static divider reported in any semiconductor technology.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122698208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Yano, Y. Nakahara, T. Hirayama, N. Matsuno, Y. Suzuki, A. Furukawa
{"title":"Ku-band Si MOSFET monolithic amplifiers with low-loss on-chip matching networks","authors":"H. Yano, Y. Nakahara, T. Hirayama, N. Matsuno, Y. Suzuki, A. Furukawa","doi":"10.1109/RFIC.1999.805253","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805253","url":null,"abstract":"We have demonstrated Ku-band (12-20 GHz) Si MOSFET monolithic amplifiers with on-chip matching networks. In these amplifiers, we used 3-/spl mu/m-thick Al-metal transmission lines on 6-/spl mu/m-thick polyimide/SiON isolation layers for the matching networks. The MOSFET amplifiers demonstrated a gain of 10 dB at about 23 GHz, the highest gain yet reported for this frequency. The bandwidth was as high as 25 GHz, which is close to f/sub max//2 of the MOSFETs. Therefore, the on-chip matching networks could provide high performance up to the Ku-band.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132988951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An RF front-end for the direct conversion WCDMA receiver","authors":"J. Ryynanen, A. Parssinen, J. Jussila, K. Halonen","doi":"10.1109/RFIC.1999.805231","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805231","url":null,"abstract":"A direct conversion RF front-end receiver chip, which can be used in the 3rd generation mobile communications, is introduced. The RF chip consists of a LNA, quadrature mixers and a 90/spl deg/ LO phase shift network. It uses a 25 GHz f/sub t/ BiCMOS process with a 0.35 /spl mu/m MOS gate length. The front-end has a 27.5 dB voltage gain, 4 dB NF (DSB), -9 dBm IIP3 and +43 dBm IIP2. It draws 41 mA from a 2.7 V supply.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125280219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Even harmonic type direct conversion receiver ICs for mobile handsets: design challenges and solutions","authors":"K. Itoh, M. Shimozawa, N. Suematsu, O. Ishida","doi":"10.1109/RFIC.1999.805238","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805238","url":null,"abstract":"This paper presents novel direct conversion receiver ICs for miniaturized mobile handsets. The configuration of a proposed even harmonic mixing technique, developed ICs and evaluation results of overall digital receivers for PHS, GSM and CDMA are described in following discussions. With the proposed technique, developed ICs achieve high dynamic range with low second order mixing products that degrade sensitivity. This proposed technique contributes to the \"receiver on chip\".","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116963770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Li Puma, O. Kromat, S. Heinen, U. Matter, W. Geppert, D. Theil, P. Schrader, M. Zannoth
{"title":"A fully-integrated BiCMOS voltage-controlled oscillator for DECT application","authors":"G. Li Puma, O. Kromat, S. Heinen, U. Matter, W. Geppert, D. Theil, P. Schrader, M. Zannoth","doi":"10.1109/RFIC.1999.805251","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805251","url":null,"abstract":"A voltage-controlled oscillator (VCO) with an integrated inductor and varactor diodes achieves -139 dBc/Hz phase noise at 6.4 MHz frequency offset in the 1880-1900 MHz DECT band. The VCO has 250 MHz tuning range and 125 MHz/V gain which is enough to compensate production tolerances. The monolithic circuit is fabricated in a 0.5 /spl mu/m 25 GHz f/sub T/ BiCMOS process.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123680188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Z.M. Shi, O. Salminen, K. Hsu, M. Wang, S. Maire, J. Vahe, E. Malo, E. Erkkila, J.M. Heikkila, K. Kaltiokallio
{"title":"A 2.7 V mixed signal processor for CDMA/AMPS cellular phones","authors":"Z.M. Shi, O. Salminen, K. Hsu, M. Wang, S. Maire, J. Vahe, E. Malo, E. Erkkila, J.M. Heikkila, K. Kaltiokallio","doi":"10.1109/RFIC.1999.805233","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805233","url":null,"abstract":"This paper describes the design approach and test results of a monolithic mixed signal processor for use in dual-mode CDMA/AMPS (IS-95A) cellular phones. The processor interfaces between RF and digital baseband blocks. It comprises of a low jitter 9.8 MHz PLL, a high speed 4/8-bit CDMA/AMPS codec, channel filters, a 12-bit FM demodulator, a low power 13-bit voice codec and speech filters. The processor design is targeted for low power applications and fabricated in a low power 0.5 /spl mu/m CMOS technology. The statistical test results measured from -30/spl deg/C to +85/spl deg/C with a standard process variation demonstrate that the system completely fulfils IS-98A CDMA handset performance specification.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124950417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Xinwei Wang, Jiang Cao, Bo Liang, E. Khoo, H. Nakamura, R. Singh
{"title":"A low quiescent current, 40% efficiency three-stage PHEMT power amplifier MMIC for PCS CDMA application","authors":"Xinwei Wang, Jiang Cao, Bo Liang, E. Khoo, H. Nakamura, R. Singh","doi":"10.1109/RFIC.1999.805430","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805430","url":null,"abstract":"This paper reports a three-stage PHEMT power amplifier (PA) MMIC with low quiescent current and high power added efficiency (PAE) for 1.9 GHz PCS CDMA application. Based on an accurate extracted large signal PHEMT model, the effects of harmonic terminations as well as envelope termination to power, linearity and PAE have been investigated and the results have been applied to the PA design. The three-stage PCS CDMA PA attained over 40% PAE, 0.8-watt output power and 30 dB gain at -45 dBc adjacent channel power rejection (ACPR) under a supply voltage of 3.6 V. The total quiescent current is only 80 mA.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125074142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advances in millimeter-wave FET MMIC technology","authors":"M. Matloubian","doi":"10.1109/RFIC.1999.805256","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805256","url":null,"abstract":"There has been remarkable progress in the development of millimeter-wave FET MMICs over the last decade. Significant improvements in noise figure, gain, output power, and efficiency have been achieved at millimeter-wave frequencies. HEMT amplifiers with gain at frequencies as high as 200 GHz and fundamental HEMT oscillators at 213 GHz have been demonstrated. This paper will review recent developments of millimeter-wave FET MMICs as well as some remaining challenges.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125175335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Noise power optimization of monolithic CMOS VCOs","authors":"S. Vora, L. Larson","doi":"10.1109/RFIC.1999.805263","DOIUrl":"https://doi.org/10.1109/RFIC.1999.805263","url":null,"abstract":"A small-signal and large-signal analysis was performed on a CMOS microwave VCO and the key contributors to its phase noise were determined. These analyses were verified for a 2.0 GHz, fully integrated L-C VCO in 0.6 /spl mu/m CMOS technology and a phase noise of -103 dBc/Hz at 100 kHz frequency offset with DC power consumption of 22 mW was obtained. These noise analyses can be used to optimize the phase noise of the VCO for a given power consumption.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116996225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}