{"title":"单片CMOS压控振荡器的噪声功率优化","authors":"S. Vora, L. Larson","doi":"10.1109/RFIC.1999.805263","DOIUrl":null,"url":null,"abstract":"A small-signal and large-signal analysis was performed on a CMOS microwave VCO and the key contributors to its phase noise were determined. These analyses were verified for a 2.0 GHz, fully integrated L-C VCO in 0.6 /spl mu/m CMOS technology and a phase noise of -103 dBc/Hz at 100 kHz frequency offset with DC power consumption of 22 mW was obtained. These noise analyses can be used to optimize the phase noise of the VCO for a given power consumption.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Noise power optimization of monolithic CMOS VCOs\",\"authors\":\"S. Vora, L. Larson\",\"doi\":\"10.1109/RFIC.1999.805263\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A small-signal and large-signal analysis was performed on a CMOS microwave VCO and the key contributors to its phase noise were determined. These analyses were verified for a 2.0 GHz, fully integrated L-C VCO in 0.6 /spl mu/m CMOS technology and a phase noise of -103 dBc/Hz at 100 kHz frequency offset with DC power consumption of 22 mW was obtained. These noise analyses can be used to optimize the phase noise of the VCO for a given power consumption.\",\"PeriodicalId\":447109,\"journal\":{\"name\":\"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.1999.805263\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.1999.805263","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A small-signal and large-signal analysis was performed on a CMOS microwave VCO and the key contributors to its phase noise were determined. These analyses were verified for a 2.0 GHz, fully integrated L-C VCO in 0.6 /spl mu/m CMOS technology and a phase noise of -103 dBc/Hz at 100 kHz frequency offset with DC power consumption of 22 mW was obtained. These noise analyses can be used to optimize the phase noise of the VCO for a given power consumption.