Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,最新文献_第4页

Fabrication of a gated resonant tunneling diode with a laterally adjustable quantum dot cross-section 具有横向可调量子点截面的门控共振隧道二极管的制造

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79846

W. Kinard, M. Weichold, W. Kirk

引用次数: 0

Microwave applications of photonics circuits 光子电路的微波应用

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79850

A. Popa

{"title":"Microwave applications of photonics circuits","authors":"A. Popa","doi":"10.1109/CORNEL.1989.79850","DOIUrl":"https://doi.org/10.1109/CORNEL.1989.79850","url":null,"abstract":"Examples of the use of lightwave circuits to partition airborne systems are presented. The role of lightwave technology in future radar, communication, and electronic warfare system architectures is discussed, with particular reference to the fiber-optic guided missile and aircraft applications. The status of microwave bandwidth lightwave transmitter and receiver circuits operating 1 to 20 GHz is summarized. Laser-current-modulated transmitters are commercially available at 0.83 and 1.3 mu m for modulation frequencies <10 GHz with dynamic ranges >125 dB/Hz. LiNbO/sub 3/-based integrated optic modulators operating in the laboratory at 1.3 mu m can provide dynamic ranges >130 dB/Hz. Optical receivers are commercially available at 0.83 and 1.3 mu m with bandwidths to 10 GHz and dynamic range >130 dB/Hz. Laboratory receivers have operated to 20 GHz with similar performance. The noise floor of the optical portion of lightwave links is typically set by laser noise at a noise figure of about 40 dB. The cascaded noise figure of the link, including input and output amplifiers, is set by the gain and noise figure of the input amplifier, by the noise floor of the laser diode, and by the attenuation encountered through the active and passive optical components in the link.<<ETX>>","PeriodicalId":445524,"journal":{"name":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114221559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Electron-diffraction transistors 电子衍射的晶体管

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79841

G. Bernstein, A. Kriman

引用次数: 0

Integration of high-gain double heterojunction GaAs bipolar transistors with a LED for optical neural network application 用于光学神经网络应用的高增益双异质结砷化镓双极晶体管与LED的集成

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79852

S. Lin, J.H. Kim, J. Katz, D. Psaltis

引用次数: 4

Performance evaluation of GaAs based MODFETs 基于砷化镓的modfet的性能评价

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79825

E. Kohn, A. Lepore, H. Lee, M. Levy

{"title":"Performance evaluation of GaAs based MODFETs","authors":"E. Kohn, A. Lepore, H. Lee, M. Levy","doi":"10.1109/CORNEL.1989.79825","DOIUrl":"https://doi.org/10.1109/CORNEL.1989.79825","url":null,"abstract":"Three key aspects of AlGaAs/InGaAs/GaAs MODFETs, namely current-handling capability, signal delay, and saturated output regime, are experimentally evaluated and correlated with the heterostructure configuration. Gate lengths down to 0.1 mu m and corresponding cutoff frequencies above 140 GHz are employed. The three aspects are found to be closely interrelated. By the incorporation of an InGaAs quantum well the two-dimensional-electron-gas (2DEG) density of the materials system can be considerably extended. However, this results in only limited improvement for the FET current-handling capability above a 2DEG density of 2*10/sup 12/ cm/sup -2/. The main effect on the MODFET current gain cutoff frequency is through the reduction of the input delay as demonstrated with 0.1- mu m-gate-length devices. Extracting the same intrinsic delay time means that the electron dynamics in the channel of AlGaAs/GaAs and pseudomorphic MODFETs is very comparable. This is consistent with the fact that there is no significant change in the effective electron mass, although changes in the intervalley scattering dynamics are still expected. Open-circuit voltage gain and output conductance are strongly related to the space-charge-layer configuration on top of the channel. This is related to the recess configuration; however, for a large voltage gain a high structural aspect ratio is generally needed.<<ETX>>","PeriodicalId":445524,"journal":{"name":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128095562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

The Auger transistor 俄歇晶体管

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79855

S. Tiwari, W.I. Wang, J. East

引用次数: 0

Low temperature MBE growth of GaAs and AlInAs for high speed devices 用于高速器件的GaAs和AlInAs的低温MBE生长

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79822

M. Delaney, A. Brown, Utkarsh Mishra, C. Chou, L. Larson, L. Nguyen, J. Jensen

{"title":"Low temperature MBE growth of GaAs and AlInAs for high speed devices","authors":"M. Delaney, A. Brown, Utkarsh Mishra, C. Chou, L. Larson, L. Nguyen, J. Jensen","doi":"10.1109/CORNEL.1989.79822","DOIUrl":"https://doi.org/10.1109/CORNEL.1989.79822","url":null,"abstract":"Low-temperature GaAs buffer technology was used to fabricate high-performance 0.2- mu m-gate-length, spike-doped GaAs MESFETs. A 400.0-nm low-temperature GaAs buffer was grown by molecular beam epitaxy (MBE) at a substrate temperature of 300 degrees C. The substrate temperature was raised to 580 degrees C for a brief in situ anneal and followed by the growth of the active spike-doped GaAs MESFET structure. The peak extrinsic transconductance, g/sub m/, was 600 mS/mm with an average pinch-off voltage, V/sub po/, of -0.6 V. An output conductance, g/sub o/, of 24 mS/mm resulted in a voltage gain of 25. The extrapolated f/sub T/ of the devices was 79 GHz. Static SCFL (source-coupled FET logic) frequency dividers fabricated in this technology exhibit a maximum clock rate of 22 GHz. Low-temperature AlInAs buffer growth has been applied to GaInAs/AlInAs HEMT (high-electron-mobility transistor) devices on InP. A 250.0-nm AlInAs buffer was grown at a substrate temperature of 150 degrees C, followed by an anneal under arsenic overpressure and a GaInAs/AlInAs superlattice prior to the HEMT structure, which is grown at T=510 degrees C. Devices fabricated with 0.2- mu m gates had g/sub m/ of 670 mS/mm and g/sub o/ of 2.55 mS/mm, giving a voltage gain of 250.<<ETX>>","PeriodicalId":445524,"journal":{"name":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115143467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Electron dynamics and device physics of short-channel HEMTs: transverse-domain formation, velocity overshoot, and short-channel effects 短通道hemt的电子动力学和器件物理:横畴形成、速度超调和短通道效应

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79820

Y. Awano, M. Kosugi, S. Kuroda, T. Mimura, M. Abe

引用次数: 3

Deposited SiO/sub 2/ as the insulator for GaInAs and InP MISFETs 沉积SiO/ sub2 /作为GaInAs和InP misfet的绝缘体

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79858

P. Gardner, S. Narayan

{"title":"Deposited SiO/sub 2/ as the insulator for GaInAs and InP MISFETs","authors":"P. Gardner, S. Narayan","doi":"10.1109/CORNEL.1989.79858","DOIUrl":"https://doi.org/10.1109/CORNEL.1989.79858","url":null,"abstract":"It is shown that low-temperature-deposited SiO/sub 2/ is a good insulator for InP and GaInAs MISFETs. Long-term (16-h) 300 degrees C H/sub 2/ anneals reduce interface state density, oxide fixed charge, and C-V hysteresis. D/sub it/ values of 10/sup 10/-10/sup 11/ cm/sup 2/ eV/sup -1/ (suitable for MISFET operation) are routinely obtained. It is concluded that the hysteresis results from charge trapping at the semiconductor-insulator interface, possibly in a thin native oxide layer formed during the SiO/sub 2/ deposition, and/or from P (As) vacancies in the InP (GaInAs) surface resulting from preferential oxidation of the InP. Ion-implanted, self-aligned-gate MISFETs showed drain current drifts of approximately 5% over 10/sup 3/ s at room temperature for InP, and <2% over a 74-h period at 50 degrees C for GaInAs. The use of surface modification techniques such as P overpressure and surface sulfidation holds promise for eliminating this problem. These results and the performance of MISFETs in microwave and gigabit-rate logic demonstrate that low-temperature-deposited SiO/sub 2/ is an excellent gate insulator for InP and GaInAs MISFETs, and that these materials have great potential for high performance microwave, millimeter-wave, and gigabit-rate logic circuit applications.<<ETX>>","PeriodicalId":445524,"journal":{"name":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123707951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Calculated high frequency performance of an npn Si/sub 1-x/Ge/sub x/ HBT 计算了npn Si/sub - 1-x/Ge/sub -x/ HBT的高频性能

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Pub Date : 1989-08-07 DOI: 10.1109/CORNEL.1989.79830

M. Racanelli, D. Greve

引用次数: 1