{"title":"A review on video steganography techniques in spatial domain","authors":"Disha, K. Saini","doi":"10.1109/RDCAPE.2017.8358298","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358298","url":null,"abstract":"Steganography is a method of concealing private or delicate information inside something that emits an impression of being nothing out of regular. Diverse carrier file formats can be used, for example text documents, audio tracks, digital images, and videos. But, due to immense advancement of information over the web, video steganography has turned into a very popular decision for data hiding. In video steganography, secret information is concealed inside a video to keep it safe from gate crashers. There exists variety of techniques for hiding secret information in a video, each having their own qualities and shortcomings. However, the literature absences of sufficient review articles that talk about all techniques. On the basis of embedding method, video steganography techniques are classified into two categories namely, spatial domain and frequency domain techniques. This paper is an attempt to present a comprehensive study of various state-of-the-art video steganography methods in spatial domain developed in the past decade which are very beneficial for video steganography analysts to acquire better outcomes, high proficiency and security. The paper also suggests with recommendations to improve on existing video steganographic techniques.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115728270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High linearity and low noise shunt resistive feedback CMOSLNA in 2.4GHz ISM band","authors":"Aditi, Malti Bansal","doi":"10.1109/RDCAPE.2017.8358247","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358247","url":null,"abstract":"A shunt resistive feedback CMOS low noise amplifier (LNA) using a pi-matching network has been designed in this paper using 0.13 μm CMOS technology. The low noise amplifier is optimized for working in the 2.4 GHz frequency band range. The shunt resistive feedback topology with pi-matched input provides low noise figure, moderate gain and high linearity. Advanced Design System (ADS) software is used for simulation. The fabricated LNA uses 1.2V supply voltage and it exhibits a gain of 15.417 dB, noise figure of 1.182 dB, input reflection coefficient (S11) of −9.170 dB, reverse gain (S12) of −18.909 dB and an IIP3 of 8 dBm.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"50 37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127487745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Shijith, P. Poornachandran, V. Sujadevi, Meher Madhu Dharmana
{"title":"Breach detection and mitigation of UAVs using deep neural network","authors":"N. Shijith, P. Poornachandran, V. Sujadevi, Meher Madhu Dharmana","doi":"10.1109/RDCAPE.2017.8358297","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358297","url":null,"abstract":"Unmanned Aerial Vehicles (UAV) has become ubiquitous. While there are several applications for UAV, it is also considered as a threat to the privacy and physical security. In this work we attempt to detect the invading UAV's with a goal of disabling them when they are invading a physical space. Identification of the UAV is performed by analyzing the live video feeds from cameras that are from Fixed CCTV cameras and surveillance drones. We propose to use image processing using convolutional neural network (CNN) for detecting the presence of the drones. Once the invading drone is identified, the information is sent to the Signal Jammer system. Our prototype shows very promising results that encourages us to pursue in building a real-world system.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125317733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis of PWM techniques on multilevel cascaded H-Bridge three phase inverter","authors":"B. H. Kumar, M. Lokhande","doi":"10.1109/RDCAPE.2017.8358316","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358316","url":null,"abstract":"In this paper, investigation of different pulse width modulation (PWM) techniques is presented by multilevel cascaded H-Bridge (CHB) three phase inverter. The role of multilevel inverters (MLIs) has become predominant in low-medium to high voltage applications due to inherent attractive features towards power quality improvement. To control MLIs different modulation control schemes are available. The nature of the modulation technique in carrier based PWM depends on the common mode signal adding to the modulating signal. The effect of continuous and discontinuous PWM schemes on different parameters like DC bus utilization, inverter switching losses, inverter conduction losses and harmonic distortion of inverter output are presented in this paper and investigated. Simulation analyses have been carried out on five-level CHB three phase inverter under a symmetric mode of operation in the MATLAB/SIMULINK tool. For validation, hardware results are presented by using microcontroller on five-level CHB inverter.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129463854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Moulika, R. Chowdhuryb, Anindita Gangulyb, Himadri Basuc, C.K. Ramanb
{"title":"Triangular function based analysis and solution of inverted pendulum problem","authors":"B. Moulika, R. Chowdhuryb, Anindita Gangulyb, Himadri Basuc, C.K. Ramanb","doi":"10.1109/RDCAPE.2017.8358262","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358262","url":null,"abstract":"Differential equations of different types and orders are of utmost importance for mathematical modeling of control system problems. State variable method uses the concept of expressing a number of first order differential equations in vector matrix form to model and analyze/synthesize control systems. The present work takes into account the Analysis and Solution of Homogeneous and Non-homogeneous (Time invariant) Differential State Equations and solving inverted pendulum problem with this approach.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128672950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sirish Oruganti, Yatin Gilhotra, N. Pandey, R. Pandey
{"title":"New topologies for OTRA based programmable precision half-wave and full-wave rectifiers","authors":"Sirish Oruganti, Yatin Gilhotra, N. Pandey, R. Pandey","doi":"10.1109/RDCAPE.2017.8358291","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358291","url":null,"abstract":"This paper presents new topologies for programmable precision rectifiers designed using Operational Trans-Resistance Amplifiers (OTRA). Topologies for Half-Wave Rectifiers (HWR), and Full-Wave Rectifiers (FWR) working in both positive and negative rectification modes are proposed. The variation of the voltage transfer curves (VTC) with change in the bias voltage, and the ability to set the gain by reworking the resistor values are included. The functional verification of proposed circuits is carried out using Cadence Virtuoso tool using SCL's 180nm technology. Effect of process corner and temperature variations was also studied, and it is observed that the circuits are resilient.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130327421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shivam Kumar Gupta, Pramit Dutta, N. Rastogi, S. Chaturvedi
{"title":"A control algorithm for co-operatively aerial survey by using multiple UAVs","authors":"Shivam Kumar Gupta, Pramit Dutta, N. Rastogi, S. Chaturvedi","doi":"10.1109/RDCAPE.2017.8358282","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358282","url":null,"abstract":"This paper addresses a coverage path planning algorithm for multiple Unmanned Aerial vehicles (UAV). The N number of UAVs are simultaneously planning the path to survey a given region. During the path planning, they avoid to survey the user defined no fly zone or obstacles. The proposed algorithm produces M number of ways to survey the region co-operatively. Out of those M ways the best solution is suggested by an objective function. The objective function is designed to calculate paths which will most equally distribute the work among the N number of UAVs. The main advantage of multiple UAVs over single UAV is redundancy. This implies that in case of failure of any of the UAV during survey operation, other UAV will compensate for the remaining uncovered area and thereby not affect the assigned mission target. This feature also included and testing within the Algorithm.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121447526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jibi G. Thanikkal, Ashwani Kumar Dubey, M. T. Thomas
{"title":"Whether color, shape and texture of leaves are the key features for image processing based plant recognition? An analysis!","authors":"Jibi G. Thanikkal, Ashwani Kumar Dubey, M. T. Thomas","doi":"10.1109/RDCAPE.2017.8358305","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358305","url":null,"abstract":"Studies on plant identification through image processing consider shape, color and texture features of leafs. But botanist's uses leaf morphology, leaf arrangement, types of venation, leave shapes, leave bases, leaf margins and leaf apices for recognizing a plant. This paper introduces the leaf venation, leaf margin, leaf apies, and leaf bases models for improving plant leaf identification. These new features along with shape, color and feature increases the accuracy of the plant identification.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"107 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114002636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ethernet based smart energy meter for power quality monitoring and enhancement","authors":"Himshekhar Das, L. Saikia","doi":"10.1109/RDCAPE.2017.8358264","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358264","url":null,"abstract":"With the increasing demand for power accompanied by power theft, unpaid bills, power quality problems and poor utilization of energy, smart energy meters are primarily employed to monitor, control and educate customers about energy consumption. However, in India, still no clarity is observed on power quality monitoring. The power quality limits vary from state to state. No user interface exists for displaying energy consumption data. This paper implements a methodology to monitor the power quality parameters using Ethernet based smart energy meter. Energy consumption data is sent to server by the smart energy meter and stored there. Graphical programming of LabVIEW is utilized to fetch data from server and then various power quality parameters are calculated using the virtual instrumentation created. Additionally, at household level, smart energy meter indentifles appliances as inductive, capacitive and resistive and, automated method is developed to schedule loads such that the reactive power is cycled within the loads. This diminishes the need for higher dependency of reactive power from utility which improves the power factor and also defeat the usage of high cost Power Factor Correction (PFC) circuits for households.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126319727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HDL implementation of high performance 16 bit processor on FPGA","authors":"Ashutosh Gupta, Pradeep Kumar, Nikita Saxena","doi":"10.1109/RDCAPE.2017.8358250","DOIUrl":"https://doi.org/10.1109/RDCAPE.2017.8358250","url":null,"abstract":"In this work a general purpose 16 bit processor is designed and simulated on two 28nm technology based FPGA's i.e. Atrix 7 and Kintex 7. Xilinx 14.2 has been used as the design tool. Major functional blocks of the processor i.e. ALU (arithmetic and logical unit), Register, Control Unit, Decoder and PC (program counter) unit are separately designed. It has a 5 stage pipeline to increase the speed of the processor. These modules are combined and tested using the Vivado Simulator of the Xilinx 2014.2. The outputs of the two devices are compared on the power and delay. The results show that while Kintex-7 is faster in terms of both maximum delay and clock skew, it has higher power dissipation as compared to Atrix-7 FPGA.","PeriodicalId":442235,"journal":{"name":"2017 Recent Developments in Control, Automation & Power Engineering (RDCAPE)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134549429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}