Active and Passive Electronic Components最新文献

筛选
英文 中文
Design and Implementation of a Modular Bidirectional Switch Using SiC-MOSFET for Power Converter Applications 功率变换器用SiC-MOSFET模块化双向开关的设计与实现
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-10-08 DOI: 10.1155/2018/4198594
E. Maqueda, J. Rodas, S. Toledo, R. Gregor, D. Caballero, F. Gavilán, M. Rivera
{"title":"Design and Implementation of a Modular Bidirectional Switch Using SiC-MOSFET for Power Converter Applications","authors":"E. Maqueda, J. Rodas, S. Toledo, R. Gregor, D. Caballero, F. Gavilán, M. Rivera","doi":"10.1155/2018/4198594","DOIUrl":"https://doi.org/10.1155/2018/4198594","url":null,"abstract":"The bidirectional switch (Bi-Sw) is a power device widely used by power conversion systems. This paper presents a novel modular design of a Bi-Sw with the purpose of providing to beginner researchers the key issues to design a power converter. The Bi-Sw has been designed in modular form using the SiC-MOSFET device. The Bi-Sw uses the advantages of SiC-MOSFET to operate at high switching frequencies. The verification of the module is carried out experimentally by means of the implementation in a voltage regulating converter, where performance analysis, power losses, and temperature dissipation are performed.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/4198594","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44079029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Abnormal Capacitance Increasing at Elevated Temperature in Tantalum Capacitors with PEDOT:PSS Electrodes 采用PEDOT:PSS电极的钽电容器在高温下异常电容增大
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-10-01 DOI: 10.1155/2018/9864387
Q. Pan, Qiao Liu, Yuanjiang Yang, D. Tian
{"title":"Abnormal Capacitance Increasing at Elevated Temperature in Tantalum Capacitors with PEDOT:PSS Electrodes","authors":"Q. Pan, Qiao Liu, Yuanjiang Yang, D. Tian","doi":"10.1155/2018/9864387","DOIUrl":"https://doi.org/10.1155/2018/9864387","url":null,"abstract":"Due to the importance of capacitance temperature stability in precise analog circuit applications, capacitance instability at elevated temperature of 125°C was investigated in tantalum capacitors with PEDOT:PSS counter electrodes. Capacitance-voltage measurement supposed that residual ions in the PEDOT:PSS dispersion caused an accumulation of charges at the dielectric-cathode interface which contributed to an increase in the dielectric constant and resulted in the capacitance increasing at high temperature. Based on the hypothesis, water wash process was applied and capacitance dropped significantly at high temperature. This study shows that an additional water wash process is necessary to improve the capacitance temperature stability after each dispersion dip step.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/9864387","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48089632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Architecture Characteristics and Technical Trends of UHF RFID Temperature Sensor Chip 超高频RFID温度传感器芯片的结构特点及技术趋势
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-10-01 DOI: 10.1155/2018/9343241
Guofeng Zhang, Dehua Wu, Jingdun Jia, W. Gao, Qiang Cai, Wan’ang Xiao, Lina Yu, Sha Tao, Qi Chu
{"title":"Architecture Characteristics and Technical Trends of UHF RFID Temperature Sensor Chip","authors":"Guofeng Zhang, Dehua Wu, Jingdun Jia, W. Gao, Qiang Cai, Wan’ang Xiao, Lina Yu, Sha Tao, Qi Chu","doi":"10.1155/2018/9343241","DOIUrl":"https://doi.org/10.1155/2018/9343241","url":null,"abstract":"The integration of temperature sensor (TS) and UHF RFID technology has attracted wide attention theoretically and experimentally. The architecture, power consumption, temperature measurement range, accuracy, and communication distance are key indicators of the performance of UHF RFID temperature sensor chip (RID-TSC). This work aims to provide a clearer view of the development of UHF RFID-TSC integration technology. After a systematic analysis of the characteristics of ADC, TDC, and FDC used in an integrated TS, the key low-power technologies under different architectures are summarized. Through the observation of the latest researches and commercial products, the development trend of UHF RFID-TSC technology is obtained, including on-chip and off-chip coordination, multiprotocol and multifrequency support, passive wireless sensor intelligence, miniaturization, and concealment.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/9343241","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44961911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study 二维4点2电子QCA全加减法器结构及能量耗散研究
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-09-24 DOI: 10.1155/2018/5062960
Md. Abdullah-Al-Shafi, A. Bahar
{"title":"An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study","authors":"Md. Abdullah-Al-Shafi, A. Bahar","doi":"10.1155/2018/5062960","DOIUrl":"https://doi.org/10.1155/2018/5062960","url":null,"abstract":"Quantum-dot cellular automata (QCA) is the beginning of novel technology and is capable of an appropriate substitute for orthodox semiconductor transistor technology in the nanoscale extent. A competent adder and subtractor circuit can perform a substantial function in devising arithmetic circuits. The future age of digital techniques will exercise QCA as preferred nanotechnology. The QCA computational procedures will be simplified with an effective full adder and subtractor circuit. The deficiencies of variations and assembly still endure as a setback in QCA based outlines, and being capricious and inclined to error is the limitation of these circuits. In this study, a new full adder and subtractor design using unique 3-input XOR gate with cells redundancy is proposed. This designs can be utilized to form different expedient QCA layouts. The structures are formed in a single layer deprived of cross-wiring. Besides, this study is directed to the analysis of the functionality and energy depletion possessions of the outlined full adder and subtractor circuits. For the first time, QCADesigner-Energy (QD-E) version 2.0.3 tool is utilized to find the overall depleted energy. The attained effects with QCADesigner have verified that the outlined design has enhanced functioning in terms of intricacy, extent, and latency in contrast to the earlier designs. Moreover, the redundant form of full adder and subtractor has uncomplicated and robust arrangement competing typical styles.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/5062960","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44805584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
Comprehensive Optimization of Dual Threshold Independent-Gate FinFET and SRAM Cells 双阈值独立门FinFET和SRAM单元的综合优化
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-09-19 DOI: 10.1155/2018/4512924
H. Ni, Jianping Hu, Huishan Yang, Haotian Zhu
{"title":"Comprehensive Optimization of Dual Threshold Independent-Gate FinFET and SRAM Cells","authors":"H. Ni, Jianping Hu, Huishan Yang, Haotian Zhu","doi":"10.1155/2018/4512924","DOIUrl":"https://doi.org/10.1155/2018/4512924","url":null,"abstract":"Independent-Gate (IG) FinFET is a promising device in circuit applications due to its two separated gates, which can be used independently. In this paper, we proposed a comprehensive method to optimize the Dual Threshold (DT) IG FinFET devices by carrying out modulations for the gate electrode work function, oxide thickness, and silicon body thickness. Titanium nitride (TiNx) is used as the tunable work function gate electrode for good performances. The thicknesses of the gate oxide and silicon body are swept by TCAD simulations to obtain the appropriate values. The verification simulation of the optimized transistors shows that the DT IG FinFETs can realize merging parallel and series transistors, respectively, and the current characteristics of the transistors are improved significantly. By extracting the BSIM-IMG model parameters, we can simulate the circuits composed of the proposed DT IG FinFET by using HSPICE with BSIM-IMG model. As practical examples, we optimized two novel 7T SRAM cells using DT IG FinFETs. HSPICE simulation results indicate that the new SRAM cells obtain higher write margin and read static noise margin with lower leakage power consumption than the other implementations.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/4512924","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64732913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
New Pulse Width Modulation Technique to Reduce Losses for Three-Phase Photovoltaic Inverters 降低三相光伏逆变器损耗的新型脉宽调制技术
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-08-27 DOI: 10.1155/2018/4157614
M. Mnati, D. Bozalakov, A. Van den Bossche
{"title":"New Pulse Width Modulation Technique to Reduce Losses for Three-Phase Photovoltaic Inverters","authors":"M. Mnati, D. Bozalakov, A. Van den Bossche","doi":"10.1155/2018/4157614","DOIUrl":"https://doi.org/10.1155/2018/4157614","url":null,"abstract":"Nowadays, most three-phase, “off the shelf” inverters use electrolytic capacitors at the DC bus to provide short term energy storage. However, this has a direct impact on inverter lifetime and the total cost of the photovoltaic system. This article proposes a novel control strategy called a 120° bus clamped PWM (120BCM). The 120BCM modulates the DC bus and uses a smaller DC bus capacitor value, which is typical for film capacitors. Hence, the inverter lifetime can be increased up to the operational lifetime of the photovoltaic panels. Thus, the total cost of ownership of the PV system will decrease significantly. Furthermore, the proposed 120BCM control strategy modulates only one phase current at a time by using only one leg to perform the modulation. As a result, switching losses are significantly reduced. The full system setup is designed and presented in this paper with some practical results.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/4157614","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47450818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
DRV Evaluation of 6T SRAM Cell Using Efficient Optimization Techniques 基于高效优化技术的6T SRAM电池DRV评估
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-07-25 DOI: 10.1155/2018/3457284
V. Joshi, Chetan D. Nayak
{"title":"DRV Evaluation of 6T SRAM Cell Using Efficient Optimization Techniques","authors":"V. Joshi, Chetan D. Nayak","doi":"10.1155/2018/3457284","DOIUrl":"https://doi.org/10.1155/2018/3457284","url":null,"abstract":"An optimization based method which uses bisection search algorithm has been proposed to evaluate the accurate value of Data Retention Voltage (DRV) of a 6T Static Random Access Memory (SRAM) cell using 45 nm technology in the presence of process parameter variations. Further, we incorporate an Artificial Neural Network (ANN) block in our proposed methodology to optimize the simulation run time. The highest values obtained from these two methods are declared as the DRV. We noted an increase in DRV with temperature (T) and process variations (PVs). The main advantage of the proposed technique is to reduce the DRV evaluation time and for our case, we observe improvement in evaluation time of DRV by ≈46, ≈27, and ≈8 times at 25°C for 3 σ, 4 σ, and 5 σ variations, respectively, using ANN block to without using ANN block.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/3457284","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42605208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A New Fractal Multiband Antenna for Wireless Power Transmission Applications 一种用于无线电力传输的新型分形多波段天线
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-01-01 DOI: 10.1155/2018/2084747
Taoufik Benyetho, J. Zbitou, L. E. Abdellaoui, H. Bennis, A. Tribak
{"title":"A New Fractal Multiband Antenna for Wireless Power Transmission Applications","authors":"Taoufik Benyetho, J. Zbitou, L. E. Abdellaoui, H. Bennis, A. Tribak","doi":"10.1155/2018/2084747","DOIUrl":"https://doi.org/10.1155/2018/2084747","url":null,"abstract":"The Microwave Power Transmission (MPT) is the possibility of feeding a system without contact by using microwave energy. The challenge of such system is to increase the efficiency of transmitted energy from the emitter to the load. This can be achieved by rectifying the microwave energy using a rectenna system composed of an antenna of a significant gain associated with a rectifier with a good input impedance matching. In this paper, a new multiband antenna using the microstrip technology and fractal geometry is developed. The fractal antenna is validated into simulation and measurement in the ISM (industrial, scientific, and medical) band at 2.45 GHz and 5.8 GHz and it presents a wide aperture angle with an acceptable gain for both bands. The final antenna is printed over an FR4 substrate with a dimension of 60 × 30 mm2. These characteristics make the antenna suitable for a multiband rectenna circuit use.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/2084747","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64730401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design 分子fet器件电路建模与设计的VHDL-AMS仿真框架
IF 0.4
Active and Passive Electronic Components Pub Date : 2018-01-01 DOI: 10.1155/2018/6974874
M. Graziano, A. Zahir, M. A. Mehdy, G. Piccinini
{"title":"VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design","authors":"M. Graziano, A. Zahir, M. A. Mehdy, G. Piccinini","doi":"10.1155/2018/6974874","DOIUrl":"https://doi.org/10.1155/2018/6974874","url":null,"abstract":"We concentrate on Molecular-FET as a device and present a new modular framework based on VHDL-AMS. We have implemented different Molecular-FET models within the framework. The framework allows comparison between the models in terms of the capability to calculate accurate - characteristics. It also provides the option to analyze the impact of Molecular-FET and its implementation in the circuit with the extension of its use in an architecture based on the crossbar configuration. This analysis evidences the effect of choices of technological parameters, the ability of models to capture the impact of physical quantities, and the importance of considering defects at circuit fabrication level. The comparison tackles the computational efforts of different models and techniques and discusses the trade-off between accuracy and performance as a function of the circuit analysis final requirements. We prove this methodology using three different models and test them on a 16-bit tree adder included in Pentium 4 that, to the best of our knowledge, is the biggest circuits based on molecular device ever designed and analyzed.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2018-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2018/6974874","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64735875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Self-Biased Active Voltage Doubler for Energy Harvesting Systems 一种用于能量采集系统的自偏置有源倍压器
IF 0.4
Active and Passive Electronic Components Pub Date : 2017-12-03 DOI: 10.1155/2017/1650161
U. Tayyab, H. Alzaher
{"title":"A Self-Biased Active Voltage Doubler for Energy Harvesting Systems","authors":"U. Tayyab, H. Alzaher","doi":"10.1155/2017/1650161","DOIUrl":"https://doi.org/10.1155/2017/1650161","url":null,"abstract":"An active voltage doubler utilizing a single supply op-amp for energy harvesting system is presented. The proposed doubler is used for rectification process to achieve both acceptably high power conversion efficiency (PCE) and large rectified DC voltage. The incorporated op-amp is self-biased, meaning no external supply is needed but rather it uses part of the harvested energy for its biasing. The proposed active doubler achieves maximum power conversion efficiency (PCE) of 61.7% for a 200 Hz sinusoidal input of 0.8 V for a 20 K load resistor. This efficiency is 2 times more when compared with the passive voltage doubler. The rectified DC voltage is almost 2 times more than conventional passive doubler. The relation between PCE and the load resistor is also presented. The proposed active voltage doubler is designed and simulated in LF 0.15 μm CMOS process technology using Cadence virtuoso tool.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/1650161","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43816568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信