2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献

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Accurate full-chip estimation of power map, current densities and temperature for EM assessment 准确的全芯片估计功率图,电流密度和温度的EM评估
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001389
Marko Chew, A. Aslyan, J. Choy, Xin Huang
{"title":"Accurate full-chip estimation of power map, current densities and temperature for EM assessment","authors":"Marko Chew, A. Aslyan, J. Choy, Xin Huang","doi":"10.1109/ICCAD.2014.7001389","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001389","url":null,"abstract":"Full-chip power ground electro-migration assessment requires a power map, thermal map and checks for IR drops exceeding the design specifications. This paper provides a survey of the three main computation operations required to get these information.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"27 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120911439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Frequency-centric resonant rotary clock distribution network design 以频率为中心的谐振旋转时钟配电网设计
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001434
Y. Teng, B. Taskin
{"title":"Frequency-centric resonant rotary clock distribution network design","authors":"Y. Teng, B. Taskin","doi":"10.1109/ICCAD.2014.7001434","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001434","url":null,"abstract":"A frequency-centric methodology is proposed for the selection of the physical parameters of the resonant rotary clock for a target frequency. This proposed methodology is performed once for each target frequency on a semiconductor technology, in order to create a cell library of resonant rotary clock design components. A case study is performed to demonstrate the efficiency of the proposed methodology in accuracy and run-time. Simulation results show that the frequency-centric design provides a good approximation for the resonant clock distribution network. At target frequencies between 4GHz and 6GHz, the frequency difference is less than 0.20% and the run-time is reduced by approximately 70% compared to the traditional HSPICE simulation of an entire SROA network without the proposed simplifications for run-time improvement.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125007593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Design automation for biochemistry synthesis on a digital microfluidic lab-on-a-chip 基于数字微流控芯片实验室的生物化学合成自动化设计
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001364
K. Chakrabarty, B. Bhattacharya, A. Banerjee
{"title":"Design automation for biochemistry synthesis on a digital microfluidic lab-on-a-chip","authors":"K. Chakrabarty, B. Bhattacharya, A. Banerjee","doi":"10.1109/ICCAD.2014.7001364","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001364","url":null,"abstract":"Microfluidic biochips are recently being advocated for on-chip implementation of several biochemical laboratory assays or protocols [1]. Such labs-on-a-chip (LoC) have brought a complete paradigm shift in DNA analysis, toxicity grading, in molecular biology, and in drug design and delivery. This technology offers a viable and low-cost platform for reducing healthcare cost of cardiovascular diseases, cancer, diabetes, for providing point-of-care (P-o-C) health services [2, 3], and for the management of bio-terrorism threats [4]. These chips are also immensely useful for rapid and accurate diagnosis of various diseases including malaria, human immunodeficiency virus infection (HIV), acquired immunodeficiency syndrome (AIDS), and for mitigating neglected tropical diseases (NTD) prevalent in the developing countries [5].","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126248060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Architecting 3D vertical resistive memory for next-generation storage systems 为下一代存储系统设计3D垂直电阻式存储器
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001329
Cong Xu, Pai-Yu Chen, Dimin Niu, Yang Zheng, Shimeng Yu, Yuan Xie
{"title":"Architecting 3D vertical resistive memory for next-generation storage systems","authors":"Cong Xu, Pai-Yu Chen, Dimin Niu, Yang Zheng, Shimeng Yu, Yuan Xie","doi":"10.1109/ICCAD.2014.7001329","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001329","url":null,"abstract":"Resistive Random Access Memory (ReRAM) has several advantages over current NAND Flash technology, highlighting orders of magnitude lower access latency and higher endurance. Recently proposed 3D vertical cross-point ReRAM (3D-VRAM) architecture is an encouraging development in ReRAM's evolution as a cost-competitive solution, and thus attracts a lot of attention in both industry and academia. In this work, an array-level model to estimate the read/write energy and characterize the vertical access transistor is developed. We use the model to study a range of design trade-offs by tuning the cell-level characteristics and the read/write schemes. The design space exploration addresses several critical issues that are either unique to 3D-VRAM or have substantially different concerns from the 2D cross-point array design. It provides insights on the design optimizations of the array density and access energy, and several important conclusions have been reached. Then we propose multi-directional write driver to mitigate the writer circuitry overhead, and use remote sensing scheme to take full advantage of limited on-die sensing resources. The benefits of these optimizations are evaluated and validated in our macro-architecture model. With trace-based simulations, system-level comparisons between 3D-VRAM and a wide spectrum of memories are performed in mixed aspects of performance, cost, and energy. The results show that our optimized 3D-VRAM design are better than other contenders for storage memory in both performance and energy.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125409316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Constrained interpolation for guided logic synthesis 导向逻辑综合的约束插值
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001392
A. Petkovska, D. Novo, A. Mishchenko, P. Ienne
{"title":"Constrained interpolation for guided logic synthesis","authors":"A. Petkovska, D. Novo, A. Mishchenko, P. Ienne","doi":"10.1109/ICCAD.2014.7001392","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001392","url":null,"abstract":"Craig interpolation is a known method for expressing a target function f as a function of a given set of base functions G. The resulting interpolant represents the dependency function h, such that f = h(G). Generally, the set G contains enough base functions to enable the existence of multiple dependency functions whose quality mainly depends on which base functions were selected for reconstruction. The interpolation is not an optimisation problem and thus, often, it selects some random base functions and, particularly, omits others potentially required for an optimal implementation of the target function. Mainly, it is impossible to impose that the interpolant uses a specific base function. In this paper, we propose a method that forces a specific base function gi as a primary input of a dependency function. Such a dependency function is built as a Shannon expansion of two constrained Craig interpolants for the assignments of the primary inputs for which gi evaluates to 0 and 1, respectively. We also introduce a method that iteratively imposes a predefined set of base functions. In each iteration, we generate a new dependency function for use as the target function of the next iteration in order to force the use of a base function. We show that, unlike the standard Craig interpolation method, our carving method succeeds to impose the desired base functions with very high probability. It recomposes single-output logic circuits as their delay- or area-optimised implementations regardless of the input implementation. The proposed methods can be efficiently employed for rewriting circuits in some synthesis-based algorithms.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125940233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
High level design for wearables and IoT 可穿戴设备和物联网的高级设计
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001332
Y. Hoskote, Ilya V. Klotchkov
{"title":"High level design for wearables and IoT","authors":"Y. Hoskote, Ilya V. Klotchkov","doi":"10.1109/ICCAD.2014.7001332","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001332","url":null,"abstract":"Summary form only given. Next generation systems in such domains as wearables and Internet of Things will have capabilities for sensing, recognition and intelligence. Such systems integrate multiple hardware components including sensors, actuators, compute and communications modules together with complex software in an ultra-low power envelope. Constraints from the target user experience must also be factored in. This talk will present a top down, model-based design methodology to quickly design such systems. It follows a refinement based approach and heavily leverages high level design techniques and rapid prototyping.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121919063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On Trojan side channel design and identification 木马侧通道的设计与识别
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001363
Jie Zhang, Guantong Su, Yannan Liu, Lingxiao Wei, F. Yuan, Guoqiang Bai, Q. Xu
{"title":"On Trojan side channel design and identification","authors":"Jie Zhang, Guantong Su, Yannan Liu, Lingxiao Wei, F. Yuan, Guoqiang Bai, Q. Xu","doi":"10.1109/ICCAD.2014.7001363","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001363","url":null,"abstract":"Trojan side channels (TSCs) are serious threats to the security of cryptographic systems because they facilitate to leak secret keys to attackers via covert side channels that are unknown to designers. To tackle this problem, we present a new hardware Trojan detection technique for TSCs. To be specific, we first investigate general power-based TSC designs and discuss the tradeoff between their hardware cost and the complexity of the key cracking process. Next, we present our TSC identification technique based on the correlation between the key and the covert physical side channels used by attackers. Experimental results demonstrate the effectiveness of the proposed solution.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117016080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Co-scheduling of HVAC control, EV charging and battery usage for building energy efficiency 协同调度暖通空调控制、电动汽车充电和电池使用,以提高建筑能效
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001351
Tianshu Wei, Qidong Zhu, Mehdi Maasoumy
{"title":"Co-scheduling of HVAC control, EV charging and battery usage for building energy efficiency","authors":"Tianshu Wei, Qidong Zhu, Mehdi Maasoumy","doi":"10.1109/ICCAD.2014.7001351","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001351","url":null,"abstract":"Building stock consumes 40% of primary energy consumption in the United States. Among various types of energy loads in buildings, HVAC (heating, ventilation, and air conditioning) and EV (electric vehicle) charging are two of the most important ones and have distinct characteristics. HVAC system accounts for 50% of the building energy consumption and typically operates throughout the day, while EV charging is an emerging major energy load that is hard to predict and may cause spikes in energy demand. To maximize building energy efficiency and grid stability, it is important to address both types of energy loads in a holistic framework. Furthermore, on the supply side, the utilization of multiple energy sources such as grid electricity, solar, wind, and battery storage provides more opportunities for energy efficiency, and should be considered together with the scheduling of energy loads. In this paper, we present a novel model predictive control (MPC) based algorithm to co-schedule HVAC control, EV scheduling and battery usage for reducing the total building energy consumption and the peak energy demand, while maintaining the temperature within the comfort zone for building occupants and meeting the deadlines for EV charging. Experiment results demonstrate the effectiveness of our approach under a variety of demand, supply and environment constraints.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129732548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 36
Automated and quality-driven requirements engineering 自动化和质量驱动的需求工程
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001410
R. Drechsler, Mathias Soeken, R. Wille
{"title":"Automated and quality-driven requirements engineering","authors":"R. Drechsler, Mathias Soeken, R. Wille","doi":"10.1109/ICCAD.2014.7001410","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001410","url":null,"abstract":"This tutorial paper summarizes selective research results from the field of automated requirement engineering. Automatization is achieved by employing natural language processing techniques. We show algorithms that work directly on the natural language text and algorithms that translate natural language text to formal models. To ensure quality, we further illustrate verification algorithms that can proof correctness of the extracted formal models.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"2008 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125580882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A hardware accelerated multilevel visual classifier for embedded visual-assist systems 嵌入式视觉辅助系统的硬件加速多级视觉分类器
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2014-11-03 DOI: 10.1109/ICCAD.2014.7001338
M. Cotter, Siddharth Advani, J. Sampson, K. Irick, N. Vijaykrishnan
{"title":"A hardware accelerated multilevel visual classifier for embedded visual-assist systems","authors":"M. Cotter, Siddharth Advani, J. Sampson, K. Irick, N. Vijaykrishnan","doi":"10.1109/ICCAD.2014.7001338","DOIUrl":"https://doi.org/10.1109/ICCAD.2014.7001338","url":null,"abstract":"Embedded visual assist systems are emerging as increasingly viable tools for aiding visually impaired persons in their day-to-day life activities. Novel wearable devices with imaging capabilities will be uniquely positioned to assist visually impaired in activities such as grocery shopping. However, supporting such time-sensitive applications on embedded platforms requires an intelligent trade-off between accuracy and computational efficiency. In order to maximize their utility in real-world scenarios, visual classifiers often need to recognize objects within large sets of object classes that are both diverse and deep. In a grocery market, simultaneously recognizing the appearance of people, shopping carts, and pasta is an example of a common diverse object classification task. Moreover, a useful visual-aid system would need deep classification capability to distinguish among the many styles and brands of pasta to direct attention to a particular box. Exemplar Support Vector Machines (ESVMs) provide a means of achieving this specificity, but are resource intensive as computation increases rapidly with the number of classes to be recognized. To maintain scalability without sacrificing accuracy, we examine the use of a biologically-inspired classifier (HMAX) as a front-end filter that can narrow the set of ESVMs to be evaluated. We show that a hierarchical classifier combining HMAX and ESVM performs better than either of the two individually. We achieve 12% improvement in accuracy over HMAX and 4% improvement over ESVM while reducing computational overhead of evaluating all possible exemplars.","PeriodicalId":426584,"journal":{"name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134257692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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