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2022 International Conference on Electronics Packaging (ICEP)最新文献

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Glove-shaped wearable device using flexible MEMS sensor 采用柔性MEMS传感器的手套形可穿戴设备
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795402
Ayana Mizutani, S. Takamatsu, T. Itoh, Zymelka Maria, Takeshi Kobayashi
{"title":"Glove-shaped wearable device using flexible MEMS sensor","authors":"Ayana Mizutani, S. Takamatsu, T. Itoh, Zymelka Maria, Takeshi Kobayashi","doi":"10.23919/ICEP55381.2022.9795402","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795402","url":null,"abstract":"An ultrathin Si MEMS piezoresistive strain sensor was used to fabricate a glove-shaped wearable device that can be used in VR and surgical assistance. In this paper, we proposed a mounting structure that reduces strain concentration at the connection between the sensor and the wiring. The proposed mounting structure was able to withstand strains of up to 66.9%. With this structure, we succeeded in measuring the bending motion of fingers with the constructed wearable device.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"4 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132089304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Materials Informatics Technology for Using Bio-based Materials 应用生物基材料的材料信息技术
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795627
T. Iwasaki
{"title":"Materials Informatics Technology for Using Bio-based Materials","authors":"T. Iwasaki","doi":"10.23919/ICEP55381.2022.9795627","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795627","url":null,"abstract":"A materials-informatics technology for designing stable and strong interfaces has been developed by use of advanced molecular simulation that can calculate the delamination energy as the adhesion strength. Because biobased materials such as a plant-derived resin (polyamide 11) and DNAs are eco-friendly materials with carbon neutrality, these materials are considered as semiconductor package substrates and insulating materials. So, the developed informatics technology is applied to the interfaces between polyamide 11 and ceramics used as fillers. At the first stage, the lattice constants were selected as the important, dominant ceramic parameters from four ceramic parameters (the shortside and long-side lattice constants, surface energy density, and cohesive energy) by using sensitivity analysis based on the orthogonal array with the delamination-energy data calculated from advanced molecular simulation. At the second stage, the adhesion strength (delamination energy) is expressed as a function of the important ceramic parameters (i.e., the short-side and long-side lattice constants) by using a response-surface method (Kriging method). At the third stage, by solving the maximum-value problem of the function, it was found that the strongest interface was obtained when the lattice misfits between ceramics and polyamide 11 were zero. By using yttria-doped zirconia as a ceramic material, the strongest interface between polyamide 11 and ceramics was obtained because the coherent interface with no lattice misfit was obtained.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115591989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Subcooled boiling in a liquid chamber for high heat flux cooling 在高热流密度冷却的液体室中进行过冷沸腾
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795426
Kodai Murabe, N. Unno, K. Yuki, Koichi Suzuki
{"title":"Subcooled boiling in a liquid chamber for high heat flux cooling","authors":"Kodai Murabe, N. Unno, K. Yuki, Koichi Suzuki","doi":"10.23919/ICEP55381.2022.9795426","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795426","url":null,"abstract":"A compact cooling device, which can remove a high heat flux, is needed for next-generation electronics, such as power semiconductors. Boiling heat transfer (BHT) is a promising cooling technology because the heat transfer coefficient of BHT is much higher than that of conventional single-phase flow cooling. On the other hand, boiling characteristics using a compact vessel must be investigated to downsize the cooling devices using BHT. In this study, subcooled boiling characteristics are investigated using a liquid chamber. In particular, the control method of liquid subcooling in the liquid chamber was experimentally examined. As a result, the experimental result suggests that the liquid subcooling should be kept at high to remove a high heat flux using microbubble emission boiling even when a liquid chamber was operated at low pressure with water.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114293759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Development of Photoelectric Conversion Transistor Consisting of High-power LED and Si Solar Cell 大功率LED与硅太阳能电池组成的光电转换晶体管的研制
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795501
K. Okamoto, K. Okamoto, K. Morishita, A. Okuno
{"title":"Development of Photoelectric Conversion Transistor Consisting of High-power LED and Si Solar Cell","authors":"K. Okamoto, K. Okamoto, K. Morishita, A. Okuno","doi":"10.23919/ICEP55381.2022.9795501","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795501","url":null,"abstract":"The bipolar transistor was invented in 1948 by W. Shockley at Bell Laboratories in the United States. Since then, the transistor has advanced along with the progress of integrated circuit technology, leading to today's advanced information society. Surprisingly, however, the bipolar transistor itself has not shown any significant technological progress. In this paper, we introduce the recently invented \"Distar\", a revolutionary transistor consisting of only LED and Si solar cell.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115594782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Stress and Reliability Challenges of Underfills in Large-Size Fan-Out Multichip Module Packages 大尺寸扇出多芯片模块封装中下填料的应力和可靠性挑战
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795431
W. Teng, J. Lee, Hsin-Ming Tseng, Liang-Yih Hung, Don Son Jiang, Yu-Po Wang
{"title":"Stress and Reliability Challenges of Underfills in Large-Size Fan-Out Multichip Module Packages","authors":"W. Teng, J. Lee, Hsin-Ming Tseng, Liang-Yih Hung, Don Son Jiang, Yu-Po Wang","doi":"10.23919/ICEP55381.2022.9795431","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795431","url":null,"abstract":"This study explored the impact of additives on the application of underfill in large-size fan-out multichip module packages. The experimental results of a high-temperature storage test demonstrated that the selected underfill developed cracks. Optical microscope examination of a cross section of the cracks revealed an oxidation layer. Through addition of an anti-oxidation agent to the underfill, both forming of the oxidation layer and cracking in the underfill resulting from thermal oxidation were prevented. By contrast, when an underfill without an added flexibilizer was used in the large-size fan-out multichip module package and subjected to a temperature cycling test, cracks were observed in the chip corners, which had formed because of excessive stress in the package. When both the antioxidant and flexibilizer were added to the underfill, the generation of thermal oxidation–induced and stress-induced cracks in the package was prevented.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121657060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A New Halogen-Free Vapor Phase Coating for High Reliability & Protection of Electronics in Corrosive and Other Harsh Environments 一种新型无卤素气相涂层，用于腐蚀和其他恶劣环境下的高可靠性和电子保护
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795465
Rakesh Kumar, F. Ke, Dustin England, Angie Summers, L. Young
{"title":"A New Halogen-Free Vapor Phase Coating for High Reliability & Protection of Electronics in Corrosive and Other Harsh Environments","authors":"Rakesh Kumar, F. Ke, Dustin England, Angie Summers, L. Young","doi":"10.23919/ICEP55381.2022.9795465","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795465","url":null,"abstract":"This new development solves growing issues of halogen-free reliability and corrosion protection of next-generation, flexible and highly-dense electronics in harsh environments through an ultra-thin, completely halogen free vapor-phase coating, and also as a substrate for flexible electronics. To meet the industry’s current and future requirements worldwide, this presentation introduces a new halogen-free Parylene, ParyFree, to the electronics industry and shares the characterization and qualification results of ParyFree Parylene conformal coating for the protection, reliability and robust performance of all types of electronics. Testing on the new coating includes IPX water resistance, 85/85 exposure, corrosion resistance and qualification per IPC-CC-830B.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127420373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design Optimization of power module structure for inductance reduction 减小电感的功率模块结构优化设计
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795596
M. Akimoto, Makoto Yoshida, T. Miyashita
{"title":"Design Optimization of power module structure for inductance reduction","authors":"M. Akimoto, Makoto Yoshida, T. Miyashita","doi":"10.23919/ICEP55381.2022.9795596","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795596","url":null,"abstract":"There is an unintended inductance called stray inductance in the power module. For modules with a switching function, the inductance should be reduced to make power loss during overshoot smaller. In this experiment, design variables were defined as the structure of the module, and the inductance was calculated from design variables. The design optimization was performed by the response surface methodology. As a result of calculating the performance for the optimized structure, the inductance was confirmed to be reduced by 12.1% from the original structure. The contribution distribution of each design variable to the inductance was also obtained.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127365950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Stretchable Printed Circuit Board for Wireless Light-Sensing System 用于无线光感应系统的可拉伸印刷电路板
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795470
T. Araki, Kou-Tan Li, Naoko Kurihira, Yuko Kasai, D. Suzuki, Satsuki Yasui, Y. Kawano, T. Sekitani
{"title":"Stretchable Printed Circuit Board for Wireless Light-Sensing System","authors":"T. Araki, Kou-Tan Li, Naoko Kurihira, Yuko Kasai, D. Suzuki, Satsuki Yasui, Y. Kawano, T. Sekitani","doi":"10.23919/ICEP55381.2022.9795470","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795470","url":null,"abstract":"Flexible hybrid electronics (FHE) has the potential to realize flexible and light large-area electronics by integrating the benefits of traditional semiconductor processing. In addition, printable electronics is expected to lead to resource and energy savings. In this study, we have developed stretchable printed circuit boards, with excellent ductility, on which light-emitting diodes (LEDs) and light sensors were mounted to fabricate sheet-type arrays. The technology developed herein for light-sensing systems based on light sources and detectors is expected to be used as a nondestructive method to inspect objects with arbitrary surfaces.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126904918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of Gate Pad Layout on Thermal Impedance of SiC-MOSFET 栅极板布局对SiC-MOSFET热阻抗的影响
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795453
F. Kato, S. Sato, H. Hozoji, M. Ikegawa, A. Sakai, K. Watanabe, S. Harada, H. Sato
{"title":"Effect of Gate Pad Layout on Thermal Impedance of SiC-MOSFET","authors":"F. Kato, S. Sato, H. Hozoji, M. Ikegawa, A. Sakai, K. Watanabe, S. Harada, H. Sato","doi":"10.23919/ICEP55381.2022.9795453","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795453","url":null,"abstract":"In this paper, thermal impedance (Zth) of power modules which is assembled with a silicon carbide Schottky barrier diode (SiC-SBD) and metal oxide semiconductor field effect transistor (SiC-MOSFET) was measured and compared. SiC-MOSFETs had gate pads that accounted for 6% of the die size. SiC-MOSFETs had up to 55% higher thermal impedance and 13% higher steady-state thermal resistance compared to SiC-SBDs. Although the gate pad occupies only a small area in the device chip, it was found to have a significant difference on the thermal impedance of SiC power modules, especially in the short time region.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126911497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design Consideration of 3D Power SoC Using Virtual Prototyping 基于虚拟样机的3D电源SoC设计思考
2022 International Conference on Electronics Packaging (ICEP) Pub Date : 2022-05-11 DOI: 10.23919/ICEP55381.2022.9795434
Ayano Furue, Sinei Miyasaka, Yusuke Ogushi, Riki Yamanishi, S. Matsumoto
{"title":"Design Consideration of 3D Power SoC Using Virtual Prototyping","authors":"Ayano Furue, Sinei Miyasaka, Yusuke Ogushi, Riki Yamanishi, S. Matsumoto","doi":"10.23919/ICEP55381.2022.9795434","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795434","url":null,"abstract":"3D power supply on chip (3D power SoC), which integrates Si based IC, Gallium Nitride (GaN) power devices and passive devices realizes high efficiency at high frequency switching and high-power density. Miniaturization makes 3D power SoC high temperature, thus, we have to take into consideration of the temperature effect when we design 3D power SoC. In this paper, we propose a virtual prototyping technique, which is coupling of thermal-device, heat conduction, thermal-electromagnetic, and thermal-circuit simulation to design the 3D power supply on chip.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129201920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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