Journal of Integrated Circuits and Systems最新文献_第7页

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.634

C. Claeys, J. Martino

{"title":"Guest Editors' Words","authors":"C. Claeys, J. Martino","doi":"10.29292/jics.v17i2.634","DOIUrl":"https://doi.org/10.29292/jics.v17i2.634","url":null,"abstract":"Semiconductor technology has known an exponential evolution during last decades, being the key for the further evolution of micro- and nanoelectronics and the commercial breakthrough of state-of-the-art innovative and sometimes disruptive applications. Microelectronics is fully integrated in different areas of everyday life, such as healthcare, automotive, communication, safety and security, smart energy, smart cities, retail business, etc. This evolution implies extensive research towards new materials (gate dielectrics, metallization, III-V materials, wide bandgap approaches, etc.), alternative device architectures (e.g., FinFETs, TFETs, negative capacitance, gate-all-around, nanowires, nanosheets in both horizontal or vertical configurations, SOI approaches) and optimized system functionality and density (3D integration, through silicon vias, sequential integration, SOC, and others). Besides advanced 2- and 3D transistors, also solar cells, bio-devices, organic devices are of great importance. Also the operation field of the devices, including frequency range, noise performance and temperature range, has to be optimized in function of the envisaged digital or analog application. The state-of-the-art, trends and challenges encountered during the fabrication and operation of different emerging technologies are reviewed in this special issue. Much attention is given to the excellent research being performed by different research groups at Brazilian universities and international research centers.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48507740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Millimeter-wave Wireless Integrated Systems: what to expect for future solutions 毫米波无线集成系统:对未来解决方案的期望

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.627

Ariana Lacorte Caniato Serrano, Gustavo Marcati, Igor Abe, Gustavo Palomino, G. Rehder

引用次数: 0

0.4 V Active Biased LNA for 2.4 GHz Low Energy RF Receivers 用于2.4 GHz低能量RF接收机的0.4 V有源偏置LNA

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.559

Giovana Ceolin, Lucas Compassi Severo

引用次数: 1

AV1 Arithmetic Encoder Design on Open-Source EDA 基于开源EDA的AV1算法编码器设计

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.564

Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, S. Bampi

引用次数: 0

A Novel Topology of Nonisolated DC-DC High Step up Converters for Solar PV Power Plants 一种用于太阳能光伏电站的非隔离DC-DC高升压变换器的新拓扑

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.604

S. Hosseinikavkani, R. Sedaghati, A. Ghaedi

引用次数: 0

Tunnel-FET Evolution and Applications for Analog Circuits 隧道场效应管的演化及其在模拟电路中的应用

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.631

P. Agopian, J. Martino, E. Simoen, R. Rooyackers, C. Claeys

{"title":"Tunnel-FET Evolution and Applications for Analog Circuits","authors":"P. Agopian, J. Martino, E. Simoen, R. Rooyackers, C. Claeys","doi":"10.29292/jics.v17i2.631","DOIUrl":"https://doi.org/10.29292/jics.v17i2.631","url":null,"abstract":"In this work different generations of field effect tunneling transistor (TFET) are evaluated through DC digital and analog figures of merits. For TFET devices the main digital figure of merit is the subthreshold slope (SS), while for analog application the intrinsic voltage gain (AV) is the most important one. For the early generations, that are based on silicon, the SS does not reach values smaller than 60mV/dec at room temperature, however, the AV reaches values up to 80 dB, showing to be promising for analog applications. As the TFETs were being optimized for digital applications and consequently presenting better switching performance, the intrinsic voltage gain moves in the opposite direction. This opposite trend is related to which transport mechanism is predominant for each type of device. While III-V TFETs are more dependent on Band to Band Tunneling (BTBT), silicon devices are more relying on Trap-Assisted Tunneling (TAT). While BTBT allows for faster switching, TAT is less dependent on the drain electric field, so the former favors SS while the latter favors AV. Based on the good analog behavior of silicon channel TFETs, a two-stage operational transconductance amplifier (OTA) was designed with different TFET technologies and the compared results were discussed.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44368668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Silicon Nanowire Technologies: brief review, home-made solutions and future trends 硅纳米线技术：简评、国产解决方案及未来趋势

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.614

L. Stucchi-Zucchi, Marcos Vinicius Puydinger dos Santos, Fernando César Rufino, José Alexandre Diniz

{"title":"Silicon Nanowire Technologies: brief review, home-made solutions and future trends","authors":"L. Stucchi-Zucchi, Marcos Vinicius Puydinger dos Santos, Fernando César Rufino, José Alexandre Diniz","doi":"10.29292/jics.v17i2.614","DOIUrl":"https://doi.org/10.29292/jics.v17i2.614","url":null,"abstract":"The silicon nanowire (SiNW) is poised to become an industry standard on the upcoming technological nodes. It presents improved current drive and modulation, minimized footprint, stackability, and a host of different beneficial characteristics. The last few years of research have focused on solving the last remaining challenges of SiNW fabrication as they roll into commercial usage. Now, novel devices, as well as channel and device stacking for 3D VLSI applications is being studied. As well as how can the SiNW geometry can be harnessed for More Than Moore materials and applications. In this review, we present a sample of the range of devices, techniques and applications of SiNW structures, alongside novel developments in the research carried out at University of Campinas. Demonstrations of JLFETs fabricated using Ga+-FIB, e-beam lithography, silicon etching in NH4OH solution, FinFETs fabricated using Ga+ lithography and strained silicon structures are shown. Promising future developments in VLSI and More Than Moore applications such as vertically stacked nanowire geometries, graphene nanoribbon devices, and MagFETs are also presented.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47397265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

III-V SOLAR CELLS III-V太阳能电池

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.618

R. Kawabata, Edgard W. Costa, L. Pinto, R. Jakomin, M. Pires, D. Micha, P. Lustoza de Souza

引用次数: 0

Synthesis of Steel-ASIC, a RISC-V Core 一种RISC-V核心钢- asic的合成

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.548

Rafael Da Silva, Vinicius dos Santos, F´abio Petkowicz, Rafael Calc¸ada, R. Reis

引用次数: 0

Selective Algorithm for Expanded Group Method of Data Handling Applied to Power Amplifier Modeling 扩展群数据处理方法在功放建模中的选择算法

Journal of Integrated Circuits and Systems Pub Date : 2022-09-17 DOI: 10.29292/jics.v17i2.544

Ana Paula Princival Machado, V. Nypwipwy, C. Franca, E. G. Lima

{"title":"Selective Algorithm for Expanded Group Method of Data Handling Applied to Power Amplifier Modeling","authors":"Ana Paula Princival Machado, V. Nypwipwy, C. Franca, E. G. Lima","doi":"10.29292/jics.v17i2.544","DOIUrl":"https://doi.org/10.29292/jics.v17i2.544","url":null,"abstract":"Power amplifiers (PAs) are electronic devices commonly used in telecommunications that need to transmit information with high energetic efficiency. For this, it is necessary to use data manipulation methods that assist in the linearization of the output signal. Our previous conference paper presented two codes constructed based on the Group Method of Data Handling (GMDH) and which differ in their way of selecting the best coefficients to be used in the calculations of the neural network. The first method, called Embracing, assumes greater availability of data, while the second, called Selective, selects information from the beginning of the code. This work extends the previous GMDH models by expanding the PA inputs into Laguerre basis functions with a single real pole. The comparison among the different approaches employs experimental data collected from a GaN HEMT class AB PA and a Si LDMOS class AB. The most selective and computationally more complex structure, when searching for identification since from the first layers, expresses minor errors and the best results in the output for both Conventional and Expanded GMDH models, becoming a reasoned option for use in PAs. A normalized mean square error (NMSE) of -35.44 dB was obtained by Expanded GMDH with Selective algorithm and 5 inputs when using the GaN PA, whereas a NMSE of -40.35 dB was obtained by the Expanded GMDH with Selective algorithm and 4 inputs when calculated with the Si LDMOS PA data.","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46479649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0