2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献_第2页

Flip Chip Typical Failure Case Analysis Research 倒装芯片典型失效案例分析研究

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915785

Jun Han, Zhidan He

{"title":"Flip Chip Typical Failure Case Analysis Research","authors":"Jun Han, Zhidan He","doi":"10.1109/IPFA55383.2022.9915785","DOIUrl":"https://doi.org/10.1109/IPFA55383.2022.9915785","url":null,"abstract":"With the rapid development of integrated circuits, flip-chip has become the mainstream packaging technology. The solder bumps in the connection area between the chip and the substrate mainly play the role of electrical connection, mechanical connection and heat exchange. Due to the miniaturization and multi-function development of electronic products, electronic packaging solder joints are becoming denser and smaller in size. Therefore, it is also exposed to higher electrical, mechanical and thermal stresses. According to statistics, solder joint failure accounts for more than half of the failure of electronic products. Therefore, in this study, we have extracted the classic failure cases of packaged products through daily failure analysis work, and explained the failure reasons. The open failure of solder joints mainly involves foreign material flux leading to solder joint rejection, and thermal expansion and contraction effect leading to the crack of the solder IMC on the substrate side; the short failure of solder joints mainly involves the bridging of adjacent solder joints caused by foreign material back gold; in addition, it is also found that abnormal circuit at the die level lead to leakage failure. All in all, finding the root cause for these failure will significantly help improve the manufacturing process.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127928929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Failure analysis on MIMCAP failures of 10nm devices using phase angle measurement method 基于相位角测量法的10nm器件MIMCAP失效分析

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915778

Hsu Li khoo, L.L. Goh, Y. G., Kok Heng Lau, C. N. Liew, Siew Ming Lim

{"title":"Failure analysis on MIMCAP failures of 10nm devices using phase angle measurement method","authors":"Hsu Li khoo, L.L. Goh, Y. G., Kok Heng Lau, C. N. Liew, Siew Ming Lim","doi":"10.1109/IPFA55383.2022.9915778","DOIUrl":"https://doi.org/10.1109/IPFA55383.2022.9915778","url":null,"abstract":"Failure analysis in scale down devices becoming very much intricate by following Moore’s law concept for current technology trend. Thus, this indirectly bring a very challenging task for failure analyst (FA) to identify the real defect in complex integrated circuit effectively (IC). Metal insulator- metal (MIM) capacitor has become popular choice for designers to select in the different signal devices as it is well known to stabilize a voltage reduction that ultimately leads to drastically improved product and transistor performance [1]. In this paper, we did come out an excellent technique to isolate MIMCAP defects effectively by characterizing comprehensive phase angle measurement that can be performed by using Enhance Lock in Thermal Emission (ELITE) machine. Through the established fault isolation (FI) methods carried out, we can isolate the defect accuracy and physical failure analyst (PFA) is able to reveal the real defects in shorten time and achieve higher success rate in findings. This is mainly because MIMCAP is a very thin parasitic layer about 50X thinner than next metal layer that sandwiched in between top metal layer 1 and top metal layer 0 which PFA might missed out during inspection by following conventional PFA approached to find out the defects.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"147 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133795009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Fault Localization of Temperature-Dependent Digital Circuit Functional Failures Utilizing the Scan-based Bench Testing and the Dynamic Analysis by Laser Simulation (DALS) 基于扫描台架测试和激光仿真动态分析的温度相关数字电路功能故障定位

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915743

Edward Bryan T. Pineda

{"title":"Fault Localization of Temperature-Dependent Digital Circuit Functional Failures Utilizing the Scan-based Bench Testing and the Dynamic Analysis by Laser Simulation (DALS)","authors":"Edward Bryan T. Pineda","doi":"10.1109/IPFA55383.2022.9915743","DOIUrl":"https://doi.org/10.1109/IPFA55383.2022.9915743","url":null,"abstract":"Soft defect failures are challenging, especially when dealing with the bias condition at the specific failing temperature. Fault localization of temperature-dependent digital circuit functional failures utilizing the scan-based bench Testing and the Dynamic Analysis by Laser Simulation (DALS) will employ a failure analysis flow based on the dynamic power dissipation theory. This study presents an alternative approach to solving temperature-dependent failures using the power dissipation equation by varying variables like voltage supply level and frequency or the speed instead of varying the temperature. The design principles of scan-based testing, which the design engineers utilize during the initial manufacturing phase, were used to solve failures on the digital block. During fault localization, the laser scanning microscope provides a temperature change proportional to the temperature dependency of the failing device. The objective is to bring the device to the failing state whenever the laser scans across the temperature-sensitive area of the die. The study showcases failure analysis cases that showed a significant improvement in the level of the analysis process, a drastic cycle time reduction in the analysis, and an almost 100% success rate in identifying the root cause compared with the conventional analysis.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133844611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effective Defect Localization for Scan ATPG Failure through Layout Aware Analysis 基于布局感知分析的扫描ATPG故障有效缺陷定位

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915736

Jack Yi Jie Ng, Kok Heng Lau, C. N. Liew, L.L. Goh, Chia-Li Song, Lee Kean Yong

引用次数: 0

Enhanced EBAC Detection on Gate Oxide Breakdown Isolation after High Voltage Electron Beam Irradiation 高压电子束辐照栅极氧化物击穿隔离的增强EBAC检测

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915744

P. T. Ng, F. Rivai, A. Quah, J. C. Alag, P. K. Tan, C. Q. Chen

引用次数: 0

Radiation-Induced Failures for Integrated Circuits in Space and Design Philosophy 空间集成电路的辐射诱发失效与设计理念

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915726

Yuchen He, Junkai Zhao, Juanda, Wei Shu, Kwen-Siong Chong, Joseph Chang

{"title":"Radiation-Induced Failures for Integrated Circuits in Space and Design Philosophy","authors":"Yuchen He, Junkai Zhao, Juanda, Wei Shu, Kwen-Siong Chong, Joseph Chang","doi":"10.1109/IPFA55383.2022.9915726","DOIUrl":"https://doi.org/10.1109/IPFA55383.2022.9915726","url":null,"abstract":"As an increasing number of Commercial-Off-the-Shelf (COTS) integrated circuits are employed in space missions, radiation-induced failures become an obvious risk to these missions. Various radiation effects on COTS in space applications are reviewed and discussed. Among various radiation effects, Single Event Latchup (SEL) and Single Event Upset (SEU) are the two most critical effects severely impacting power reliability and data integrity of COTS, respectively. To protect COTS in space missions against these radiation-induced failures, a design philosophy is proposed in this paper, with the aim of fundamentally ascertaining power reliability and data integrity. The design philosophy embodies two radiation hardened products, LDAP (Latchup Detection And Protection) and Voter, which are invented and produced by Zero-Error Systems. Specifically, LDAP serves to intelligently detect the occurrence of SEL and rapidly mitigate it by power cycling, hence enhancing power reliability. Voter, on the other hand, serves as the last checkpoint of a Triple Modular Redundancy system and mitigates SEU by always outputting the correct data, hence improving data integrity. The proposed design philosophy embodying LDAP and Voter collectively and significantly enhances COTS’ reliability, desirably allowing satellite manufacturers to select and employ COTS freely.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121111939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Gate oxide TDDB reliability under various stress in sub-16nm FinFET technology 亚16nm FinFET技术中栅极氧化物TDDB在各种应力下的可靠性

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915742

Xiangyu Liu, Yongsheng Sun, Junlin Huang, Xiaolu Shang, Changze Liu

引用次数: 3

High-Voltage a-IGZO Thin Film Transistor with the Symmetrical Stair Gate-Dielectric Structure 具有对称阶梯栅介电结构的高压a-IGZO薄膜晶体管

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915719

Guangan Yang, Ting-Hui Huang, Wangran Wu, Hao Tian, Zuoxu Yu, Siyang Liu, Weifeng Sun

引用次数: 0

Comprehensive Investigation of the Switching Stability in SiC and GaN Power Devices SiC和GaN功率器件开关稳定性的综合研究

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915772

Shun-Wei Tang, Chao-Ta Fan, Ming-Cheng Lin, Tian-Li Wu

引用次数: 0

A Correlative Analysis Flow for Electrical and Structural Characterization of IGZO Transistors IGZO晶体管电学和结构特性的相关分析流程

2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2022-07-18 DOI: 10.1109/IPFA55383.2022.9915759

L. Magnarin, M. Agati, A. Belmonte, S. Subhechha, N. Rassoul, C. Drijbooms, H. Dekkers, U. Celano

引用次数: 0