Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)最新文献

{"title":"Weibull statistics of silicon die fracture","authors":"C. Bohm, T. Hauck, A. Juritza, W. Muller","doi":"10.1109/EPTC.2004.1396714","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396714","url":null,"abstract":"In order to guarantee reliability of semiconductor devices for automotive applications an optimized package design is required. Clearly the design must be based on the best choice of geometry, materials and manufacturing processes. It is well known that the various process steps involved during package manufacturing occur at relatively high temperatures. Consequently, due to the mismatch of thermal expansion coefficients of the package materials, high thermal stresses arise at operating temperatures and may lead to failure of the device. Typical device failure modes include delamination of material interfaces or bulk material fracture. We focus on the prediction of silicon fracture in the microchips of electronic devices. Due to their brittle nature the strength data of silicon dies scatter and a probabilistic approach to failure is required. For this purpose Weibull theory are used and combined with analytical as well as numerical tools in order to describe the state of stress in the package and in particular within the silicon die. As a result of the analysis the probability of fracture in a microchip can now be assessed and used for further quality assurance purposes. The paper starts with a brief introduction to Weibull theory and present the 3-point-bending (3PB) experiments that were used to obtain the Weibull parameters for characterization of a combination of surface and edge flaw induced silicon die fracture. Moreover, the ball-on-edge and ball-on-ring tests are described and used to separately characterize edge or surface flaws, respectively. Particular emphasis are also given to the transferability of Weibull probability results from one specimen configuration to another resulting in a change of surface size and stress. In this context it is described how a stress distribution and, in particular, a multiaxial state of stress influences the variability in strength. Moreover it is shown how the corresponding Weibull integrals can be implemented numerically and used for postprocessing of finite element results. The paper concludes by demonstrating how these procedures can be used for optimizing the design of a real silicon die package.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115337710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Nanoindentation study of the Pb-free solders in fine pitch interconnects","authors":"K. Mohankumar, A. Tay","doi":"10.1109/EPTC.2004.1396656","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396656","url":null,"abstract":"Sn-Ag/Au/Ni-P/Cu, Sn-Ag-Cu/Au/Ni-P/Cu, Sn-Ag-Bi/Au/Ni-P/Cu diffusion couples were prepared and subjected to solid stage aging at temp 170/spl deg/C for 45 days. The intermetallic compound (IMC) formed at the interface of solder/substrate were characterised using SEM and their mechanical properties were measured at different strain state by using instrumented nanoindentation technique. The hardness and Young's modulus of different IMCs formed during reflow and aging were calculated from their load-displacement data. The deformation mechanisms operating at the small length scales of IMCs has been studied in the present work.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115488490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"In-situ solder fatigue studies using a thermal lap shear test","authors":"R. Dudek, W. Faust, J. Vogel, B. Michel","doi":"10.1109/EPTC.2004.1396641","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396641","url":null,"abstract":"A combined numerical-testing methodology has been developed for the evaluation of thermo-mechanical fatigue of small volumes of electronic materials loaded in shear. Small lap-shear specimens are mounted in a loading frame with slightly different thermal expansion, causing shear loading of the joint material when subjected to thermal loads. In-situ deformation analysis of the joint surface is an integral part of the procedure. Fatigue of Sn95.5Ag3.8Cu0.7 solder joints was investigated with this \"thermal lap shear test\". During thermal cycling in a microscope temperature chamber the changes of the microstructure were monitored. When playing these micrographs taken at different temperatures as a video sequence it becomes obvious that sliding between boundaries of the Sn-rich phases is the dominant deformation mechanism, which leads to crack propagation at multiple fronts along these \"grain boundaries\". However, it is shown that the final macroscopic crack starts in the region of highest equivalent creep strain and follows the path along its local maximum, corresponding to the finite element analyses (FEA) results. Fatigue progress is achieved by conventional thermal shock cycling, during which the electrical resistance changes are recorded. Microstructural degradation progress, electrical resistance changes of the joints and FEA based failure prediction are finally compared.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"15 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129581868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High frequency characteristics of nanocomposite thin film \"supercapacitors\" and their suitability for embedded decoupling","authors":"P. Markondeya Raj, D. Balaraman, V. Govind, L. Wan, R. Abothu, R. Gerhardt, S. Bhattacharya, M. Swaminathan, R. Tummala","doi":"10.1109/EPTC.2004.1396595","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396595","url":null,"abstract":"Embedded decoupling capacitor problem has been pursued by several groups and industry around the world over the past decade. Currently popular ceramic-polymer composites can only provide limited capacitance, typically within 10 nF/cm. With the reliability and processing constraints imposed, the capacitance density would be much lower. Newer capacitor concepts such as supercapacitors can overcome the limitations of existing polymer based capacitors and are now being considered by some groups. These concepts rely on nanostructured electrodes for high surface area per unit volume resulting in ultrahigh capacitance densities and unconventional polarization mechanisms such as electrical double layer and interfacial polarization. Supercapacitive structures lead to ultrahigh capacitance densities of the order of 100s of microfarads. However, manufacturers report that the properties are unstable at high frequencies, typically even at 10s of MHz. To adapt these structures for mid-to-high-frequency decoupling, it is hence essential to systematically characterize the high frequency dielectric properties of the thin nanocomposite films and nanostructured electrodes. This work reports complete electrical characterization of a part of such system, carbon black-epoxy nanocomposites. The high-frequency properties of the cured films were evaluated with a multiline calibration technique by measuring s-parameters of transmission lines fabricated on the top of the dielectrics. Though the nanostructured carbon black epoxy composites showed high dielectric constant of 1000 at low frequencies, the high frequency (0.5-4.5 GHz) dielectric constant was found to be only up to 10/spl times/ that of the base polymer matrix. The measured dielectric constant at GHz frequencies increased from 15-30 when the filler content was increased from 3.8 % to 6.5 %, with excessive leakage currents. Based on these measurements, conduction and polarization relaxation mechanisms will be assessed and the suitability of the thin film supercapacitors for high-frequency decoupling applications will be discussed.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116345732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-cost plastic package transceiver components for large core fiber systems","authors":"F. Ho, B. Lui, W. Hung, F. Tong, T. Choi, S. Yau, G. Egnisaban, T. Mangenete, A. Ng, E. Cheung, Sing Cheng, T. Wipiejewski","doi":"10.1109/EPTC.2004.1396709","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396709","url":null,"abstract":"We have developed low cost optical components based on electronics-style plastic packages for large core fiber systems such as polymer cladded silica (PCS) fiber systems. The VCSEL based transmitter demonstrates data rate up to 500Mbps and output power variation < 0.2dB over a wide ambient temperature range from -40/spl deg/C to 105/spl deg/C. Preliminary reliability data of the VCSEL transmitter shows no output power degradation after 500 cycles of temperature cycling from -40/spl deg/C to 125/spl deg/C. We have also fabricated MSM-PD for high speed large core fiber applications. The coupling tolerances are relaxed for 80/spl mu/m in lateral axis and 4000/spl mu/m in longitudinal axis, respectively. The MSM-PD based receiver exhibits a high sensitivity of -18dBm at a data rate of 3.2Gbps.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126810008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Flow analysis for flip chip underfilling process using characteristic based split method","authors":"V. Kulkarni, K.N. Seetharmu, P. Aswatha Narayana, I. Azid, G. Quadir","doi":"10.1109/EPTC.2004.1396681","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396681","url":null,"abstract":"In this paper, an effort has made to analyze and numerically simulate the fluid flow in chip cavity using characteristic based split (CBS) method. Simulation methodology includes a solver for the fluid flow equations coupled with technique to keep track of the flow front. Solver uses general convection-diffusion equations and solves flow equations using CBS method in conjunction with finite element method (FEM). The fluid front tracking is carried out using volume of fluid (VOF) technique. The velocity field obtained from CBS scheme is used in pseudo-concentration approach to track the advancement of fluid front. A particular value of the pseudo-concentration variable is chosen to represent the free fluid surface demarcating the mold compound and air regions which can be tracked for each time step. Simulation has been carried out for a particular geometry of a flip-chip package. The results obtained are in good agreement with literature and experimental data","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"175 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126180601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Assembly and characterization of micromachined combustor","authors":"Z. Wang, Y.F. Jin, X. Shan, C.K. Wong","doi":"10.1109/EPTC.2004.1396598","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396598","url":null,"abstract":"As part of an effort to develop MEMS-based power generation system, we present the assembly solution and the combustion test results of a recent-developed micro combustion device micromachined from single crystal silicon. Comprising the non-rotating components of a micro turbine engine, each micro combustor is constructed by 7 stacking dies, which are diced from 7 pieces of bulk-micromachined silicon wafer. Each die has identical size (21.50 mm /spl times/ 21.50 mm) and various thickness, ranging from 400 /spl mu/m to 800 /spl mu/m. Deep reactive ion etching (DRIE) process is employed to structure the silicon wafers from both sides. The combustion chamber measures about 94 mm/sup 3/. The micro combustor is assembled through seamless mechanical clamping by a customized jig, which fixed the dies and provides gas transportation in and out of the micro combustor. Some combustion experiments have been conducted after igniting the fuel/air mixture in the micro chamber. Stable hydrogen-air combustion has been observed to sustain inside the combustion chamber with exit temperature over 1200 /spl deg/C. During the combustion experiments, the silicon dies keep good mechanical integrity under assembly and no gas leakage is observed. These results show the feasibility of using this micro combustor as a part of micro power generation system.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131983376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Equivalent solder joint and equivalent layer models for the simulation of solder column failure under drop impact","authors":"Gu Jie, C. T. Lim, A. Tay","doi":"10.1109/EPTC.2004.1396668","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396668","url":null,"abstract":"We provide two new equivalent global models - equivalent solder joint model and equivalent layer model - to perform the simulation of solder joints under drop impact. A detailed global model with a fine mesh is used as a benchmark to control the accuracy of the simplified equivalent model. Excellent correlation has been achieved in these two models, when compared with the detailed global model. It is shown that by using these new models, the model size and computational processing time have been greatly reduced, while the accuracy of the results is still maintained. An electronic package with 10,000 interconnects undergoing drop impact was studied. We also apply the same approach for the simulation of packaging with underfill undergoing board level drop test.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133613206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comparison of time domain package characterization techniques using TDR and VNA","authors":"M. Engl, W. Eurskens, R. Weigel","doi":"10.1109/EPTC.2004.1396657","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396657","url":null,"abstract":"As operating frequencies rise and supply voltages decrease, the electrical performance of packages becomes more and more important. Hence, parasitic effects and electrical characterization of packages play an important role for todays and future applications. In this paper, we describe a state-of-the-art time domain reflectometry measurement technique and evaluate its applicability to package characterization. Furthermore, we compare the results obtained from a conventional time domain reflectometer (TDR) with that of a vector network analyzer (VNA). Since the VNA is actually operating in frequency domain, its results are transformed to the time domain. As test samples, several packages containing integrated circuits with defined standards like short, open and load were measured. The results show that time domain reflectometry techniques are well suited for failure analysis and package characterization. Besides it turned out that the results from the VNA are superior","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133705454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The effect of different build-up structures on solder joint fatigue life under thermo-mechanical cyclic loading condition","authors":"Jianjun Wang, S. Quander","doi":"10.1109/EPTC.2004.1396628","DOIUrl":"https://doi.org/10.1109/EPTC.2004.1396628","url":null,"abstract":"A FEA-based simulation procedure was established to evaluate the effect of different build-up structures on solder joint fatigue life under thermo-mechanical cyclic loading condition. The proposed methodology can therefore be used to select dielectric materials and core materials in build-up printed wiring boards (PWB) so that a build-up PWB board with the optimized combination of dielectrics and core material may be able to be obtained. The fatigue life of solder joint that links electronic package components to build-up PWB boards was chosen as an objective function to assess the feature of build-up PWB boards with the combinations of different dielectrics and core materials. The inelastic strain energy density-based Coffin-Manson model and the damage expression were adopted for the solder joint reliability assessment. The thermo-mechanical reliability for two selected packages assembled on eight-layer build-up (PWB) boards with five combinations of different dielectrics and core materials was investigated in terms of the framework developed. Based on the FEA results, a build-up PWB board with the optimized combination of dielectrics and core material for the selected package assemblies under thermo-mechanical cyclic loading condition was provided.","PeriodicalId":370907,"journal":{"name":"Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971)","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132858579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}