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2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)最新文献

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Relationship Between Time-constants and 3dB Cutoff of High-Order Damped LTI Systems 高阶阻尼LTI系统时间常数与3dB截止的关系
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8624020
V. Prodanov, Katherina Prodanov
{"title":"Relationship Between Time-constants and 3dB Cutoff of High-Order Damped LTI Systems","authors":"V. Prodanov, Katherina Prodanov","doi":"10.1109/MWSCAS.2018.8624020","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8624020","url":null,"abstract":"This paper deals with linear time-invariant (LTI) systems and examines the link between the 3dB cutoff and time-constants. It shows that the cutoff frequency of a low-pass damped network can be estimated from the reciprocal of a p-norm calculated from the system's time-constants. Furthermore, to achieve good accuracy the p factor must have a fractional value, for example, p=1.7. Two formulas are derived, and their performance evaluated using Monte Carlo simulations which reveal a sub-3% error for most cases.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116859941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reliability of Physical Unclonable Function under Temperature and Supply Voltage Variations 温度和电源电压变化下物理不可克隆函数的可靠性
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623849
Manpreet Kaur, R. Rashidzadeh, R. Muscedere
{"title":"Reliability of Physical Unclonable Function under Temperature and Supply Voltage Variations","authors":"Manpreet Kaur, R. Rashidzadeh, R. Muscedere","doi":"10.1109/MWSCAS.2018.8623849","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623849","url":null,"abstract":"Physically Unclonable Function (PUF) has emerged as a cost-effective building block for crypto cores and security system. The unique signature of a PUF is primarily attributed to the process variations where the effects of other factors such as supply voltage, temperature and aging are considered to be minor. In this work, detail analysis to evaluate supply voltage and temperature effects on PUF reliability is presented. It is shown that the effects of supply voltage and temperature variations on PUF reliability can be comparable to the effects of process variations. It is also shown how temperature variation affects propagation delay of logic cells and consequently undermines PUF reliability. Simulation results using CMOS $0.18mu mathrm{m}$ technology in Cadence environment with $pm 10%$ power supply variations for a temperature range of-400C to $+70^{0}mathrm{C}$ indicate that these effects can reduce PUF reliability by more than 58%.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120953890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Area Efficient 4Gb/s Clock Data Recovery Using Improved Phase Interpolator with Error Monitor 区域效率4Gb/s时钟数据恢复使用改进的相位插值器与错误监视器
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623900
Gyunam Jeon, Yong-Bin Kim
{"title":"Area Efficient 4Gb/s Clock Data Recovery Using Improved Phase Interpolator with Error Monitor","authors":"Gyunam Jeon, Yong-Bin Kim","doi":"10.1109/MWSCAS.2018.8623900","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623900","url":null,"abstract":"The paper presents area efficient 4Gbps clock and data recovery (CDR) by using improved phase interpolator (PI) with error monitor. The proposed CDR architecture has only two sets of phase interpolator while the conventional CDR has eight sets of phase interpolators. Each set of the PI is comprised of eight inverters to get 11.25°. phase interpolation from 0. to 348.75. by using the proposed phase error monitor. The outputs of the phase error monitor are composed of 9 bits sampled from early pulse. The monitor chooses four clock phases among 0., 45°, 90°, 135°, 180°, 225°, 270°, and 315° from an analog voltage controlled oscillator (VCO) by sending 3 bits to the mutiplexer. Then, the other 6 bits determine the interpolation phase of each block by using the inverter switches. Vcont (Charge Pump Output Voltage) is pre-charged to 345mV for fast locking time. The time for frequency locking and phase selection are 23.35ns with pre-charge time (1.1ns). The design is simulated with a 180nm CMOS technology node at 1.8V power supply. The total power consumption of the proposed CDR is 4.35mW.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121118688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A hardware obfuscation technique for manufacturing a secure 3D IC 一种制造安全3D集成电路的硬件混淆技术
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8624085
Siroos Madani, M. Madani, I. Dutta, Yamini Joshi, M. Bayoumi
{"title":"A hardware obfuscation technique for manufacturing a secure 3D IC","authors":"Siroos Madani, M. Madani, I. Dutta, Yamini Joshi, M. Bayoumi","doi":"10.1109/MWSCAS.2018.8624085","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8624085","url":null,"abstract":"3D Integrated Circuit (3D-IC) is an emerging technology that can address many challenging problems threatening the security of the chip by split manufacturing [1]. One of the disadvantages of split manufacturing is the uncertainty in the reliability of the last foundry that is responsible for the complete bonding of tiers. In this work, we present an innovative approach that safeguard the outsourcing of the entire 3D IC manufacturing including the last bonding stage. The proposed technique not only obfuscates the design functionality but immunes the IC against Trojan insertion.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125150551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Novel Framework to Introduce Hardware Trojan Monitors using Model Checking Based Counterexamples: Inspired by Game Theory 基于模型检查的反例引入硬件木马监控的新框架:受博弈论启发
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623962
S. R. Hasan, C. Kamhoua, K. Kwiat, L. Njilla
{"title":"A Novel Framework to Introduce Hardware Trojan Monitors using Model Checking Based Counterexamples: Inspired by Game Theory","authors":"S. R. Hasan, C. Kamhoua, K. Kwiat, L. Njilla","doi":"10.1109/MWSCAS.2018.8623962","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623962","url":null,"abstract":"Interest in hardware Trojan detection has grown tremendously over the last decade. Several methods for detecting hardware Trojan have been proposed. Due to enormity of possible Trojans, researchers believe that runtime detection is required as a last line of defense. However, to cater different types of hardware Trojans, several detection techniques should be concurrently applied. In this paper we propose a framework for optimizing runtime hardware Trojan detection monitors. We propose a formal verification approach to identify the vulnerable behavior of the hardware using the counterexamples generated by model checker. We devised a heuristic to understand the relationship between the counterexamples and required detection unit. To optimize the number of detection techniques, we leveraged Game Theoretic models to obtain a set of optimized design choices.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126649976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Experimental Study and Modeling of the gm-I Dependence of Long-Channel MOSFETs 长沟道mosfet的gm-I依赖性实验研究与建模
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8624109
M. Cheng, V. Prodanov
{"title":"Experimental Study and Modeling of the gm-I Dependence of Long-Channel MOSFETs","authors":"M. Cheng, V. Prodanov","doi":"10.1109/MWSCAS.2018.8624109","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8624109","url":null,"abstract":"this paper describes an experimental study and modeling of the current-transconductance dependence of the ALD1106 and ALD1107 arrays. The study tests the hypothesis that the I-gm dependence of these 7.8 $mu$m MOSFETs conforms to the Advanced Compact Model (ACM). Results from performed measurements, however, do not support this expectation. Despite the relatively large length, both ALD1106 and ALD1107 show sufficiently pronounced ‘short-channel’ effects to render the ACM inadequate. As a byproduct of this effort, we confirmed the modified ACM equation. With an m factor of approximately 0.6, it captures the I-gm dependence quite well. The paper also introduces several formulas and procedures for I-gm model extraction and tuning. These are not specific to the ALD transistor family and can be applied to MOSFETs with different physical size and electrical performance.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115062167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An audio self-recovery scheme that is robust to discordant size content replacement attack 一种对不一致大小内容替换攻击具有鲁棒性的音频自恢复方案
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623934
Juan Jose Gomez-Ricardez, José Juan García-Hernández
{"title":"An audio self-recovery scheme that is robust to discordant size content replacement attack","authors":"Juan Jose Gomez-Ricardez, José Juan García-Hernández","doi":"10.1109/MWSCAS.2018.8623934","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623934","url":null,"abstract":"One of the more severe attacks for self-recovery schemes is the discordant size content replacement attack. This attack substitutes a set of samples from an audio signal with another set of samples of different sizes. In this paper, a watermarking scheme for digital audio self-recovery that is robust to the discordant size content replacement attack is proposed. Our goal is to recover a tampered audio signal after such an attack. In particular, our scheme models the problem using source-channel coding. This method generates a watermarking where a lossy compressor is applied and the source coding output is protected with a channel coder. The coded data is then distributed into the original audio signal. In the recovery stage, a synchronization strategy is used to synchronize the watermark and this makes audio signal self-recovery possible. Our results shows that the propose scheme is robust to the discordant size content replacement attack for attacks of about 20% of the whole audio.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115537810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Quasi-Digital Output Low Power CMOS Temperature Sensor 准数字输出低功耗CMOS温度传感器
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623933
A. Hedayatipour, M. A. Haque, N. Mcfarlane
{"title":"Quasi-Digital Output Low Power CMOS Temperature Sensor","authors":"A. Hedayatipour, M. A. Haque, N. Mcfarlane","doi":"10.1109/MWSCAS.2018.8623933","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623933","url":null,"abstract":"Embedded systems, such as IoT devices, benefit from low power sensors. We propose a fully-integrated proportional to frequency temperature sensing system. The temperature sensor replaces power hungry ADCs and on-chip time references with a frequency dependent digital output. The system consumes 195 nW, with 0.5 V power supply. The maximum temperature accuracy of 0.2 $C^{circ}$ is achieved across 0° to 50° in a total area of 0.008mm2 in 130 nm technology. Experimental measurements of the temperature to voltage circuit is demonstrated, and post layout and Monte Carlo simulations verify that the total system design meets performance requirements and is suitable for arrayed applications.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116413998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges 用于MPSoC的安全片上网络架构:概述和挑战
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8623831
Luka Daoud
{"title":"Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges","authors":"Luka Daoud","doi":"10.1109/MWSCAS.2018.8623831","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8623831","url":null,"abstract":"Network-on-Chip (NOC) is the heart of data communication between processing cores in Multiprocessor-based Systems on Chip (MPSoC). Packets transferred via the NoC are exposed to snooping, which makes NoC-based systems vulnerable to security attacks. Additionally, Hardware Trojans (HTs) can be deployed in some of the NoC nodes to apply security threats of extracting sensitive information or degrading the system performance. In this paper, an overview of some security attacks in NoC-based systems and the countermeasure techniques giving prominence on malicious nodes are discussed. Work in progress for secure routing algorithms is also presented.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"GE-25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114130490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A Survey on Fault-Tolerant Supervisory Control 容错监控研究综述
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2018-08-01 DOI: 10.1109/MWSCAS.2018.8624110
M. Karimadini, A. Karimoddini, A. Homaifar
{"title":"A Survey on Fault-Tolerant Supervisory Control","authors":"M. Karimadini, A. Karimoddini, A. Homaifar","doi":"10.1109/MWSCAS.2018.8624110","DOIUrl":"https://doi.org/10.1109/MWSCAS.2018.8624110","url":null,"abstract":"System fault occurrences are arbitrary, costly, and at times deadly. Therefore, it is important to systematically and robustly react to occurred faults in a timely manner to recover the system. In this paper, we survey the notion of fault in supervisory control of discrete event systems. This paper particularly reviews the results on fault-tolerant supervisory control, robust supervisory control and reliable supervisory control in order to investigate the functionality of distributed discrete event systems in faulty conditions. The insights help the designers to understand under what faulty conditions a cooperative supervisory control scheme remains valid and how to synthesize the supervisory control of discrete event systems as fault-tolerant as possible.","PeriodicalId":365263,"journal":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114139593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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