一种制造安全3D集成电路的硬件混淆技术

Siroos Madani, M. Madani, I. Dutta, Yamini Joshi, M. Bayoumi
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引用次数: 5

摘要

3D集成电路(3D- ic)是一项新兴技术,可以通过拆分制造解决许多威胁芯片安全性的挑战性问题[1]。分离式制造的缺点之一是负责层之间完全粘合的最后一家铸造厂的可靠性存在不确定性。在这项工作中,我们提出了一种创新的方法,以保障整个3D集成电路制造的外包,包括最后的粘合阶段。所提出的技术不仅混淆了设计功能,而且使集成电路免受特洛伊木马的插入。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A hardware obfuscation technique for manufacturing a secure 3D IC
3D Integrated Circuit (3D-IC) is an emerging technology that can address many challenging problems threatening the security of the chip by split manufacturing [1]. One of the disadvantages of split manufacturing is the uncertainty in the reliability of the last foundry that is responsible for the complete bonding of tiers. In this work, we present an innovative approach that safeguard the outsourcing of the entire 3D IC manufacturing including the last bonding stage. The proposed technique not only obfuscates the design functionality but immunes the IC against Trojan insertion.
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