I. Naiki, M. Takizawa, M. Maño, T. Kimura, T. Ichikawa, M. Tsukamoto, S. Fujita, T. Nagayama, M. Sasaki
{"title":"Center wordline cell: A new symmetric layout cell for 64 Mb SRAM","authors":"I. Naiki, M. Takizawa, M. Maño, T. Kimura, T. Ichikawa, M. Tsukamoto, S. Fujita, T. Nagayama, M. Sasaki","doi":"10.1109/IEDM.1993.347274","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347274","url":null,"abstract":"A new symmetric memory cell, in which one wordline is placed at the center, has been developed for 64 Mb SRAM. This new center wordline cell has the benefits of a small cell size, good stability with operation voltages as low as 1.7 V, and suitability for implementation of phase shift lithography. A high performance TFT, which has on/off ratio of 7 orders even at 2.5 V operation, is mounted in this cell.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"244 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116249669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Description of the bias dependent overlap capacitance at LDD MOSFETs for circuit applications","authors":"P. Klein, K. Hoffmann, B. Lemaitre","doi":"10.1109/IEDM.1993.347303","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347303","url":null,"abstract":"An analytical charge description for the bias dependent overlap regions at MOSFETs with LDD(S) configuration for circuit applications is presented. Furthermore an indirect method for the extraction of the LDD(S) parameters is derived. By simulating a fundamental amplifier circuit, it is demonstrated, that an incorrect description of the bias dependent overlap capacitances of LDD MOSFETs can have a profound effect on simulation results.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126607690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Deflection microwave amplifier with field emission arrays","authors":"Cha-Mei Tang, Y. Y. Lau, T.A. Swyden","doi":"10.1109/IEDM.1993.347203","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347203","url":null,"abstract":"We analyze a new class of microwave and millimeter-wave amplifiers, based on the deflection of collimated microscopic electron beams with high-current density and low-voltage from field-emission arrays. The deflection concept may be applied in two ways: as microelectronic amplifiers or as bunched beam cathodes to power conventional amplifier configurations such as Klystrodes and traveling wave tubes. We found that the gain-bandwidth product, f/sub T/, depends only on the electron beam energy, current density and emittance, and is independent of beam width and total current. For line current of 20 /spl mu/Aspl mu/m, emittance /spl epsivsub nspl les/1.4/spl times/10/sup -6/ mm, we find that f/sub T/>200 GHz.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126698318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Three-dimensional \"atomistic\" simulation of discrete random dopant distribution effects in sub-0.1 /spl mu/m MOSFET's","authors":"H. Wong, Y. Taur","doi":"10.1109/IEDM.1993.347215","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347215","url":null,"abstract":"In this paper, discrete random dopant distribution effects in sub-0.1 /spl mu/m MOSFET's were studied using three-dimensional drift-diffusion \"atomistic\" simulations. Effects due to the random fluctuation of the number of dopants in the MOSFET channel and the microscopic random distribution of dopant atoms in the MOSFET channel were investigated. We found that, in addition to the well-known fluctuation of the threshold voltage, there was an average shift of the threshold voltage to a lower value. The average shift was believed to be attributed to the inhomogeneity of channel potential due to the discreteness of channel dopants, and the logarithmic dependence of subthreshold current. Microscopic dopant distribution also gave rise to asymmetry in drain current upon interchanging the source and the drain.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126402601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Gardner, Q. T. Vu, P. van Wijnen, T. Maloney, D. Fraser
{"title":"Embedded ground planes using sidewall insulators for high frequency interconnections in integrated circuits","authors":"D. Gardner, Q. T. Vu, P. van Wijnen, T. Maloney, D. Fraser","doi":"10.1109/IEDM.1993.347358","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347358","url":null,"abstract":"Cross-talk disturbance and signal delay from interconnections are intensifying as dimensions reduce and circuit frequencies increase, significantly impacting the performance of integrated circuits. A new structure called an embedded ground plane with sidewall insulators can be used to control the impedance and reduce cross talk and dispersion of signals. The S-parameters of 0.3 /spl mu/m lines with ground planes were measured up to 18 GHz and used to obtain the propagation function. The parasitics from the pads was eliminated using a new dc-embedding technique based on T-matrices. The resulting transmission line transfer function is then used to simulate the pulse response of interconnections using Fourier transforms.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122657427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Harmonic high power 95 GHz peniotron","authors":"G. Dohler, D. Gallagher, J. Richards, F. Scafur","doi":"10.1109/IEDM.1993.347333","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347333","url":null,"abstract":"For the first time ever, peniotron oscillations above 90 GHz (at the harmonic: f/spl ap/4f/sub c/) were observed from a peniotron designed for low power end utilizing a straight \"crossed-waveguide\" section as cavity. However, to obtain good performance of the tube, a low cost and highly precise circuit fabrication technique was developed where the circuit is fabricated from essentially a single block of material. Discussed are the subsequent development of high power (20-100 kW) 95 GHz peniotron amplifiers operating in a 10 vane rising sun magnetron circuit and the fabrication and cold testing of a 20 kW oscillator. Also discussed are a novel electron gun design and the design and test results of both low and high power broadband 95 GHz RF windows.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131865300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Bayruns, P. Wallace, R. Michels, O. Lopez, J. Bayruns, N. Scheinberg, J.I. Smith
{"title":"GaAs integrated circuits for consumer applications","authors":"R. Bayruns, P. Wallace, R. Michels, O. Lopez, J. Bayruns, N. Scheinberg, J.I. Smith","doi":"10.1109/IEDM.1993.347362","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347362","url":null,"abstract":"GaAs integrated circuit technology, once considered only as the technology of the future, is finding its way into consumer applications in a big way. Millions of ICs per year are being shipped into the DBS (Direct Broadcast Satellite) and CATV (Cable Television) markets. GaAs ICs are not displacing Si ICs, but rather discrete circuits which have tended to dominate consumer receiver applications. It is our belief that Si ICs have not penetrated the discrete receiver applications because of the lack of on chip filters. In GaAs technology passive elements are higher Q and are the key for our successful entry into the consumer receiver market place.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130731487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An accurate and computationally-efficient model of boron implantation through screen oxide layers into (100) single-crystal silicon","authors":"D. H. Lim, S.‐H. Yang, S. Morris, A. Tasch","doi":"10.1109/IEDM.1993.347350","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347350","url":null,"abstract":"In this paper is presented the development of the first computationally-efficient and accurate model for boron implants into single-crystal silicon through screen oxide layers with explicit dependence on implant energy, dose, tilt angle, rotation angle and oxide thickness. As the basis of this model, a very detailed study has been performed on the effects of screen oxides on tilt and rotation angle, dose, and energy dependency of boron profiles. This model has been implemented into SUPREM 3 in order to demonstrate its capabilities, a number of which are illustrated in this paper.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131000529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Silicon micromachined thermal profilers","authors":"Y. Gianchandani, K. Najafi, B. Orr","doi":"10.1109/IEDM.1993.347244","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347244","url":null,"abstract":"This paper presents a class of scanning thermal profilers micromachined from bulk silicon. Each device consists of an Au-polysilicon thermocouple supported by a probe shank overhanging the edge of the device substrate. The probe shank is suspended by flexural beams and can be electrostatically excited into physical motion by lateral comb drives. A polysilicon heater that can be used to provide a thermal bias during the scan lies at its base. Variations of the basic design include suspension of the thermocouple on a dielectric diaphragm, and replacing the thermocouple by a thermopile. A single-sided, IC-compatible 8 mask process has been developed to fabricate these devices. Preliminary data from test scans obtained using a simple set-up indicates that temperature resolution better than 20/spl deg/mC is possible even with basic silicon shank devices.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130022948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Maegawa, T. Ipposhi, S. Maeda, H. Nishimura, T. Ichiki, M. Ashida, O. Tanina, Yasuo Inoue, Nishimura Tadashi, Natsuro Tsubouchi
{"title":"Performance and reliability improvement in poly-Si TFTs by fluorine implantation","authors":"S. Maegawa, T. Ipposhi, S. Maeda, H. Nishimura, T. Ichiki, M. Ashida, O. Tanina, Yasuo Inoue, Nishimura Tadashi, Natsuro Tsubouchi","doi":"10.1109/IEDM.1993.347403","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347403","url":null,"abstract":"High-performance and high-reliability TFTs were obtained using a fluorine ion implantation (FII) technique. The FII into the TFT gate poly-Si caused a positive Vth shift, increased the on current and decreased the leakage current significantly. Our investigation indicates that the Vth shift originates from negative charges generated in the gate oxide by the FII. The improvement of drain current are attributed to F passivation of trap states in the poly-Si and a modulation of offset potential due to the same negative charges under the offset region. Furthermore, high endurance for -BT stress and TDDB of the gate oxide was achieved by the FII. We consider that the strong Si-F bonds created by the FII raise the stress immunity.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130104714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}