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2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)最新文献

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Comprehensive Study of ESD Design Window Scaling Down to 7nm Technology Node ESD设计窗口缩窄至7nm工艺节点的综合研究
2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2018-09-01 DOI: 10.23919/EOS/ESD.2018.8509689
Aihua Dong, J. Xiong, S. Mitra, Wei Liang, R. Gauthier, A. Loiseau
{"title":"Comprehensive Study of ESD Design Window Scaling Down to 7nm Technology Node","authors":"Aihua Dong, J. Xiong, S. Mitra, Wei Liang, R. Gauthier, A. Loiseau","doi":"10.23919/EOS/ESD.2018.8509689","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2018.8509689","url":null,"abstract":"ESD design window for mainstream bulk and SOI planar/FinFET technologies across 350nm7nm node are compared for the first time. 100ns TLP and 1ns vfTLP characteristics of Vgox, and Vt1, and It2 of various logic and I/O FETs are presented anddiscussed. Expanding the design window by utilizing series resistance within I/O driversis discussed.","PeriodicalId":328499,"journal":{"name":"2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126339623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
The Latent Failure Issue Seen from the Other Side: Normal Operation after ESD Induced Degeneration of Devices and Systems 从另一个角度看潜在的故障问题:ESD引起的器件和系统退化后的正常运行
2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2018-09-01 DOI: 10.23919/EOS/ESD.2018.8509758
G. Groos, Dennis Helmut, G. Wachutka
{"title":"The Latent Failure Issue Seen from the Other Side: Normal Operation after ESD Induced Degeneration of Devices and Systems","authors":"G. Groos, Dennis Helmut, G. Wachutka","doi":"10.23919/EOS/ESD.2018.8509758","DOIUrl":"https://doi.org/10.23919/EOS/ESD.2018.8509758","url":null,"abstract":"This work shows that Transmission-Line-Pulsing method can induce damage to electronic devices without causing a complete malfunction. Yet, this damage can later lead to dysfunction during operation. This could be verified in SMD ceramic capacitors and a CAN bus Transceiver IC. After the TLP stress, a functionality test showed that the device was harmed but not destroyed. Therefore, these defects are inconspicuous within a system, thus “latent”. Further stress in the allowed operating range (AMR) lead to a gradually deteriorated functionality until the device failed. In the field, the resulted defect would probably be categorized as electrical overstress (EOS) with an unknown root cause.","PeriodicalId":328499,"journal":{"name":"2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115308330","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Human Body Impedance Modelling for ESD simulations 人体阻抗建模ESD仿真
2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2017-08-01 DOI: 10.1109/ISEMC.2017.8077944
I. Oganezova, D. Pommerenke, J. Zhou, K. Ghosh, A. Hosseinbeig, J. Lee, N. Tsitskishvili, T. Jobava, Z. Sukhiashvili, R. Jobava
{"title":"Human Body Impedance Modelling for ESD simulations","authors":"I. Oganezova, D. Pommerenke, J. Zhou, K. Ghosh, A. Hosseinbeig, J. Lee, N. Tsitskishvili, T. Jobava, Z. Sukhiashvili, R. Jobava","doi":"10.1109/ISEMC.2017.8077944","DOIUrl":"https://doi.org/10.1109/ISEMC.2017.8077944","url":null,"abstract":"Motivated by understanding the ESD-induced currents from body-worn, wire and hose connected medical equipment is exposed to, a computer simulation is presented to estimate the impedance of a human body relative to ground. This 3D model is the basis for transient field calculation. A Method of Moments (MoM) frequency domain solution is transformed into time domain via IFFT for further circuit level time domain simulations. The human body is modeled as a homogeneous dielectric with frequency-dependent complex permittivity. Dependence of the impedance on the position of discharge and posture of the human body is investigated. The simulation resultsare compared with measurements and demonstrate capturing of general tendencies of measured curves.","PeriodicalId":328499,"journal":{"name":"2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114358407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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