{"title":"The design of reconfigurable Delta-Sigma modulator for software defined radio applications","authors":"S. Moallemi, A. Jannesari","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408301","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408301","url":null,"abstract":"A new architecture for increasing the resolution of Delta-Sigma Analog to Digital Converter (ADC) is presented. The proposed technique also reduced the area of the modulator significantly. Also the feed forward topology is used for reducing the total power consumption. The modulator has been simulated in 0.18μm standard CMOS technology with 1.8V power supply in Hspice circuit simulator. The modulator achieves the Dynamic Range of 95.6dB and 80dB for GSM and Bluetooth standards respectively while consumes 4.02mW and 4.04mW in each case.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133371750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Z. Md-Yusof, M. Khalil-Hani, M. N. Marsono, N. Shaikh-Husin
{"title":"s.RABILA2: An optimal VLSI routing algorithm with buffer insertion using iterative RLC model","authors":"Z. Md-Yusof, M. Khalil-Hani, M. N. Marsono, N. Shaikh-Husin","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408337","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408337","url":null,"abstract":"Buffer insertion and wire sizing have been proven effective in solving the timing optimization problem in VLSI interconnect design. In this paper, we describe a graph-based maze interconnect routing algorithm for VLSI designs. An interconnect routing and buffer insertion with look-ahead algorithm is used to construct a maze routing path. Simultaneous routing with buffer insertion and wire sizing is applied, taking into account wire and buffer obstacles. An iterative RLC interconnect model is proposed to estimate interconnect delay. Experimental results proves the effectiveness of the look-ahead scheme and shows RLC delay model improvement in delay estimation.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128983423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Deadlock detection and avoidance using Signal Interpreted Petri Nets","authors":"Z. Aspar, M. Khalil-Hani, N. Shaikh-Husin","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408338","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408338","url":null,"abstract":"Ladder Logic Diagram (LLD) modeling is a popular method that is used in designing programmable logic controllers (PLC) for industrial automation. However, as systems get more complex, they become increasingly difficult to detect and debug for design problems using these LLD models. Deadlock is one of the critical problems faced in complex PLCs applied in industry today. This paper proposes a method to analyse the deadlock problem in an LLD model. The LLD model is first converted to an equivalent Signal Interpreted Petri Net (SIPN). Deadlocks are detected by applying the approach of transitive matrix of resource share places in this SIPN. A new deadlock avoidance algorithm is proposed, that uses the Boolean transitions of the SIPN model. A key advantage of the proposed algorithm over existing methods is that there are no additional elements or resources introduced to eliminate the deadlock problem. Thus, the complexity of the net remains unchanged.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130855849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sensitivity analysis of MEMS switch contact bouncing using dual-pulse actuation waveforms","authors":"Chean Hung Lai, W. Wong","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408304","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408304","url":null,"abstract":"A simulation on the dynamics of RF MEMS switch actuated using different tailored actuation voltage waveforms is presented. From the analysis, the contact velocity of the switch membrane is evaluated and compared. In order to eliminate bouncing, the approaching speed of the membrane should ideally be zero when contact is made, else the momentum of the high speed impact will bounce the membrane back and causing electrical discontinuities at the output signal. The effect of switch parameter variation on the bouncing is then studied by varying the parameter of the actuation voltages. Simulation and experimental results are then presented to corroborate the analytical findings.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128734569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A current-mode universal biquadratic filter using a single MZCG-CCCCTA","authors":"M. Kumngern","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408342","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408342","url":null,"abstract":"This paper presents a new electronically tunable current-mode multifunction biquadratic filter using a new active building block called the multiple-Z with controlled current gain current-controlled current conveyor transconductance amplifier (MZCG-CCCCTA). The proposed filter employs only one MZCG-CCCCTA and two grounded capacitors which offers the following attractive features: realization of low-pass, band-pass, high-pass, band-stop and all-pass current responses from the same configuration; independent current control of the natural frequency (ωo) and the quality factor (Q); employment of only grounded capacitors which is suitable for integrated circuit implementation; employment of the minimum active and passive components; no requirement of component-matching conditions; low active and passive sensitivities. The characteristics of the proposed circuit are simulated using PSPICE to confirm the theory.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131004012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. R. Xian, N. Kamsani, R. Sidek, N. Yunus, M. Isa
{"title":"Emulator development and USB implementation on SDKP16","authors":"T. R. Xian, N. Kamsani, R. Sidek, N. Yunus, M. Isa","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408288","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408288","url":null,"abstract":"System development kit (SDK) is an important tool for software testing of developed processors and it has wide applications in integrated circuit (IC) production as well as in education sectors. It can be used as a learning kit for engineering or computer science students to learn programming languages. In this project, a SDK developed by MIMOS named SDKP16 is investigated and improved to ease its usage. The improvements implemented in this project were upgrading its serial port to USB port for communication purpose and development of Visual Basic program as its communication terminal on the host instead of using Hyper Terminal. The challenges in this project include the integration of the USB port into the existing SDK board and test of the developed program of which to observe the USB protocols. The project has increased compatibility and usability features of the SDKP16.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134566411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Hall sensor microsystem with integrated voltage and current references for continuous sensitivity calibration","authors":"A. Ajbl, M. Pastre, M. Kayal","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408328","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408328","url":null,"abstract":"This paper presents a Hall sensor microsystem with a current output and sensitivity calibration targeting low drift (<;50ppm/°C). The main system novelty is in a circuit-level solution using dedicated on-chip voltage and current references for a continuous measurement and calibration of the sensitivity. The system is fabricated in a 0.35μm CMOS technology, occupying an area of 11.55mm2. The measurements of the calibrated system show 80ppm/°C on average and 30ppm/°C best-case sensitivity drift over a temperature range from -40°C to 85°C. Compared to the state of the art, the fully integrated system for sensitivity calibration adds no more than 18ppm/°C on average and 30ppm/°C in the worst case for the additional integration of one voltage and one current reference.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132636056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hossein Hosseini-Nejad, A. Jannesari, A. M. Sodagar
{"title":"Data compression based on Discrete Cosine Transform for implantable neural recording microsystems","authors":"Hossein Hosseini-Nejad, A. Jannesari, A. M. Sodagar","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408307","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408307","url":null,"abstract":"This paper reports on the application of Discrete Cosine Transform (DCT) for data compression in implantable neural recording microsystems. Using the proposed data compression technique, the amount of the neural data transmitted off the implant is compressed by a factor of at least 67 at the expense of as low as 5.7% RMS of error. Based on the proposed idea, a 32-channel DCT processor was designed in a 0.18-μm CMOS process with 0.6mm2 silicon area. The circuit consumes 23.7μW (0.74μW per channel) from a 1.8-V power supply. A prototype of the proposed processor was tested using pre-recorded neural signals and experimental results confirmed its successful operation.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114380371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A simple pre-filtering for spectral smoothing in a radio frequency digital to analog converter","authors":"S. Rahmatollahi, A. Jannesari","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408313","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408313","url":null,"abstract":"A new pre-filtering scheme for direct digital to RF converter is presented. The converter consists of a 400MS/s digital ΣΔ modulator followed by a 2.4-GHz digital to Radio Frequency (RF) converter. The proposed structure attenuates the out-of-band spectral and relaxes the design of ΣΔ and RF-Filter. The technique is based on using First Order Hold filter in respect to use the conventional Zero Order Hold filter. The simulation result shows 16dB image rejection improvement. Also, the modulator achieved 79dB of Signal to Noise Ratio in 5MHz of band width. The output power is -4dBm while power consumption is about 2.55mW.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130626289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An interface circuit design based On differential capacitive sensors for accurate measurement of water contents in crude oil","authors":"M. Assaad, M. Z. Aslam","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408315","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408315","url":null,"abstract":"This paper presents a novel interface circuit design for an accurate measurement of water contents in crude oil by using differential capacitive sensors; the latter are immersed in two different liquids. One of them is a pure crude oil considered as a reference medium and the other medium is a mixture of water and crude oil which considered as a liquid under test. The dielectric permittivity of oil-water mixture is being used for water contents measurement. Sensor is placed in different concentrations of oil and water which directly affects the capacitance of the sensor. This above capacitance variation is converted to a voltage change which in turns measured by an interface circuit. The simulation has been carried out to confirm the performance of the circuit. The results show that the proposed interface circuit has the ability to measure the water contents with accuracy and stability.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131043749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}