2012 IEEE International Conference on Circuits and Systems (ICCAS)最新文献

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ASIC leakage, performance and area tradeoff analysis ASIC泄漏,性能和面积权衡分析
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408331
Ang Boon Chong
{"title":"ASIC leakage, performance and area tradeoff analysis","authors":"Ang Boon Chong","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408331","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408331","url":null,"abstract":"Power Optimization is essential part of early design planning stage besides performance. The blooming of mobile applications era further drive the need for power reduction in SOC design. Though SOC designers can opt for commercial EDA tools for concurrent timing, power, noise optimization, a thorough leakage, performance, area trade off analysis is required during design definition phase to ensure optimum performance, area, power and cost. The intend of this paper is to share some of the prior art leakage power trade off analysis in early SOC design planning phase.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133915017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Implementation of social insect model in tunnel Wireless Sensor Network (TWSN) 隧道无线传感器网络(TWSN)中群居昆虫模型的实现
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408290
M. Muzaffar Zahar, S. Ariffin, M. Fauzi, N. Fisal, N. M. Abdul Latif,
{"title":"Implementation of social insect model in tunnel Wireless Sensor Network (TWSN)","authors":"M. Muzaffar Zahar, S. Ariffin, M. Fauzi, N. Fisal, N. M. Abdul Latif,","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408290","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408290","url":null,"abstract":"The tremendous challenging in Wireless Sensor Network (WSN) straightly focuses on scalability of network and power consumption to guarantee the receiving of data. In Wireless Underground Sensor Network (WUSN), the proposed routing protocol not only considers the two issues above but also the different of communication medium and the reliable underground link. Based on those issues, the method and flow of communication of each node must focus strictly. Therefore, this paper presents on the development of routing protocol in WUSN particularly on tunnel environment. Proper routing protocol will consider the capability of sensor node and medium communication to produce safe and secure condition either in multihop or ad-hoc network. The results show the implementation of social insect model in Tunnel Wireless Sensor Network (TWSN) successfully overcomes the signal interference and attenuation that occurred in tunnel environment. It also significance by the secure delivery data developed using an ant agent in finding and sending of data packets for all nodes in this project. The proposed routing protocol is able to provide transmission of data that exceed 90 % although distance between nodes is 7 meters apart in a confine space.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117331523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Sequential circuit design using Quantum-dot Cellular Automata (QCA) 基于量子点元胞自动机(QCA)的时序电路设计
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408320
Lee Ai Lim, A. Ghazali, S. C. T. Yan, C. Fat
{"title":"Sequential circuit design using Quantum-dot Cellular Automata (QCA)","authors":"Lee Ai Lim, A. Ghazali, S. C. T. Yan, C. Fat","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408320","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408320","url":null,"abstract":"As the size of CMOS transistors keep shrinking, it will eventually hit its limitation. Hence, an alternative device has to be discovered to continually improve the development of electronics devices. Quantum-dot cellular automata (QCA), is a potential device that can be used to implement digital circuits. In this paper, we present the basic theory of QCA cell and some fundamental gates of QCA scheme. The fundamental gates, such as the QCA inverter and QCA majority gate are then used to build more complex logic circuits. Several design of sequential circuits such as gated D latch, RS latch, JK flip-flop, T flip-flop, D flip-flop, 2-bit counter, 4-bit counter, and 4-bit shift register are presented in QCA architecture. These designs are captured and simulated using a design software called QCADesigner.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125085995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 55
A new Architecture for two-stage OTA with no-miller capacitor compensation 无米勒电容补偿的两级OTA新架构
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302
S. Moallemi, A. Jannesari
{"title":"A new Architecture for two-stage OTA with no-miller capacitor compensation","authors":"S. Moallemi, A. Jannesari","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302","url":null,"abstract":"A new Architecture for two-stage Operational Transconductance Amplifier is presented. In this new structure the pole-zero cancellation technique is used to increase the amplifier band width. The proposed architecture uses a very simple circuit implementation scheme to create a feed-forward path in order to make a zero in voltage transfer function. The modularity of the proposed architecture also makes this scheme capable for use in multi-stage amplifier design. The DC-gain of 77dB, Unity-gain-bandwidth of 475 MHz is achieved while the OTA consumes only 5.1mW in standard CMOS 0.18μm technology with 1.8V power supply.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131563954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
An improved power constrained simultaneous noise and input matched 2.45 GHz CMOS NB-LNA 改进的功率约束同时噪声和输入匹配2.45 GHz CMOS NB-LNA
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408341
H. A. Eshghabadi, F. Eshghabadi, M. T. Mustaffa, N. Noh, A. A. Manaf, O. Sidek
{"title":"An improved power constrained simultaneous noise and input matched 2.45 GHz CMOS NB-LNA","authors":"H. A. Eshghabadi, F. Eshghabadi, M. T. Mustaffa, N. Noh, A. A. Manaf, O. Sidek","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408341","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408341","url":null,"abstract":"This paper presents a fully integrated two-stage narrow-band low noise amplifier which optimized to work in 2.45 GHz center frequency. The topology of inductive source degenerated cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique has been adopted to make the LNA suitable for low power applications based on 0.13 μm Silterra CMOS technology. Post layout simulation results show power gain of 22 dB, NF of 2.06 dB, S11 of -19 dB and S22 of -12 dB while consuming the DC current of 4 mA at supply voltage of 1.2 V.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"282 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116081123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Artificial Neural Network model for microwave propagation in water melon 微波在西瓜中传播的人工神经网络模型
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408280
O. Adedayo, M. Isa, K. Budayawan
{"title":"Artificial Neural Network model for microwave propagation in water melon","authors":"O. Adedayo, M. Isa, K. Budayawan","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408280","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408280","url":null,"abstract":"The propagation and attenuation of microwave traversing through water melon at 2.45GHz were modeled and validated. An attenuation experiment was carried out on water melon using free space transmission technique and an Artificial Neural Network (ANN) was designed, trained and deployed for the observed data from laboratory experiments. This generated a compact system against which existing mathematical models were compared. The results in both cases were found to be in congruence.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124843131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
CA based implementation of March test for high speed memories 基于CA的高速存储器三月测试实现
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408319
M. Saha, B. Sikdar
{"title":"CA based implementation of March test for high speed memories","authors":"M. Saha, B. Sikdar","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408319","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408319","url":null,"abstract":"This work proposes an efficient realization of March test for fault detection in high speed memories. The realization is based on the theory of a modeling tool called cellular automata (CA). A special class of CA architecture referred to as the SACA is considered for the test logic design. The test logic/hardware thus developed operates on the data read from the memory during March. It outputs an one-bit signature to detect faults in the memory chip, effectively reducing the comparison time required in conventional realization. The regular structure of CA enables low cost implementation of the test hardware for a memory chip, that is inherently regular in structure. The introduction of segmented CA structure further enables the drastic reduction in testing time.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121750189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Integrated non-inverting buck-boost DC-DC converter with average-current-mode control 集成非反相降压升压DC-DC变换器与平均电流模式控制
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408275
Chin-Hong Chen, Chia-Ling Wei, Kuo-Chun Wu
{"title":"Integrated non-inverting buck-boost DC-DC converter with average-current-mode control","authors":"Chin-Hong Chen, Chia-Ling Wei, Kuo-Chun Wu","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408275","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408275","url":null,"abstract":"With the increasing use of electrical portable devices, an efficient power management solution is needed to extend the battery life. Generally, basic switching regulators, such as buck and boost converters, are not capable of using the entire battery output voltage range. In this work, a non-inverting buck-boost dc-dc converter which can use the full-range output voltage (i.e., 2.5-4.7 V) of a Li-ion battery is proposed. Moreover, average-current-mode control is adopted to improve noise immunity. The die area of this chip is 1.9×1.7mm2, and it was fabricated by using TSMC 0.35μm 2P4M 5V mixed-signal polycide process. The input range of the converter is 2.5-5 V, and its output is set to 3.3V. It can supply up to 300 mA load current.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121022371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
The landmark variation improvement on the different modalities for the facial sketch features detection 人脸素描特征检测中不同模态的地标性变异改进
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408330
A. Muntasa, M. K. Sophan, M. Hery, K. Kunio
{"title":"The landmark variation improvement on the different modalities for the facial sketch features detection","authors":"A. Muntasa, M. K. Sophan, M. Hery, K. Kunio","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408330","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408330","url":null,"abstract":"Facial feature detection studies on the same modality have been conducted by many researchers, but the research results cannot be implemented on the different modality, only a few studies that can be used to detect the facial features on the different modality. In this research, we proposed method to detect the facial features on the different modality. The deviation standard on the landmark variations improvement has been considered as parameters to improve the moving direction toward the corresponding features. The experimental results show that the detection accuracy of our proposed method is 91.944% for the 1st model and 91.46% for the 2nd model. Our proposed method has been shown outperformed the mixture model method.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128656614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 3–5 GHz ultra wideband common-gate low noise amplifier 3 - 5ghz超宽带共门低噪声放大器
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408274
A. Zokaei, M. A. Boroujeni, F. Razaghian, J. Alvankarian, M. Dousti
{"title":"A 3–5 GHz ultra wideband common-gate low noise amplifier","authors":"A. Zokaei, M. A. Boroujeni, F. Razaghian, J. Alvankarian, M. Dousti","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408274","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408274","url":null,"abstract":"In this paper, designing an ultra wideband 3-5 GHz CG LNA in two different styles with active and passive output matching using 0.18 μm CMOS process is presented. A wider bandwidth and reduced linearity is observed in active output whereas in passive mode a better performance of linearity but reduced bandwidth is achieved. As the circuitry in active mode to increase linearity and having a more excess transistor, dissipation is more in comparison with passive one. Using a shunt-series broadening technique at the output of the main stage has a roll of optimization of gain and controlling the bandwidth. By using a 1.8 v power supply a power gain of more than 10.5 dB, input reverse isolation less than -10.3 dB noise figure of about 4 dB and IIP3 in center frequency of 4 GHz about -4.4 dBm which dissipates less than 12 mw in active mode in 3-5.5 GHz frequency band is observed. In passive output mode with reduced dissipation, using 1.2 v power supply a power gain of more than 10 dB, input reverse isolation less than -10 dB, noise figure of about 4 dB and IIP3 in center frequency of 4 GHz about -2.5 dBm with dissipation of less than 6mw in 3-5 GHz frequency band is attained.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124939147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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