2012 IEEE International Conference on Circuits and Systems (ICCAS)最新文献

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Evolvable Block-based Neural Networks for classification of driver drowsiness based on heart rate variability 基于心率变异性的驾驶员睡意分类的可进化分块神经网络
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408316
V. P. Nambiar, M. Khalil-Hani, C. Sia, M. N. Marsono
{"title":"Evolvable Block-based Neural Networks for classification of driver drowsiness based on heart rate variability","authors":"V. P. Nambiar, M. Khalil-Hani, C. Sia, M. N. Marsono","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408316","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408316","url":null,"abstract":"Studies have shown that driver drowsiness is one of the main causes of road accidents. It is estimated that 30% of road accidents are caused by driver drowsiness, which creates a need for driver drowsiness detection in modern vehicle systems. Previous works have shown the viability of using heart rate variability (HRV) for detecting the onset of driver drowsiness. HRV is obtained for electrocardiogram (ECG) signals, of which the power bands can be analysed to determine the physiological state of a person. This paper introduces a new method to detect driver drowsiness by classifying the power spectrum of a person's HRV data using Block-based Neural Networks (BbNN), which is evolved using Genetic Algorithm (GA). For most cases, regular Artificial Neural Networks (ANN) are not suitable for high speed and efficient hardware implementation. BbNNs are better candidates due to its regular block based structure, has relatively fast computational speeds, lower resource consumption, and equal classifying strength in comparison to other ANNs. Preliminary work has shown promising results with up to 99.99% classification accuracy using the proposed BbNN detection system for HRV data.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123754088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
QCA multiplexer based design of reversible ALU 基于QCA复用器的可逆ALU设计
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408309
B. Sen, M. Dutta, D. K. Singh, D. Saran, B. Sikdar
{"title":"QCA multiplexer based design of reversible ALU","authors":"B. Sen, M. Dutta, D. K. Singh, D. Saran, B. Sikdar","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408309","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408309","url":null,"abstract":"The QCA (Quantum-dot Cellular Automata) based reversible logic is gaining its prominence in digital circuit for energy efficient computations with high device density. This work targets design of reversible ALU in QCA framework. The design is based on the 2:1 QCA multiplexer introduced in this paper. The proposed ALU satisfies the requirement of high device density as well as the energy efficiency in terms of computing power. Experimental results establish the significant improvements in the design level over that of conventional design approaches.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"1091 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122906635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
A low power interface circuit design for a CMOS based smart optical sensor 基于CMOS的智能光传感器低功耗接口电路设计
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408272
I. Yohannes, M. Assaad, F. Mériaudeau
{"title":"A low power interface circuit design for a CMOS based smart optical sensor","authors":"I. Yohannes, M. Assaad, F. Mériaudeau","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408272","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408272","url":null,"abstract":"In this paper, a CMOS interface circuit as part of an optical sensor-based microsystem for pH monitoring applications is presented. The proposed circuit is capable of processing a voltage signal produced by the light transducer and generating 8-bit digital outputs representing the color information (i.e. wavelength). A resolution of 8 different colors has been achieved as a proof of concept and can easily be extended to a higher number of colors without a major modification in the architecture. The proposed interface circuit is a mixed-signal solution that consists of analog as well as digital building blocks along with a light transducer. It can be used as a portable and non-intrusive optical sensor for biomedical and environmental sensing applications.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114220849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Identification of power hungry unit in a processor with faulty predictor 具有故障预测器的处理器中耗电单元的识别
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408318
B. Das, B. Sen, D. Saran, B. Sikdar
{"title":"Identification of power hungry unit in a processor with faulty predictor","authors":"B. Das, B. Sen, D. Saran, B. Sikdar","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408318","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408318","url":null,"abstract":"This work reports identification of processor modules that are power hungry even for a minor defect in the branch predictor. The probable defects/faults in a predictor, resulting in mis-speculations, have been introduced to estimate the power consumption at different processor modules. The analysis reported in this work points to the power catastrophic defects that cause huge power drainage from the modules/units. Identification of such power hungry units of a processor establishes the need of DPL (design avoiding power loss) to save power drainage from a processor.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133269191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced Directional Hexagonal Search Algorithm 增强的定向六边形搜索算法
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408314
A. Ambulkar, S. Wankhede, S. Kautkar, M. Angrakh, V. More
{"title":"Enhanced Directional Hexagonal Search Algorithm","authors":"A. Ambulkar, S. Wankhede, S. Kautkar, M. Angrakh, V. More","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408314","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408314","url":null,"abstract":"Hexagonal block search algorithms considerably improve the execution speed of motion estimation over previously developed fast search algorithms. These algorithms focus on improvement of either coarse search or inner search. Proposed Enhanced Directional Hexagonal Search (EDHS) algorithm improves both the searches with respect to number of search points. This algorithm reduces the number of search points by exploiting the distortion information in the neighboring search points. Directionality obtained in coarse search helps reduce inner search points. Our experimental results show that the proposed algorithm substantially outperforms previously developed hexagonal search algorithms in terms of number of search points with slight improvement in the Peak Signal-to-Noise ratio. (PSNR).","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121884306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Vision-based activities recognition by trajectory analysis for parking lot surveillance 基于轨迹分析的基于视觉的停车场监控活动识别
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408305
Lih Lin Ng, H. Chua
{"title":"Vision-based activities recognition by trajectory analysis for parking lot surveillance","authors":"Lih Lin Ng, H. Chua","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408305","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408305","url":null,"abstract":"This paper presents a novel event recognition framework in video surveillance system, particularly for parking lot environment. The proposed video surveillance system employs the adaptive Gaussian Mixture Model (GMM) and connected component analysis for background modeling and objects tracking. Spatial-temporal information of motion trajectories are extracted from video samples of known events to form representative feature vectors for event recognition purposes. An event is represented by feature vector that contains dynamic information of the motion trajectory and the contextual information of the tracked object. The event classification is accomplished by measuring the similarity of the extracted feature vector to the labeled definition of known events and analyzing the contextual information of the detected event. Experiments have been carried out on the live video stream captured by the outdoor camera, and the results have demonstrated great accuracy of the proposed event recognition algorithm.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123628540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Fingerprint-fingervein multimodal biometric authentication system in field programmable gate array 现场可编程门阵列指纹-指静脉多模态生物识别认证系统
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408317
R. Moganeshwaran, M. Hani, M. Suhaini
{"title":"Fingerprint-fingervein multimodal biometric authentication system in field programmable gate array","authors":"R. Moganeshwaran, M. Hani, M. Suhaini","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408317","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408317","url":null,"abstract":"This paper discusses the System-on-Chip (SOC) Field Programmable Gate Array (FPGA) based implementation of multimodal biometric authentication. Multimodal biometric can solve several problems related to the unimodal biometric authentication such as accuracy problem due to noisy data acquisition, biometric spoofing, and non-universality of the biometric traits. Moreover, significant accuracy improvement is difficult to achieve on a unimodal biometric authentication system and the complexity of the improvement process is not suitable for low powered embedded system implementation. By adjusting certain part of each biometric system modal, the complex processing unit can be eliminated allowing for embedded system implementation. Although the accuracy of each biometric system modal will be affected, the fusion of the biometric information will overcome the problem. Furthermore, the need for portable personal authentication has led this research to explore the multimodal biometric authentication in embedded system in which the system is developed in a resource constrained environment. As the first step, fingerprint and fingervein are used as biometric traits and the whole process is implemented in SOC FPGA and executed by general purpose embedded processor in which the biometric information fusion strategy applies at the matching score level. The accuracy of the system is promising with an Error Equal Rate (EER) of 0.33%.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126013827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Smart novel computer-based analytical tool for image forgery authentication 智能新颖的基于计算机的图像伪造认证分析工具
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCircuitsAndSystems.2012.6408276
R. Teymourzadeh, Amirrize Alpha, V. H. Mok
{"title":"Smart novel computer-based analytical tool for image forgery authentication","authors":"R. Teymourzadeh, Amirrize Alpha, V. H. Mok","doi":"10.1109/ICCircuitsAndSystems.2012.6408276","DOIUrl":"https://doi.org/10.1109/ICCircuitsAndSystems.2012.6408276","url":null,"abstract":"This paper presents an integration of image forgery detection with image facial recognition using black propagation neural network (BPNN). We observed that facial image recognition by itself will always give a matching output or closest possible output image for every input image irrespective of the authenticity or otherwise not of the testing input image. Based on this, we are proposing the combination of the blind but powerful automation image forgery detection for entire input images for the BPNN recognition program. Hence, an input image must first be authenticated before being fed into the recognition program. Thus, as image security identification and authentication requirement, any image that fails the authentication/verification stage is not to be used as an input/test image. In addition, the universal smart GUI tool is proposed and designed to perform image forgery detection with the high accuracy of ±2% error rate. Meanwhile, a novel structure that provides efficient automatic image forgery detection for all input test images for the BPNN recognition is presented.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127338634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
SPICE modelling of a valley switching flyback power supply controller for improved efficiency in low cost devices 用于提高低成本设备效率的谷开关反激电源控制器的SPICE建模
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408340
V. P. Nambiar, A. Yahya, T. R. Selvaduray
{"title":"SPICE modelling of a valley switching flyback power supply controller for improved efficiency in low cost devices","authors":"V. P. Nambiar, A. Yahya, T. R. Selvaduray","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408340","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408340","url":null,"abstract":"The flyback switching mode power supply (SMPS) circuit is undoubtedly the most popular topology currently in low power applications, due to its low cost and simple structure. In the past, there have been many proposed optimizations to flyback designs utilising various techniques such as zero voltage switching (ZVS), active clamping, synchronous rectification, and more. However, most of these designs complicate the original snubbed structure of the flyback topology, and increases its cost. This paper presents the evaluation of a variable-frequency, soft-switching, snubbed, DC/DC flyback converter that utilizes valley switching for improving efficiency. The flyback controller is modelled using SPICE, and uses pulse skipping to maintain the equilibrium of the system based on the feedback from the output. Simulation models report up to 92.2% efficiency, which is almost comparable to ZVS and active clamping topologies. The main advantage of this design is the use of only a single switching transistor, with no additional inductors, correctional circuitry, or clamping action, thus guaranteeing a low cost design.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117004082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Front end of low power transmitter for wireless capsule endoscope 无线胶囊内窥镜低功率发射器前端
2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408285
L. Xing, S. Shafie, H. Ramiah, N. Sulaiman
{"title":"Front end of low power transmitter for wireless capsule endoscope","authors":"L. Xing, S. Shafie, H. Ramiah, N. Sulaiman","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408285","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408285","url":null,"abstract":"A low power transmitter front end for the application of a capsule endoscope operating at ISM band of 434 MHz has been proposed. The proposed architecture is aim to achieve low power consumption which is the essential parameter in a capsule endoscope. The transmitter front end is implemented using Silterra 0.13 um CMOS technology and consists of an up-conversion mixer and a voltage controlled oscillator. The current consumption of the system is 1.57 mA with the supply voltage of 1.2 V. Output power is found to be -14.4 dBm and the phase noise of the ring oscillator is -81.76 dBc/Hz at offset frequency of 160 kHz.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115036724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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