2012 IEEE International Conference on Circuits and Systems (ICCAS)最新文献_第3页

Sensory system for the electronic water meter 电子水表传感系统

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408284

R. Garmabdari, S. Shafie, M. Isa

{"title":"Sensory system for the electronic water meter","authors":"R. Garmabdari, S. Shafie, M. Isa","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408284","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408284","url":null,"abstract":"Currently, energy management has become one of the most controversial issues in the world due to limitations in natural resources, and the measurement of water consumption by means of water meter. Measuring water consumption has been considered a serious matter in order to control and manage the resources of water. Therefore, there are many approaches, which have been offered such as Ultrasonic, Electromagnetic, and Mechanical mechanism. However, there have been a lot of restrictions in them such as providing the power supply for the meter, the cost of implementation, accuracy of measurement etc. The circuit was designed based on the Hall-Effect sensor by applying a new technique to remove the effects of disturbing signals, which might be derived either of a strong electromagnetic field or temperature. Furthermore, this proposed technique will reduce the number of applied sensors. The CMOS technology was employed to reduce the power consumption, the effects of input resistance on sensor and, etc. The output of each sensor's signal is going to be shown as following, which illustrates the system performance. consequently, the electronic water meter has been designed to be not affected by electromagnetic field, temperature and so on, furthermore the reduction power consumption and the its cost was considered to be mass produced in the design.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123289735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Design of CMOS opamp using Potential Distribution Method 利用电位分布法设计CMOS运算放大器

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408293

R. Todani, A. K. Mal

引用次数: 8

Density aware interconnect parasitic estimation for mixed signal design 混合信号设计中密度感知互连寄生估计

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408311

Hui Ying Foo, Kevin Wei Chung Leong, R. Mohd-Mokhtar

{"title":"Density aware interconnect parasitic estimation for mixed signal design","authors":"Hui Ying Foo, Kevin Wei Chung Leong, R. Mohd-Mokhtar","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408311","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408311","url":null,"abstract":"With the current advancement of the design technology process, the contribution of interconnects parasitic to critical path delays has become crucial in determining the overall chip performance. A reliable parasitic estimation tool can help in assisting the design decisions as well as enabling a more precise synthesis; minimizing the tedious repetitive design cycles of placement and routing process. Experiments show that different interconnects estimation algorithms produce different parasitic RC values. To achieve an accurate parasitic capacitance prediction, several approaches were investigated and a new methodology of estimation is proposed. The new algorithm performs estimation prior to layout. It modifies the conventional estimation methodology by taking into account the layout density specification for a more precise interconnects parasitic capacitance estimation. The algorithm is divided into two stages; the pre-layout routing estimation and the generation of interconnect parasitic values. The layout density specification is brought into consideration on the second phase of the estimation process. The accuracy of the approximation is determined by comparing the estimated results with the actual post-layout data. The final outcome is positive, showing a good correlation between the pre-layout and post-layout measures; varying within 10 percent of the final extracted values.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133940131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Optimal power allocation of pilot symbols for LS channel estimation in OFDMA uplink OFDMA上行LS信道估计中导频符号的最优功率分配

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408298

Sheng Dai, Fangjiong Chen, Xiaodong Chen, S. Xiong

引用次数: 2

Adaptive momentum Levenberg-Marquardt RBF for face recognition 人脸识别的自适应动量Levenberg-Marquardt RBF

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408325

S. I. Ch'ng, K. Seng, L. Ang

引用次数: 6

A new CMOS second generation current conveyor with variable current gain 一种新型可变电流增益CMOS第二代电流输送装置

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408343

M. Kumngern

引用次数: 9

Noise measurement in amplifying system for radiation detectors 辐射探测器放大系统中的噪声测量

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408282

L. Lombigit, M. Khalid, M. Hamidon, Nasri Sulaiman

引用次数: 1

A survey of on-chip monitors 片上监视器的调查

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408286

Somayeh Rahimipour, W. N. Flayyih, I. El-Azhary, S. Shafie, F. Rokhani

引用次数: 5

UWB transmitter for communication and localization for IEEE 802.15.4a standard 用于通信和定位的UWB发射机符合IEEE 802.15.a标准

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408329

D. Martynenko, G. Fischer, O. Klymenko

{"title":"UWB transmitter for communication and localization for IEEE 802.15.4a standard","authors":"D. Martynenko, G. Fischer, O. Klymenko","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408329","DOIUrl":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408329","url":null,"abstract":"This paper describes a monolithic integrated transmitter intended for impulse-radio (IR) Ultra-wide Band (UWB) applications compliant to the IEEE 802.15.4a standard. The transmitter operates in the higher UWB band on the communication channels #5, #6, #8 and mandatory channel #9. The impulse generation is based on the gated oscillator principle allowing required on-off keying (OOK) as well as binary phase shift keying (BPSK) with the pulse repetition frequency up to 499.2 MHz. The transmitter key components are optimized for the low power operation. The frequency synthesizer includes the novel low-power load-independent voltage controlled oscillator with a resonator isolated from the external load. Additionally, the programmable frequency divider based on the novel fast low-power triple-modulus prescalers is implemented. The triple- modulus prescaler realizes three modes (N/N±1) via the phase switching between the output signals of the master/slave ECL divide-by-two stage. In addition, the 50% duty cycle baseband clock of 499.2 MHz is derived from the divider chain, regardless of the chosen channel. Each functional transmitter block includes a “power down” switch for power efficient operation. Besides the communication, the time-of-arrival unit is implemented. It supports precise indoor localization in conjunction with an appropriate UWB receiver. The presented transmitter was fabricated in a 0.25 μm SiGe:C BiCMOS technology occupying a Si area of 1.85 × 1.85 mm2.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128173646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Design & simulation of high speed Synchronous Buck converter using simple resonant gate driver 基于简单谐振栅极驱动器的高速同步Buck变换器的设计与仿真

2012 IEEE International Conference on Circuits and Systems (ICCAS) Pub Date : 2012-10-01 DOI: 10.1109/ICCIRCUITSANDSYSTEMS.2012.6408321

N. Yahaya

引用次数: 0