{"title":"无米勒电容补偿的两级OTA新架构","authors":"S. Moallemi, A. Jannesari","doi":"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302","DOIUrl":null,"url":null,"abstract":"A new Architecture for two-stage Operational Transconductance Amplifier is presented. In this new structure the pole-zero cancellation technique is used to increase the amplifier band width. The proposed architecture uses a very simple circuit implementation scheme to create a feed-forward path in order to make a zero in voltage transfer function. The modularity of the proposed architecture also makes this scheme capable for use in multi-stage amplifier design. The DC-gain of 77dB, Unity-gain-bandwidth of 475 MHz is achieved while the OTA consumes only 5.1mW in standard CMOS 0.18μm technology with 1.8V power supply.","PeriodicalId":325846,"journal":{"name":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A new Architecture for two-stage OTA with no-miller capacitor compensation\",\"authors\":\"S. Moallemi, A. Jannesari\",\"doi\":\"10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new Architecture for two-stage Operational Transconductance Amplifier is presented. In this new structure the pole-zero cancellation technique is used to increase the amplifier band width. The proposed architecture uses a very simple circuit implementation scheme to create a feed-forward path in order to make a zero in voltage transfer function. The modularity of the proposed architecture also makes this scheme capable for use in multi-stage amplifier design. The DC-gain of 77dB, Unity-gain-bandwidth of 475 MHz is achieved while the OTA consumes only 5.1mW in standard CMOS 0.18μm technology with 1.8V power supply.\",\"PeriodicalId\":325846,\"journal\":{\"name\":\"2012 IEEE International Conference on Circuits and Systems (ICCAS)\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Conference on Circuits and Systems (ICCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Conference on Circuits and Systems (ICCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCIRCUITSANDSYSTEMS.2012.6408302","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new Architecture for two-stage OTA with no-miller capacitor compensation
A new Architecture for two-stage Operational Transconductance Amplifier is presented. In this new structure the pole-zero cancellation technique is used to increase the amplifier band width. The proposed architecture uses a very simple circuit implementation scheme to create a feed-forward path in order to make a zero in voltage transfer function. The modularity of the proposed architecture also makes this scheme capable for use in multi-stage amplifier design. The DC-gain of 77dB, Unity-gain-bandwidth of 475 MHz is achieved while the OTA consumes only 5.1mW in standard CMOS 0.18μm technology with 1.8V power supply.
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