2016 74th Annual Device Research Conference (DRC)最新文献

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THz pulse detection by photoconductive plasmonic high electron mobility transistor with enhanced sensitivity 光敏等离子体高电子迁移率晶体管探测太赫兹脉冲
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548489
M. Shur, A. Muraviev, G. Rupper, S. Rudin
{"title":"THz pulse detection by photoconductive plasmonic high electron mobility transistor with enhanced sensitivity","authors":"M. Shur, A. Muraviev, G. Rupper, S. Rudin","doi":"10.1109/DRC.2016.7548489","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548489","url":null,"abstract":"We report on the THz pulse detection by a photoconductive InGaAs High Electron Mobility Transistor with enhanced sensitivity due to induced nonlinearities mixing the rectified optical pulse with the THz pulse. The experimental setup (see Figure 1) is similar to that used in the THz Time Domain Spectroscopy (TDS) but instead of a photoconductive antenna typically fabricated on low temperature grown (LT) GaAs, we use a submicron HEMT (with a 130 nm gate) connected to a 50 GHz transmission line (see Figure 2) to improve the bandwidth.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130759068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Nanoelectronic neurocomputing: Status and prospects 纳米电子神经计算:现状与展望
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548506
L. Ceze, J. Hasler, K. Likharev, J.-s. Seo, T. Sherwood, D. Strukov, Y. Xie, S. Yu
{"title":"Nanoelectronic neurocomputing: Status and prospects","authors":"L. Ceze, J. Hasler, K. Likharev, J.-s. Seo, T. Sherwood, D. Strukov, Y. Xie, S. Yu","doi":"10.1109/DRC.2016.7548506","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548506","url":null,"abstract":"Potential advantages of specialized hardware for neuromorphic computing had been recognized several decades ago (see, e.g., Refs. [1, 2]), but the need for it became especially acute recently, due to significant advances of the computational neuroscience and machine learning. The most vivid example is given by the deep learning in convolution neuromorphic networks [3]: the recent dramatic progress of this technology, with it's rapid extension to several important applications, was enabled by the use of modern GPU clusters [4, 5]. Even higher performance and lower power consumption has been recently demonstrated using FPGAs [5-7] and custom digital circuits [5, 8].","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117142370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Vertical III-V nanowire MOSFETs, TFETs, and CMOS-Gates on Si: Processing in 3D 垂直III-V纳米线mosfet, tfet和cmos栅极在Si:三维加工
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548411
L. Wernersson
{"title":"Vertical III-V nanowire MOSFETs, TFETs, and CMOS-Gates on Si: Processing in 3D","authors":"L. Wernersson","doi":"10.1109/DRC.2016.7548411","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548411","url":null,"abstract":"III-V MOSFETs are candidates for extension of the scaling roadmap beyond 10 nm. In the vertical direction, the requirements on gate-length scaling is less stringent and vertical III-V nanowire FETs are thus attractive for high density and low-power applications. While growth in the vertical direction allows flexibility in heterostructure combination and eases the path for integration on Si substrates, the processing in the vertical direction is still regarded challenging. Processing on the length scale of a few tens of nanometers has nevertheless been demonstrated including processing of vertical nanowire transistors with a diameter of 10 nm. Besides logic applications, III-V MOSFETs hold promises in the area of millimeter-wave electronics.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124603796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Depletion and enhancement mode β-Ga2O3 MOSFETs with ALD SiO2 gate and near 400 V breakdown voltage 具有ALD SiO2栅极和近400 V击穿电压的耗尽和增强模式β-Ga2O3 mosfet
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548430
Ke Zeng, K. Sasaki, A. Kuramata, T. Masui, U. Singisetti
{"title":"Depletion and enhancement mode β-Ga2O3 MOSFETs with ALD SiO2 gate and near 400 V breakdown voltage","authors":"Ke Zeng, K. Sasaki, A. Kuramata, T. Masui, U. Singisetti","doi":"10.1109/DRC.2016.7548430","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548430","url":null,"abstract":"As a next generation wide bandgap semiconductor for power electronics, β-Ga<sub>2</sub>O<sub>3</sub> (Ga<sub>2</sub>O<sub>3</sub>) has shown a lot of potential in recent studies. It has been reported to have high Baliga's Figure of Merit (BFoM), a figure of merit for power devices, next only to diamond among wide bandgap semiconductor materials [1]. Moreover, a mature growth technology for large area substrates is a major practical advantage for cost effectiveness and rapid adaptation by industry [2]. Because of the advantages of this material, depletion mode MOSFETs and Schottky diodes based on Ga<sub>2</sub>O<sub>3</sub> with high breakdown voltages have been recently demonstrated [3][4]. However, enhancement mode MOSFETs are preferred in power electronics applications. All the previous work incorporated ALD Al<sub>2</sub>O<sub>3</sub> as gate barrier due to its high dielectric constant. However, a recent study reported that SiO<sub>2</sub>/Ga<sub>2</sub>O<sub>3</sub> interface has a much bigger conduction band offset than that of Al<sub>2</sub>O<sub>3</sub>/Ga<sub>2</sub>O<sub>3</sub> [5] which is preferred in MOSFET. In addition, SiO<sub>2</sub>/Ga<sub>2</sub>O<sub>3</sub> interface has a relatively low interface states density according to our recent data. These properties make SiO<sub>2</sub> an attractive gate dielectric for Ga<sub>2</sub>O<sub>3</sub> power MOSFETs. Here, we first report depletion mode MOSFET on MBE grown Ga<sub>2</sub>O<sub>3</sub> with an ALD SiO<sub>2</sub> gate. We also report the first successful enhancement mode MOSFET on β-Ga<sub>2</sub>O<sub>3</sub>. Both depletion mode and enhancement mode MOSFETs show near 400 V off state drain source breakdown voltage.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132209407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Two-dimensional materials for electronic, photonic, spintronic and sensing applications 用于电子、光子、自旋电子和传感应用的二维材料
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548471
S. Koester
{"title":"Two-dimensional materials for electronic, photonic, spintronic and sensing applications","authors":"S. Koester","doi":"10.1109/DRC.2016.7548471","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548471","url":null,"abstract":"Two-dimensional (2D) materials are a broad family of layered crystals characterized by strong intra-layer bonds, but with weak inter-layer coupling dominated by van der Waals forces. These characteristics allow 2D materials to be either exfoliated or grown with atom-scale thickness. A wide range of 2D materials exist [1], including graphene, transition metal dichalcogenides (TMDs), black phosphorus (BP) and many others. While these materials have generated a great deal of excitement in the scientific community, many of the applications where these materials can truly provide a benefit compared to state-of-the-art solutions remain unclear. Here, I will describe our work on 2D materials, and will specifically describe how we have attempted to identify applications for which these materials are best suited.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"555 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127677441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The Zener-Emitter: Electron injection by direct-tunneling in Ge LEDs for the on-chip Si light source 齐纳-发射极:片上硅光源用Ge led的直接隧道电子注入
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548478
R. Koerner, M. Oehme, K. Kostecki, I. Fischer, E. Rolseth, S. Bechler, M. Yorgidis, A. Blech, O. Latzl, J. Schulze
{"title":"The Zener-Emitter: Electron injection by direct-tunneling in Ge LEDs for the on-chip Si light source","authors":"R. Koerner, M. Oehme, K. Kostecki, I. Fischer, E. Rolseth, S. Bechler, M. Yorgidis, A. Blech, O. Latzl, J. Schulze","doi":"10.1109/DRC.2016.7548478","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548478","url":null,"abstract":"While monolithically integrated light sources for Si photonics have been investigated using Ge and GeSn on Si substrates [1-3], the challenges in material quality and efficiency remain to be solved. Turning the Group-IV material into a direct semiconductor for CMOS compatible concepts [4] promises enhanced electrical to optical conversion efficiencies. However, the red-shift in emitting wavelength is challenging for the peripheral devices such as modulators and photodetectors in complex optoelectronic integrated circuits (OEICs) [5]. We investigated a new concept by utilizing a reverse biased Ge p+n Zener diode for injection of electrons into a forward biased light emitting Ge p+-i-n diode providing holes for the radiative transition. In Ge, the direct band-to-band tunneling (BTBT) dominates over the phonon assisted indirect BTBT, which is highly beneficial for the Zener-Emitter [6]. Moreover, possible low voltage operation due to highly conductive Ge tunnel diodes and avoidance of current crowding effects by the high-energetic electron filtering mechanism of Zener diodes are further increasing the electrical injection efficiency [7].","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124582981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Electron-blocking NiO/crystalline n-Si heterojunction formed by ALD at 175°C ALD在175℃下形成的电子阻断NiO/晶体n-Si异质结
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548444
Alexander H. Berg, G. Sahasrabudhe, Ross A. Kerner, Barry P Rand, J. Schwartz, J. Sturm
{"title":"Electron-blocking NiO/crystalline n-Si heterojunction formed by ALD at 175°C","authors":"Alexander H. Berg, G. Sahasrabudhe, Ross A. Kerner, Barry P Rand, J. Schwartz, J. Sturm","doi":"10.1109/DRC.2016.7548444","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548444","url":null,"abstract":"Silicon heterojunction solar cells have been the subject of growing research interest. Such cells replace the typical p+nn+ or n+pp+ structure of standard devices with selective heterojunction contacts, which block one type of carrier while allowing the other to pass freely (Fig. 1) [1-3]. Previously [4], we demonstrated a PEDOT/n-Si/TiO2 heterojunction cell fabricated below 100°C with no p-n junctions in the Si. However, the organic polymer PEDOT is known to be unstable over long periods of time; furthermore, recent data indicates that the PEDOT/n-Si interface might be a non-ideal minority carrier emitter, leading to a high J0 and low upper limit to VOC. Therefore, we are currently investigating inorganic electron-blockers on crystalline silicon. Nickel oxide (NiO), because of its large conduction band offset and small valence band offset with silicon (Fig. 2) [5], is a potential candidate for electron-blocking on n-Si. Here, we report atomic layer deposited (ALD) metal/15nm-i-NiO/Si diodes. We find that the NiO film leads to a heterojunction which blocks electrons compared to diodes with the NiO omitted. The characteristics depend on the top metal, indicating that the NiO passivates the Si surface so that the Fermi level is depinned and diodes with a higher Schottky barrier height can be fabricated. Devices with Ag have electron-blocking and hole-transmitting behavior.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124752979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Demonstration of GaN HyperFETs with ALD VO2 具有ALD VO2的GaN超场效应管的演示
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548397
A. Verma, B. Song, D. Meyer, B. Downey, V. Wheeler, H. Xing, D. Jena
{"title":"Demonstration of GaN HyperFETs with ALD VO2","authors":"A. Verma, B. Song, D. Meyer, B. Downey, V. Wheeler, H. Xing, D. Jena","doi":"10.1109/DRC.2016.7548397","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548397","url":null,"abstract":"Owing to strong electron-electron interactions, transition metal oxide materials can exhibit multiple phases with vastly different electronic, magnetic, structural, and thermal properties. Reversible control of the transitions between these phases by electronic means can give rise to completely novel devices which can provide new functionalities and help to overcome limits of traditional semiconductor devices [1, 2]. VO2 is a transition metal oxide material that exhibits a metal-insulator transition (MIT) at a temperature of ~67 C [3]. Recently, by coupling VO2 to the source of traditional semiconductor MOSFET devices, hybrid-phase-transition-FET (hyper-FET) devices were demonstrated [4]. These HyperFETs showed steep switching slope less than the room-temperature Boltzmann switching limit of ~60 mV/dec [4]. GaN based electronics has emerged as an enabler of high-speed and high-power RF and microwave electronics [5], and is currently being investigated intensively for next-generation high-voltage power electronics [6,7], as well as steep-switching based low-power digital electronics [8]. In this work, we combine ALD-grown VO2 with III-Nitride high-electron mobility transistors (HEMTs) to realize GaN-VO2 HyperFETs, demonstrating steep-switching behavior in a platform that is amenable to integration and scaling.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122122114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Vertical ambipolar barrier transistor based on black phosphorous-tin selenide van der waals heterojunction 基于黑磷锡硒化范德华异质结的垂直双极势垒晶体管
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548472
He Tian, Cheng Li, Bingchen Deng, F. Xia, Han Wang
{"title":"Vertical ambipolar barrier transistor based on black phosphorous-tin selenide van der waals heterojunction","authors":"He Tian, Cheng Li, Bingchen Deng, F. Xia, Han Wang","doi":"10.1109/DRC.2016.7548472","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548472","url":null,"abstract":"Dynamically tunable characteristics of a heterojunction between two semiconducting materials offers the potential for building reconfigurable devices that can enable novel functionalities in electronic systems [1-3]. In this work, we study a novel junction between black phosphorus (BP) and tin selenide (SnSe), both with puckered orthorhombic crystal lattices. Due to the narrow bandgap of BP ~0.3 eV and the ~0.8 eV [4] bandgap in SnSe, the junction displays unique p+-p and n-p polarity reversibility subject to electrostatic bias. An ambipolar barrier transistor based on this junction is also demonstrated for the first time. This highly tunable junction can be very attractive for many applications in reconfigurable electronics.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"2 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115578183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Using co-sputtered ZrSiOx gate dielectrics to improve mobility and subthreshold swing of amorphous IGZO thin-film transistors 采用共溅射ZrSiOx栅极介质提高非晶IGZO薄膜晶体管的迁移率和亚阈值摆动
2016 74th Annual Device Research Conference (DRC) Pub Date : 2016-06-19 DOI: 10.1109/DRC.2016.7548433
C. Hung, Shui-Jinn Wang, P. Liu, Chien-Hung Wu, N. Wu, H. Yan, T. Lin
{"title":"Using co-sputtered ZrSiOx gate dielectrics to improve mobility and subthreshold swing of amorphous IGZO thin-film transistors","authors":"C. Hung, Shui-Jinn Wang, P. Liu, Chien-Hung Wu, N. Wu, H. Yan, T. Lin","doi":"10.1109/DRC.2016.7548433","DOIUrl":"https://doi.org/10.1109/DRC.2016.7548433","url":null,"abstract":"In recent years, amorphous indium-gallium-zinc-oxide (α-IGZO) thin-film transistors (TFTs) with much better performance compared with the low-temperature polysilicon (LTPS) counterpart have been demonstrated [1-2], nevertheless, continuous efforts are still urged to further polish its electrical properties for display application. To strengthen field effect and reduce gate leakage current, many research works have been focused on the feasibility of other alternative high-κ dielectric for α-IGZO TFTs [3]. In the present work, the use of co-sputtered zirconium silicon oxide (ZrSiO<sub>x</sub>) gate dielectrics to improve both mobility and subthreshold swing (SS) of α-IGZO TFT is proposed and demonstrated. The ZrSiO<sub>x</sub> dielectric is expected to have a good compromise between the field effect (κ-value) and gate leakage current, because silicon dioxide (SiO<sub>2</sub>) is with the widest bandgap and zirconium dioxide (ZrO<sub>2</sub>) could have a much better interface with α-IGZO in comparison with hafnium dioxide (HfO<sub>2</sub>) [4]. The suitable RF power ratio for the co-sputtering of ZrO<sub>2</sub> and SiO<sub>2</sub> targets at room temperature to maximize the role of ZrSiO<sub>x</sub> dielectrics is investigated. Immunity of poly-structure formation of the ZrSiO<sub>x</sub> dielectrics with RF power ratio (ZrO<sub>2</sub>:SiO<sub>2</sub>) > 2 found in experiments is examined. In addition, effect of post annealing after dielectric deposition (PA) on device performance are also studied.","PeriodicalId":310524,"journal":{"name":"2016 74th Annual Device Research Conference (DRC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116678584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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