{"title":"PROPERTIES OF CONDUCTIVE ADHESIVES BASED ON DIFFERENT CURING AGENTS","authors":"D. Lu, D. Wong, C. Wong","doi":"10.1142/S0960313199000167","DOIUrl":"https://doi.org/10.1142/S0960313199000167","url":null,"abstract":"Electrically conductive adhesives (ECAs) are an environmentally friendly alternative for traditional tin/lead (Sn/Pb) solders. As a new technology, conductive adhesive technology still has many concerns and limitations. In order that conductive adhesive technology achieves universal acceptance, ECAs with better properties must be developed. ECAs consist of a polymeric matrix and a conductive filler. Compositions of the polymeric matrix play a very important role in determining the overall properties of ECAs. The objective of this study is to investigate the effects of different curing agents on the properties, especially contact resistance of conductive adhesives. Five polymeric matrix formulations are prepared by mixing five different curing agents, selected from different categories, with an epoxy resin. Using these polymeric matrix formulations, five ECAs are formulated. The properties of these ECAs studied include: curing profile, glass transition temperature (Tg), coefficient of thermal expansion (CTE), moisture absorption, adhesion strength, and shifts of contact resistance of these ECAs on non-noble metals such as tin, tin/lead, and copper, during elevated temperature and humidity aging. Also, a corrosion inhibitor is used to stabilize contact resistance of these ECAs on Sn/Pb. It is found that (1) the curing agents do affect the properties including contact resistance of ECAs and (2) the corrosion inhibitor is effective to stabilize contact resistance on Sn/Pb in all of the five ECA formulations.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132006296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ASSEMBLY OF LARGE PBGAS ON PRINTED CIRCUIT BOARD WITH LARGE PQFPS DIRECTLY ON THE OPPOSITE SIDE","authors":"J. Lau, S. Lee, H. Chao","doi":"10.1142/S0960313199000210","DOIUrl":"https://doi.org/10.1142/S0960313199000210","url":null,"abstract":"A two-side no-clean mass reflow process for large plastic ball grid array (PBGA) and plastic quad flat pack (PQFP) packages is presented. Emphasis is placed on the PBGA and PQFP assembly parameters such as the design, materials, and process of the packages and printed circuit board (PCB), solder paste, stencil printing, pick and place, reflow, and inspection. Solder joint reliability of the two-side PCB assembly is evaluated by shear tests and thermal cycling tests.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"9 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120936370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Takyi, Nduka Nnamdi (Ndy) Ekere, K. Snowdon, C. G. Tanner
{"title":"EVALUATION OF PLASMA TREATED HASL FINISH PCBs USING DCA MEASUREMENTS","authors":"G. Takyi, Nduka Nnamdi (Ndy) Ekere, K. Snowdon, C. G. Tanner","doi":"10.1142/S0960313199000155","DOIUrl":"https://doi.org/10.1142/S0960313199000155","url":null,"abstract":"The use of plasma as a method of preparing PCBs and components prior to soldering is being investigated by the electronics industry as an alternative method to the conventional flux application. High surface energy is a requirement for improved wettability and good solderability. The surface energy of a solid is an important quantity which cannot be obtained directly by measurement. It can be obtained by contact angle measurements using probe liquids. In this paper, the methodology of dynamic contact angle (DCA) analysis is described and demonstrated for the assessment of the removal of organic contaminants from hot air solder levelled (HASL) finish PCBs by plasma cleaning. The DCA data was compared with Auger surface analysis results and SEM micrographs in order to obtain a complete profile of the surface in terms of the level of cleanliness. In the study, PCB samples were plasma treated under different plasma conditions using Xe/O2/Ne and Xe/O2/Ar gas combinations. The DCA results show a substantial decrease in advancing contact angles between the control and plasma treated samples. This indicates an increase in both surface energy and wettability which is confirmed by the lower carbon (organic contamination) levels in the Auger results. SEM micrographs of as-received plasma treated and untreated samples show a cleaner (wettable) surface in the case of the plasma treated sample and a poor (non-wettable) surface for the untreated sample. The results indicate that plasma treated HASL finish PCBs using Xe/O2/Ne gas mixtures can reduce organic contaminants to levels that will promote fluxless soldering.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125472029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MODELS TO ESTIMATE PRINTED CIRCUIT BOARD FABRICATION YIELD DURING THE DESIGN STAGE","authors":"R. Giachetti","doi":"10.1142/S0960313199000118","DOIUrl":"https://doi.org/10.1142/S0960313199000118","url":null,"abstract":"First pass yield is an important manufacturability measure of a printed circuit board (PCB) design. Designers need to strive to maximize process yield in order to improve product quality and reduce cost. To achieve this goal, the designer needs to understand the relationship between design decisions and their impact on process yield. The importance of process yield in electronics is bellied by the many studies dedicated to the topic; however there is a lack of a complete yield model of the PCB fabrication process that can be utilized during the early design stages. This paper aggregates the many studies and puts yield in the context of design so that yield can be estimated before board layout and routing. Early feedback on yield is important so that designers can explore different alternative technology sets before committing significant resources to the design. The application of the yield model is illustrated through a typical design session.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127223285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"PROPERTIES OF CONDUCTIVE ADHESIVES BASED ON ANHYDRIDE-CURED EPOXY SYSTEMS","authors":"D. Lu, C. Wong","doi":"10.1142/S0960313199000143","DOIUrl":"https://doi.org/10.1142/S0960313199000143","url":null,"abstract":"Recently, isotropic conductive adhesives (ICAs) have been identified as a potential alternative for lead-containing solders in surface mount technology (SMT) applications. However, current commercial ICAs have some reliability issues that seriously limit their universal acceptance in electronics packaging areas. One of the critical reliability issues is that contact resistance between the ICAs and non-noble metals increases dramatically particularly during elevated temperature and humidity aging. The objective of this study is to investigate the contact resistance behaviors of a class of conductive adhesives, which are based on anhydride-cured epoxy systems, in elevated temperature and humidity environments. Cure profiles, moisture pickup, and shifts of contact resistance of the ICAs on different non-noble metals, such as tin (Sn), tin/lead (Sn/Pb), and copper (Cu), during aging are investigated. It is found that (1) this class of ICAs shows low moisture absorption; (2) the contact resistance of the ICAs on Sn and Sn/Pb decreases first and then increases slowly during 85°C/85% relative humidity (RH) aging; and (3) the contact resistance of the ICAs on Cu remains almost constant after the initial decrease during aging. In addition, the reasons for the contact resistance decrease are studied. Experimental results indicate that the initial contact resistance decrease is probably due to the removal of the insulating organic lubricant layer on silver (Ag) flakes or/and the removal of metal oxide layer on the non-noble metal surfaces by the acid, which is formed after the moisture reacts with the anhydride. From this study, it can be concluded that ICAs based on anhydride cured epoxy systems are promising formulations for surface mount technology applications.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125925420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Lau, Chris Chang, Maurice Lee, D. Cheng, T. Tseng
{"title":"PRINTED CIRCUIT BOARD MANUFACTURING AND TESTING OF RIMM","authors":"J. Lau, Chris Chang, Maurice Lee, D. Cheng, T. Tseng","doi":"10.1142/S0960313199000131","DOIUrl":"https://doi.org/10.1142/S0960313199000131","url":null,"abstract":"The manufacturing process of printed circuit board (PCB) for the Rambus™-in-line memory module (RIMM™) is presented in this study. Emphasis is placed on the key process steps and the important parameters of each step. Cross sections of the PCB are examined for a better understanding of the 8-layer structure. Electrical performances such as the controlled impedance, propagation delay, crosstalk, and attenuation of the PCB are measured by the time domain reflectometer (TDR). The results are compared against the specifications.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"161 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124394388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"CONTROL OF INCIPIENCE HYSTERESIS EFFECTS IN LIQUID COOLED ELECTRONICS HEAT SINKS","authors":"S. Bhavnani, S. E. Balch, R. Jaeger","doi":"10.1142/S0960313199000106","DOIUrl":"https://doi.org/10.1142/S0960313199000106","url":null,"abstract":"Although air cooling continues to be the primary cooling technique for electronics, increases in chip density and power dissipation drive the need to study techniques such as liquid immersion cooling. This paper describes a saturated pool boiling study of interactions between different heat sources, located in close proximity so as to simulate neighboring ICs on a vertically oriented silicon multichip module, immersed in FC-72. The heat sinks tested consisted of re-entrant cavities etched in silicon to enhance thermal performance, while the heat sources were in the form of serpentine thin film heaters. The benchmark case to which all multiple heater tests were compared was the isolated central heater case with no heat dissipating neighbors. With just this heat source activated, the usual boiling incipience temperature hysteresis was experienced during the first increasing heat cycle. During the second cycle of increasing heat flux, this hysteresis all but disappeared, proving the efficacy of re-entrant cavities in trapping vapor, as long as the pool remained saturated. The presence of a neighboring heat source located below the test heater, dramatically improves the thermal performance, virtually eliminating hysteresis effects altogether.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123179348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"THERMAL STRATEGY FOR MODELING THE WIREBONDED PBGA PACKAGES","authors":"V. Chiriac, T. Lee","doi":"10.1142/S0960313199000052","DOIUrl":"https://doi.org/10.1142/S0960313199000052","url":null,"abstract":"The Plastic Ball Grid Array (PBGA) package attracts considerable interest, being one of the most promising packaging technologies of the moment. Thermal analysis of a package and a Printed Circuit Board (PCB) stack-up is performed for a better understanding of package constitutive elements, allowing an enhanced thermal coupling of package and board for cost effective thermal management. A commercial Computational Fluid Dynamics (CFD) software was applied for thermal simulation. The study focuses on detailed thermal modeling of a 256 Wirebonded PBGA (depopulated bump array) package in a natural convection setup. The model was refined to include all the features, and the calculated junction-to-ambient thermal resistance for each simulation was compared to available experimental data. The order of creating the internal structures in the model has a strong impact on the package thermal characteristics. The calculated errors varied from 5% (detailed model) to 43% (simplified model).","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115306021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"INVESTIGATIVE STUDY OF MANIFOLD MICROCHANNEL HEAT SINKS FOR ELECTRONIC COOLING DESIGN","authors":"E. Ng, S. T. Poh","doi":"10.1142/S0960313199000088","DOIUrl":"https://doi.org/10.1142/S0960313199000088","url":null,"abstract":"Advances in microfabrication technology have allowed the use of microchannels in ultra compact, very efficient heat exchangers, which capitalize on the channels large surface area to volume ratio to transport high heat fluxes with small thermal resistances. One example is the cooling of microchips. However, the research into microscale flow and heat transfer phenomena conducted by various researchers provided substantial experimental data and considerable evidence that the behaviour of fluid flow and heat transfer in microchannels without phase change may be different than that which normally occurs in larger more conventional sized channels. This paper serves to perform a numerical analysis on the flow and heat transfer in manifold microchannels. A numerical model for 16 sets of parametric conditions is presented here using a CFD package, ANSYS/FLOTRAN. Pressure, temperature and velocity contour plots were obtained and analyzed. The results obtained were then compared with a derived analytical model. The...","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127567203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"THERMAL WAKE EFFECTS IN PRINTED CIRCUIT BOARDS","authors":"J. Culham, P. Teertstra, M. Yovanovich","doi":"10.1142/S0960313199000039","DOIUrl":"https://doi.org/10.1142/S0960313199000039","url":null,"abstract":"A simple, one-dimensional analytical model is presented that characterizes thermal wake effects for a convection cooled flat plate with discrete, surface mounted isoflux heat sources. Using integral solution techniques, the model predicts the temperature rise induced at downstream locations due to heating of the boundary layer by upstream sources. This analytical solution can be part of a coupled solid-fluid model to quickly and accurately evaluate conjugate heat transfer for air-cooled electronics applications. The thermal wake model is validated using numerical simulations for a wide range of test cases, and the average difference between the numerical results and analytical predictions is less than 2% for all test cases.","PeriodicalId":309904,"journal":{"name":"Journal of Electronics Manufacturing","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121574188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}