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2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)最新文献

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CMOS components for 802.11b wireless LAN applications 用于802.11b无线局域网应用的CMOS组件
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-03 DOI: 10.1109/RFIC.2002.1011933
K. O, Xi Li, F. Huang, W. Foley
{"title":"CMOS components for 802.11b wireless LAN applications","authors":"K. O, Xi Li, F. Huang, W. Foley","doi":"10.1109/RFIC.2002.1011933","DOIUrl":"https://doi.org/10.1109/RFIC.2002.1011933","url":null,"abstract":"2.4-GHz CMOS low noise amplifier, mixer, local oscillator buffer, differential power amplifier, and T/R switch for 802.11b WLAN applications have been implemented using MOS transistors. A single chip 2.4-GHz transceiver for WLAN with integrated power amplifier, switches, and other RF components will be possible in a 0.25-/spl mu/m CMOS technology. More importantly, it appears that the CMOS solution will be highly competitive in the 2.4-GHz WLAN market.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129493702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Design considerations in a BiCMOS dual-modulus prescaler BiCMOS双模预分频器的设计考虑
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-03 DOI: 10.1109/RFIC.2002.1011950
F. Dulger, E. Sánchez-Sinencio, A. Bellaouar
{"title":"Design considerations in a BiCMOS dual-modulus prescaler","authors":"F. Dulger, E. Sánchez-Sinencio, A. Bellaouar","doi":"10.1109/RFIC.2002.1011950","DOIUrl":"https://doi.org/10.1109/RFIC.2002.1011950","url":null,"abstract":"Design considerations in a dual modulus divide by 32/33 prescaler with a 0.6/spl mu/m BiCMOS process are presented. Care was taken to design the ECL-based circuits to operate with as low supply voltage and current consumption as possible. The phase noise contribution of the integrated bandgap bias network is demonstrated through simulations. The tradeoff between the power consumption and the phase noise is pointed out and some guidelines are provided to improve the noise performance. Measurements confirm the functionality of the prescaler with a 2.5V supply drawing around 2.3mA at 2.35 GHz with an input sensitivity between -24dBm and 12dBm. The circuit operates with a supply voltage down to 2.1V but with limited input sensitivity.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115078727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications 一款5.8 GHz全集成低功耗低相位噪声CMOS LC压控振荡器，用于WLAN应用
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011688
J. Bhattacharjee, D. Mukherjee, E. Gebara, S. Nuttinck, J. Laskar
{"title":"A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications","authors":"J. Bhattacharjee, D. Mukherjee, E. Gebara, S. Nuttinck, J. Laskar","doi":"10.1109/MWSYM.2002.1011688","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011688","url":null,"abstract":"A fully integrated low power and low phase noise 5.8 GHz VCO is designed and fabricated in standard 0.24 /spl mu/m single-poly, 5-metal digital CMOS process. The VCO-core draws 2 mA of current from a 2.5 V supply. Measured phase noise at 1 MHz offset from the center frequency is -112 dBc/Hz. It has a tuning range of 810 MHz with low phase noise performance throughout the tuning range. It meets the requirements for IEEE802.11a WLAN standard. Low power and low phase noise have been achieved simultaneously by the use of np complementary cross-coupled topology. The novel orientation of the inductor pair used in the design minimizes the effect of any unwanted common-mode magnetic coupling that may arise from other on-chip inductors in an integrated environment.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127234132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 82
Characterization and modeling of small-signal substrate resistance effect in RF CMOS 射频CMOS中小信号衬底电阻效应的表征与建模
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/RFIC.2002.1012057
Yo‐Sheng Lin, Shey-Shi Lu, Tai-Hsing Lee, Hsiao-Bin Liang
{"title":"Characterization and modeling of small-signal substrate resistance effect in RF CMOS","authors":"Yo‐Sheng Lin, Shey-Shi Lu, Tai-Hsing Lee, Hsiao-Bin Liang","doi":"10.1109/RFIC.2002.1012057","DOIUrl":"https://doi.org/10.1109/RFIC.2002.1012057","url":null,"abstract":"A novel theory based on dual-feedback circuit methodology is proposed to explain the kink phenomenon of scattering parameter S/sub 22/ in deep submicrometer MOSFETs. Our results show that the output impedance of MOSFETs intrinsically shows a series RC circuit (for low substrate resistance) or a \"shifted\" series RC circuit (for very high substrate resistance) at low frequencies, and a parallel RC circuit at high frequencies. It is this inherent triple characteristic of the output impedance that causes the appearance of double kinks phenomenon of S/sub 22/ in a Smith chart. Our model can not only predict the behavior of S/sub 22/, but also calculate all S-parameters accurately. Experimental data of 0.25-/spl mu/m-gate MOSFETs are used to verify our theory. Excellent agreement between theoretical values and experimental data was found.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125698810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Smoothing gate capacitance models for CMOS radio frequency and microwave integrated circuits CAD CMOS射频和微波集成电路的平滑门电容模型
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011693
J. Dobes
{"title":"Smoothing gate capacitance models for CMOS radio frequency and microwave integrated circuits CAD","authors":"J. Dobes","doi":"10.1109/MWSYM.2002.1011693","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011693","url":null,"abstract":"Convergence problems for both voltage- and charge-controlled models of MOSFET gate capacitances are often a limiting factor of CAD tools. In paper, an idea of exponential smoothing of model discontinuities is proposed. The method is demonstrated by smoothing the discontinuity of Meyer's model at zero drain-source voltage. The updated model is tested on flip-flop circuit by an advanced algorithm.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"85 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127988021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integrated 2.4 GHz CMOS quadrature VCO with symmetrical spiral inductors and differential varactors 集成2.4 GHz CMOS正交压控振荡器，对称螺旋电感和差动变容
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/RFIC.2002.1012089
B. Chi, B. Shi
{"title":"Integrated 2.4 GHz CMOS quadrature VCO with symmetrical spiral inductors and differential varactors","authors":"B. Chi, B. Shi","doi":"10.1109/RFIC.2002.1012089","DOIUrl":"https://doi.org/10.1109/RFIC.2002.1012089","url":null,"abstract":"A 2.4 GHz CMOS quadrature VCO is presented. By using symmetrical inductors and differential varactors, the circuit has been integrated into a single chip completely. The principles of this VCO are described. A prototype is fabricated in 0.25 um single-poly five-metal CMOS standard digital process. The measured results show that the proposed VCO could generate quadrature LO signals with a tuning range of more than 300 MHz and phase noise -104.33 dBc/Hz at 600 kHz offset/spl ogr/2.41 GHz (when only one port of differential outputs is measured). It consumes 21 mA when VDD=2.5 V (Including 8 mA output buffers). Die area is only 0.83/spl times/0.68 mm/sup 2/. This VCO could be used in many integrated wireless transceivers.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134590717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Characterization and modeling of on-chip inductor substrate coupling effect 片上电感衬底耦合效应的表征与建模
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011583
Chuan-Jane Chao, Shyh-Chyi Wong, Chia-Jen Hsu, Ming-Jer Chen, L. Leu
{"title":"Characterization and modeling of on-chip inductor substrate coupling effect","authors":"Chuan-Jane Chao, Shyh-Chyi Wong, Chia-Jen Hsu, Ming-Jer Chen, L. Leu","doi":"10.1109/MWSYM.2002.1011583","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011583","url":null,"abstract":"The substrate coupling effects of two adjacent coplanar spiral inductors are characterized and modeled. The noise magnitude between two 45 /spl mu/m-away inductors can be reduced by 6.83 dB by using guard-ring surrounding each inductor, and improved by 10.28 dB further by adding patterned ground polysilicon shield beneath at 3 GHz. The inductor with patterned polysilicon shield beneath shows improved quality factor and noise isolation. Moreover, a macro model is presented for modeling quality factor and inductance of on-chip spiral inductor and associated neighboring inductor's coupling noise effect.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122297339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Low frequency noise characterization and modeling of microwave bipolar devices : application to the design of low phase noise oscillator 微波双极器件的低频噪声表征与建模:在低相位噪声振荡器设计中的应用
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011610
L. Bary, G. Cibiel, I. Telliez, J. Rayssac, A. Rennane, C. Boulanger, O. Llopis, M. Borgarino, R. Plana, J. Graffeuil
{"title":"Low frequency noise characterization and modeling of microwave bipolar devices : application to the design of low phase noise oscillator","authors":"L. Bary, G. Cibiel, I. Telliez, J. Rayssac, A. Rennane, C. Boulanger, O. Llopis, M. Borgarino, R. Plana, J. Graffeuil","doi":"10.1109/MWSYM.2002.1011610","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011610","url":null,"abstract":"This paper addresses advanced low frequency noise measurements and modeling of SiGe HBTs. Results have been implemented into a nonlinear Gummel Poon model which has been validated through the design of a DRO made of an integrated SiGe negative resistance in the 10 GHz range. We have obtained phase noise of -105 dBc/Hz at 10 kHz offset, which is close to the state of the art, and we have demonstrated a design technique that provides an accurate phase noise prediction.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123032204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 2-GHz RF front-end transceiver chipset in CMOS technology for PCS and IMT-2000 applications 采用CMOS技术的2 ghz射频前端收发器芯片组，适用于pc和IMT-2000应用
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011547
Yong-Sik Youn, Nam-Soo Kim, Jae-Hong Chang, Young-Jae Lee, Hyun-Kyu Yu
{"title":"A 2-GHz RF front-end transceiver chipset in CMOS technology for PCS and IMT-2000 applications","authors":"Yong-Sik Youn, Nam-Soo Kim, Jae-Hong Chang, Young-Jae Lee, Hyun-Kyu Yu","doi":"10.1109/MWSYM.2002.1011547","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011547","url":null,"abstract":"This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS and IMT-2000. The transceiver chipset has been implemented in a 0.25 /spl mu/m single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8 GHz for PCS to 2.1 GHz for IMT-2000. The LNA has 2.5/spl sim/2.8 dB NF, 13/spl sim/12 dB gain and 6/spl sim/4 dBm IIP3. The down mixer has 15.5/spl sim/16.0 dB DSB NF, 15/spl sim/13 dB power conversion gain and 2/spl sim/0 dBm IIP3. The up mixer has 0/spl sim/-2 dB power conversion gain and 6/spl sim/3 dBm OIP3. With a single 3.0 V power supply, the LNA, down-mixer, and up-mixer consume 5 mA, 30 mA, and 25 mA, respectively.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134058677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Review of SiGe process technology and its impact on RFIC design 回顾SiGe工艺技术及其对RFIC设计的影响
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) Pub Date : 2002-06-02 DOI: 10.1109/MWSYM.2002.1011586
A. Das, M. Huang, J. Mondal, D. Kaczman, C. Shurboff, S. Cosentino
{"title":"Review of SiGe process technology and its impact on RFIC design","authors":"A. Das, M. Huang, J. Mondal, D. Kaczman, C. Shurboff, S. Cosentino","doi":"10.1109/MWSYM.2002.1011586","DOIUrl":"https://doi.org/10.1109/MWSYM.2002.1011586","url":null,"abstract":"Reviews recently published SiGe BiCMOS technologies for RFIC design. Performance and integration trends in SiGe HBTs are discussed. Performance of passive devices, such as an inductor, plays a key role in RF design. We review approaches to realize high Q inductor on a Si substrate. Finally, interaction of HBT performance with design is illustrated through LNA design.","PeriodicalId":299621,"journal":{"name":"2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128440555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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