{"title":"A 30-40 GHz Continuous Class F−1 Power Amplifier with 35.8% Peak PAE in 65 nm CMOS Technology","authors":"Ziu-Hao Wang, Chun-Nien Chen, Huei Wang","doi":"10.1109/RFIT49453.2020.9226239","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226239","url":null,"abstract":"This paper presents a continuous-mode inverse Class-F (i.e., Class-F-1) power amplifier design to achieve both high efficiency and wide bandwidth for 5G communications. The proposed fundamental and harmonic matching is achieved using an output transformer with an embedded capacitor for continuous inverse class-F operation. In this way, we can reduce the harmonic load complexity and insertion loss greatly. Therefore, the proposed inverse Class-F PA shows a saturated output power (Psat) of 17.9 dBm, output power bandwidth (30 to 40 GHz) with 33 % peak PAE, and output 1-dB compression point (OP1dB) of 15.0 dBm at 34 GHz. When tested with a single-carrier 64-QAM signal, this PA achieves bandwidth of 400 MHz, 14.1-dBm average output power, and 22.1% average PAE under root-mean-square (rms) error vector magnitude (EVM) −25.1 dB. Among all the published mm-Wave CMOS PAs, this PA shows outstanding large-signal performances and exceptional modulation capability.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115071407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"System and Component Design for Wireless Distributed Computing","authors":"Kosuke Katayama, T. Baba, T. Ohsawa","doi":"10.1109/RFIT49453.2020.9226252","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226252","url":null,"abstract":"Wireless distributed computing (WDC) enhances computational performance by combining computer resources over the wireless network. Therefore, high-performance RF front-end is necessary for high-speed wireless communication. (a) A 24 GHz amplifier has been designed in 59 min using particle swarm optimization. (b) A planar filter has been synthesized in 2.9 ms using a convolutional neural network. (c) $mathrm{A} 1times 2$ array Yagi-antenna has been proposed using a rat-race balun as a power divider. In this paper, we clarify the current circumstances of (a) amplifier, (b) filter, and (c) antenna designs because these components are the major components of the RF front-end of the WDC. We also discuss the future plans of these designs and the integration of these components for the highperformance computing over the WDC.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"36 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123503407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power Standing Wave Ratio as a Local Grid Magnifier for Close Observation of Impedance Trajectories","authors":"T. Ohira, S. Abe","doi":"10.1109/RFIT49453.2020.9226195","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226195","url":null,"abstract":"This paper presents a unique mathematical approach to impedance mapping on a complex plane. Assuming a passive load excited from an RF power source, we express the complex reflectance with respect to the standing wave ratio that involves the phase angle. Then the ratio is heuristically raised to a power, which enables us to magnify the local grid of the impedance. By pure formulation, we explore the trajectories that will appear on the plane from this local magnification. The results are visualized in seven persuasive illustrations to open up a fresh perspectives for the plane geometry from the RF engineering field.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129128680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Tsuruda, Y. Nishida, T. Mukai, Koji Terumoto, Y. Miyamae, Y. Oku, K. Nakahara
{"title":"Development of Practical Terahertz Packages for Resonant Tunneling Diode Oscillators and Detectors","authors":"K. Tsuruda, Y. Nishida, T. Mukai, Koji Terumoto, Y. Miyamae, Y. Oku, K. Nakahara","doi":"10.1109/RFIT49453.2020.9226224","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226224","url":null,"abstract":"The two types of practical plastic packages are proposed in this study for practical terahertz applications by using a plastic leaded chip carrier (PLCC), and also by embedding a parabolic antenna. A resonant tunneling diode (RTD) oscillator onto the top surface of which a dipole antenna is integrated is mounted in the packages to measure the radiation characteristics. The antenna gain is improved by 5 dB for the PLCC, while 17 dB for the parabolic-antenna type, compared to that of the RTD bare chip. The team also fabricates terahertz-imaging modules by utilizing PLCC-packaged RTD's as an oscillator and a detector. A perspective image obtained by line-scan with 1.25-mm pixel pitch elucidates the usefulness of the package.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130059871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of an Ultra Compact Low Power 60 GHz Frequency Doubler in 22 nm FD-SOI","authors":"Mengqi Cui, C. Carta, F. Ellinger","doi":"10.1109/RFIT49453.2020.9226216","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226216","url":null,"abstract":"This paper presents the design and characterization of a 60 GHz differential frequency doubler fabricated in a 22nm FD-SOI CMOS technology. The push-push amplifiers are driven by quadrature differential input signals, generated by a two-stage polyphase filter. To compensate for the inherent losses of the polyphase filter a set of two-stage CMOS inverters is implemented. Integrated into a very compact area of $202mumathrm{m}times 164mumathrm{m}=0.033 text{mm}^{2}$, the proposed design has achieved −11 dBm output power and −10 dB conversion gain with an output −3 dB bandwidth over 16 GHz. While operating at its saturated output power, the circuit only consumes 8 mW of DC power from a 0.8 V supply, which is to the best knowledge of the authors the lowest reported for active mm-wave frequency doublers, and provides 35 dB of suppression of the fundamental achieved around the center frequency. By increasing the supply voltage to 1V, the conversion gain and output power can be improved to −5.7dB and −8.2dBm at a cost of 16mW of DC power.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124150482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"1.0 THz one-sided directional slot antenna on 45 nm SOI CMOS","authors":"H. Kanaya, Kohei Tasaki, R. Takigawa","doi":"10.1109/RFIT49453.2020.9226205","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226205","url":null,"abstract":"This paper presents a design of an one-sided directional slot antenna for 1THz frequency rage future telecommunication applications. The antenna was realized on the 45 nm SOI CMOS technology. The antenna was composed of the top antenna layer, thin dielectric inter layer and bottom floating metal layer. To enhance the bandwidth, 1⨯2 array antenna was designed which has 6.2 dBi antenna gain and 250GHz 3dB bandwidth at 1 THz in simulation.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128525122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Self-Interference Mitigation using 1-Bit Bandpass Delta-Sigma Modulator with No Output Section","authors":"T. Maehata, M. Motoyoshi, S. Kameda, N. Suematsu","doi":"10.1109/RFIT49453.2020.9226234","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226234","url":null,"abstract":"In wireless communication systems, multi-input and multi-output (MIMO) and carrier aggregation (CA) have been developed to achieve high speed and high capacity communication. In these methods, many transmitters and receivers are used, which leads to larger equipment, and miniaturization is an issue. In this paper, a 1-bit bandpass delta-sigma modulator (BP-DSM) for the transmitter and a direct RF undersampling sample/hold integrated circuit (S/H-IC) for the receiver are introduced. In addition, to mitigate the self-interference between transmitters and receivers caused by miniaturization, the output waveform of the transmitted signal is pulsed like Return to Zero (RZ) and a no output section (NOS) of the transmitted signal is periodically introduced to be separated the received signal in the time domain. In a demonstration experiment, a reception performance of 9.87% error vector magnitude (EVM) in the NOS has been achieved at 760 MHz for both the transmission frequency and reception frequency, 64 QAM and 16 QAM for the transmission and reception signal, respectively, and a DU ratio of 0 dB.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134023773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sangyeop Lee, S. Amakawa, T. Yoshida, Y. Morishita, Yuichi Kashino, S. Hara, M. Fujishima
{"title":"300-GHz CMOS-Based Wireless Link Using 40-dBi Cassegrain Antenna for IEEE Standard 802.15.3d","authors":"Sangyeop Lee, S. Amakawa, T. Yoshida, Y. Morishita, Yuichi Kashino, S. Hara, M. Fujishima","doi":"10.1109/RFIT49453.2020.9226231","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226231","url":null,"abstract":"In this paper, a 1-meter high-speed-wireless data transmission, employing a 300-GHz CMOS RF front end and Cassegrain antennas, is demonstrated. To improve system SNR of the CMOS RF front end, high-gain antennas are designed for the 300-GHz frequency bands. The antenna shows the peak antenna gain of 40 dBi and the 3-dB beamwidth of 1.3 degrees, within the diameter of 6 cm. In the wireless demonstration, the maximum data rate of 36 Gb/s with QPSK modulation is achieved due to high gain antennas.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116205033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Bowen Dang, M. Motoyoshi, Junyi Xu, Hiroyasu Sato, S. Kameda, Qiang Chen, N. Suematsu
{"title":"In-body/Out-body Dual-Use Miniaturized RFID Tag System Using 920MHz/5.02GHz Bands","authors":"Bowen Dang, M. Motoyoshi, Junyi Xu, Hiroyasu Sato, S. Kameda, Qiang Chen, N. Suematsu","doi":"10.1109/RFIT49453.2020.9226219","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226219","url":null,"abstract":"This paper describes an in-body/out-body passive type RFID system by using a miniaturized tag antenna. The RFID tag is used for both in-body and out-body communications. In the out-body condition, the tag antenna is designed at operating frequency 5.02 GHz in order to shrink the tag size to about 2cm length. In the in-body condition, the operating frequency becomes lower than that in out-body condition due to the higher dielectric constant of surrounding medium (i.e. human body and liquid) of the antenna. From the EM simulation result, we found that this tag can be operated at 920 MHz-band which is commonly used in existing 920 MHz RFID system. Therefore, we decided to use existing 920 MHz RFID tag chip and fabricated the miniaturized RFID tag. Fabricated 2cm-class RFID tag performs dual-use characteristic for in-body/out-body conditions by using 5.02 GHz/920 MHz bands.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"353 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114829134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 28-GHz Variable Gain Amplifier with Low Phase Variation in 90-nm CMOS","authors":"C. Kuo, Ting Chou","doi":"10.1109/RFIT49453.2020.9226247","DOIUrl":"https://doi.org/10.1109/RFIT49453.2020.9226247","url":null,"abstract":"A 28 GHz variable gain amplifier is designed in a 90 nm CMOS technology. The circuit provides a maximum gain of 17.7 dB with a tunable range of 38 dB by the current-steering method. In this design, the phase variation of the voltage gain is minimized by introducing transformer coupling to cancel capacitive leakage current. A varactor provides the capability of frequency tuning. Consequently, the measured phase variation is less than $7^{circ}$ over the gain tuning range at 28 GHz. The circuit consumes a dc current of 6.9 mA under the supply voltage of 1.2 V, including the output buffer of a two-stage cascode amplifier.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121566772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}