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2014 IEEE International Symposium on Radio-Frequency Integration Technology最新文献

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Silicon technologies and circuits for RF and mm-wave applications 用于射频和毫米波应用的硅技术和电路
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933264
F. Dielacher, M. Tiebout, P. Singerl, David Seebacher
{"title":"Silicon technologies and circuits for RF and mm-wave applications","authors":"F. Dielacher, M. Tiebout, P. Singerl, David Seebacher","doi":"10.1109/RFIT.2014.6933264","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933264","url":null,"abstract":"The presentation will start with an overview of the features and capabilities of state-of-the-art SiGe-BiCMOS and RF-amplifier technologies for applications such as high-data-rate communications, phased-arrays and pro-active safety systems like identification and e-safety. The capabilities offered by SiGe-BiCMOS and microwave packaging enable the integration of complete multichannel transceivers on a chip or in a package even including the antennas. The criteria and trade-off's for the technology selection and system partitioning will be discussed in part two of the presentation. In addition to the electrical components performance, major criteria such as high reliability, long lifetime and high yield fabrication will be addressed. Advanced packaging technologies will be presented as well, including embedded passive components and package co-design. Finally existing circuit design examples and future solutions for pro-active safety systems will be presented, followed by power-amlifiers and high-speed transceivers for communications and point-to-point links.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"742 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115132086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A study of statistical variability-aware methods 统计变量感知方法的研究
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933246
Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner
{"title":"A study of statistical variability-aware methods","authors":"Hao Cai, Kaikai Liu, Lirida Alves de Barros Naviner","doi":"10.1109/RFIT.2014.6933246","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933246","url":null,"abstract":"Conventionally circuit performance variability is analyzed with Monte-Carlo simulation and design corner analysis. On the other hand, statistical methods such as design of experiments (DoEs), response surface modeling (RSM) and compact modeling (CM) can achieve a better trade-off between simulation efficiency and accuracy. This paper investigates these variability-aware analysis methodologies. Based on industry standard BSIM4 compact model, selected physical parameters are applied to DoE-RSM and CM methods. Methodologies are validated with both analog (op-amp) and digital circuits (flip-flop) at 65 nm node. A 3X speed up is achieved with DoE-RSM. A proper selection of CM parameters is critical to model accuracy.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115681942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analyzing the nonlinearity of binary phase detector in phase-locked loops 锁相环中二元鉴相器的非线性分析
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933253
L. Ni, X. Xu
{"title":"Analyzing the nonlinearity of binary phase detector in phase-locked loops","authors":"L. Ni, X. Xu","doi":"10.1109/RFIT.2014.6933253","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933253","url":null,"abstract":"Clock Data Recovery (CDR) circuits based on binary phase detector gained popularity in the last decade. In this paper, nonlinear control theory, specifically describing function, is employed to analyze the stability of PLL circuits for both ideal binary phase detector (BPD) and BPD with consideration of metastability. The significance of loop delay and metastability are discussed. The derived results can be used to guide the loop design.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125286106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.03mm2 highly balanced balun IC for millimeter-wave applications in 180-nm CMOS 0.03mm2高度平衡的平衡IC，用于毫米波应用在180纳米CMOS
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933244
Zheng Sun, Xiao Xu, Xin Yang, T. Shibata, T. Yoshimasu
{"title":"A 0.03mm2 highly balanced balun IC for millimeter-wave applications in 180-nm CMOS","authors":"Zheng Sun, Xiao Xu, Xin Yang, T. Shibata, T. Yoshimasu","doi":"10.1109/RFIT.2014.6933244","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933244","url":null,"abstract":"A miniaturized broadband balun IC in 180-nm CMOS is presented for millimeter-wave applications. The balun IC is designed so that high impedance ratio between the even and odd modes is achieved by utilizing Electro-magnetic solver suitable for planer structure. The fabricated balun IC in 180-nm CMOS process occupies only 0.03 mm2. The balun IC exhibits an amplitude imbalance of less than 0.9 dB and a phase imbalance of less than 2.5 degrees in a frequency range from 20 GHz to 66 GHz.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117312144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2.5-GHz band low-voltage class-E power amplifier IC for short-range wireless communications in 180-nm CMOS 一种用于近距离无线通信的2.5 ghz频段低压e类功率放大器IC
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933241
Xiao Xu, Zheng Sun, Kangyang Xu, Xin Yang, T. Kurniawan, T. Yoshimasu
{"title":"A 2.5-GHz band low-voltage class-E power amplifier IC for short-range wireless communications in 180-nm CMOS","authors":"Xiao Xu, Zheng Sun, Kangyang Xu, Xin Yang, T. Kurniawan, T. Yoshimasu","doi":"10.1109/RFIT.2014.6933241","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933241","url":null,"abstract":"A fully integrated class-E power amplifier IC in 180-nm CMOS is presented for 2.5-GHz band short range wireless communication systems. To realize high efficiency with low operation voltage, a class-E amplifier with back gate effect has been designed, fabricated and fully evaluated. The proposed amplifier IC can operate at a supply voltage from 0.5 V to 1.5 V. The amplifier IC exhibits a P1dB of 6.9 dBm and a saturated output power of 10.7 dBm with a maximum drain efficiency of 36.4% at a 1.0 V power supply.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"28 26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123389709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Terahertz CMOS integrated circuits 太赫兹CMOS集成电路
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933268
T. Lee
{"title":"Terahertz CMOS integrated circuits","authors":"T. Lee","doi":"10.1109/RFIT.2014.6933268","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933268","url":null,"abstract":"Advances in circuit techniques, aided by continued lithographic scaling, will deliver CMOS technology capable of operation in the submillimeter-wave bands. Many building blocks operating at near-THz frequencies in silicon-based technologies (SiGe and CMOS) have appeared in the recent literature. Although many significant challenges remain, these results suggest that CMOS THz ICs are an inevitability. Applications that reside in the “terahertz gap,” mapped against the projected capabilities of CMOS, provide a context for identifying the most important remaining problems. The lack of efficient, high-power (watt-level) sources remains the most conspicuous impediment to further progress. The talk concludes with an examination of the potential of vacuum electronic devices to solve the transmit power problem.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"91 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114050883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design of a novel compact lowpass filter with defected ground structure and open stubs 一种新型紧凑型低通滤波器的设计
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933260
Yong Yang, Yuxing He, Liguo Sun
{"title":"Design of a novel compact lowpass filter with defected ground structure and open stubs","authors":"Yong Yang, Yuxing He, Liguo Sun","doi":"10.1109/RFIT.2014.6933260","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933260","url":null,"abstract":"A novel lowpass filter(LPF) with compact size, which contains a pair of symmetrical dumbbell ring shaped defected ground structure (PSD-DGS) and compensated microstrip line with open shunt stubs, is presented in this paper. Sharp cut-off characteristics is obtained by the PSD-DGS, while the compensated microstrip line is used to reduce the loss of passband. Moreover, open shunt stubs is implemented to suppress harmonics and expand the stopband. Therefore, the compact lowpass filter has plenty of advantages like flat passband, sharp cut-off and wide stopband, as well as low cost and easy fabrication.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122802026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 60-GHz SPST switch in 65-nm CMOS technology 采用65纳米CMOS技术的60 ghz SPST开关
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933242
Anak Agung Alit Apriyana, Yue Ping Zhang
{"title":"A 60-GHz SPST switch in 65-nm CMOS technology","authors":"Anak Agung Alit Apriyana, Yue Ping Zhang","doi":"10.1109/RFIT.2014.6933242","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933242","url":null,"abstract":"An enhanced circuit model is developed for a 60-GHz single-pole single-throw (SPST) switch in 65nm CMOS technology in this paper. The enhanced circuit model involves the modeling of the drain-to-source parasitic capacitances that are introduced by the overlapped multi-finger drain-to-source metallization of the transistors and also the modeling the distributive and coupling effect of lines interconnection, testing pads and ground metals. The enhanced circuit model leads to an improved agreement between the simulated and measured performance over the frequency range from 1 to 170 GHz.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127172034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Built-in-self-test 3-D ring oscillator for stacked 3DIC 内置自检3-D环形振荡器堆叠3DIC
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933251
C. Jin, Ni Wang, Xiaowen Xu, Houjun Sun
{"title":"Built-in-self-test 3-D ring oscillator for stacked 3DIC","authors":"C. Jin, Ni Wang, Xiaowen Xu, Houjun Sun","doi":"10.1109/RFIT.2014.6933251","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933251","url":null,"abstract":"A 3-D ring oscillator integrated with through silicon vias (TSVs) is designed and fabricated for testing multilayer stacked integrated circuits with TSV. The proposed 3-D ring oscillator consists of 13 stages. 65-nm CMOS dies with two current-starved inverter and via-last TSVs are designed for the five middle layers of 3-D ring oscillator. The two cascaded inverters are connected to the up-side layer through a TSV and to the down-side layer through a micro-bump. One chip with two inverters but without TSV is stacked in the top layer of the 3-D ring oscillator to realize the ring oscillator loop, and one logic chip with one inverter and via-middle TSVs are in the bottom of the ring oscillator. The characteristics of via-last and via-middle TSVs in the 3-D ring oscillator are analyzed based on the equivalent circuits. The oscillate frequency responses of the designed 3-D ring oscillator are measured finally to verify the design concept, and to assess the performance of the 3-D ring oscillator. The measured results demonstrate that the proposed 3-D ring oscillator is an attractive candidate for testing the stacked 3-D integrated circuit, and the effect of TSVs dominants the delay of the 3-D ring oscillator.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116359664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A monolithic integrated 85 GHz schottky rectenna with dynamic tuning range of the conversion voltage 一种具有动态调谐转换电压范围的85 GHz肖特基整流天线
2014 IEEE International Symposium on Radio-Frequency Integration Technology Pub Date : 2014-10-23 DOI: 10.1109/RFIT.2014.6933240
Wogong Zhang, E. Kasper, M. Oehme, M. Kaschel, V. Stefani, J. Schulze
{"title":"A monolithic integrated 85 GHz schottky rectenna with dynamic tuning range of the conversion voltage","authors":"Wogong Zhang, E. Kasper, M. Oehme, M. Kaschel, V. Stefani, J. Schulze","doi":"10.1109/RFIT.2014.6933240","DOIUrl":"https://doi.org/10.1109/RFIT.2014.6933240","url":null,"abstract":"In this paper, the latest research results for design and characterization of an 85 GHz fully monolithic integrated schottky rectenna (rectifying antenna) using SiMMWIC (Silicon Monolithic Mm-Wave Integrated Circuits) technology are presented. Under RF excitation in frequency range of 75 ~ 90 GHz a sharp receiving profile at 85 GHz of the designed rectenna is clearly characterized. With different bias currents (0.1 μA ~ 0.44 mA) the working point of the embedded schottky diode (cut-off frequency ~ 0.5 THz at 0 V) could be dynamically tuned for the optimal conversion voltage. The corresponding tuning range of the conversion voltage could be varied from 1 mV to 17 mV at 85 GHz.","PeriodicalId":281858,"journal":{"name":"2014 IEEE International Symposium on Radio-Frequency Integration Technology","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114083356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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