S. Ray, D. Berger, G. Czornyj, A. Kumar, R. Tummala
{"title":"Dual-Level Metal (DLM) method for fabricating thin film wiring structures","authors":"S. Ray, D. Berger, G. Czornyj, A. Kumar, R. Tummala","doi":"10.1109/ECTC.1993.346793","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346793","url":null,"abstract":"This paper describes a fabrication method for multilevel, thin film wiring in which each wiring level and a solid via or stud to the level below, are formed as one integral unit. The processing scheme described makes use of a photosensitive polyimide (PSPI) for defining the wiring channels and a non-photosensitive polyimide for the vias. The via opening in the non-photosensitive polyimide is formed by laser ablation while the wiring channels are formed in the PSPI layer by photolithography. The via hole and the channels in the PSPI are filled in the same metallization step consisting of electroplating copper over a sputtered seed layer. The wiring pattern is finally delineated when a planarization step removes the excess plated copper. This processing method, which we refer to as the Dual Layer Metallization (DLM) method, is found to be very economical, in terms of the number of process steps involved, for forming multilevel, polyimide-copper wiring structures.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125079824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A high density pad-on-pad connector utilizing a flexible circuit","authors":"R. Pokrzywa, V. Fiacco","doi":"10.1109/ECTC.1993.346806","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346806","url":null,"abstract":"This paper describes a high density, controlled impedance flexible interconnect system used between daughter cards and a mother board in a coolant immersed environment. Topics presented include connector design, alignment techniques utilized, uniform contact pressure methods, connector assembly and feasibility/reliability testing performed on the connector.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"155 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116364639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic process control of wire bonding","authors":"R. Pufall","doi":"10.1109/ECTC.1993.346839","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346839","url":null,"abstract":"For the real-time recording of essential bond parameters: bond-force; ultrasonic amplitude; bonding time; during the bonding process, sensors are applied to the bond arm. The methods (measuring procedures) and necessary hardware and software for the monitoring of the measured values have been developed. Strain gauges are fixed to the bond arm and provide a signal proportional to the applied bond-force. A piezo-ceramic sensor is attached to the horn of the bond arm to measure the amplitude of the ultrasound. The bond-time is deducible from the duration of the ultrasonic signal. The electrical signals are recorded and interpreted in real-time using a PC compatible PCD3T (Siemens) computer. The sensorised bond arm can be used advantageously with either nail-head or wedge-wedge bond machines, with both thick and thin wire bonds. Results are discussed for 25 /spl mu/m Al-wire bonds on different surfaces. To show correlation for ultrasound and bond-sticking, frequency-distributions are presented. To check bond quality, extensive shear tests and pull tests were performed. Results show that shear tests are more sensitive to bond quality than pull tests. The data from automatic process control can be used to substitute SPC (Statistical Process Control) and minimise destructive tests. Bond quality can be monitored by observing the 2nd harmonic of the ultrasonic signal. Bond parameters drifting towards bad bond quality can be avoided.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125486297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fine pitch COG technique for a TFT-LCD panel using an indium alloy","authors":"M. Mori, Y. Kizaki, M. Saito, A. Hongu","doi":"10.1109/ECTC.1993.346732","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346732","url":null,"abstract":"A fine pitch chip-on-glass (COG) bonding technique for liquid crystal display (LCD) panels has been developed. An IC chip with gold bumps was dipped in a stirred indium alloy bath in a nitrogen atmosphere without flux. Shallow-bowl-shaped In alloy bumps were selectively formed on the Au bumps on the IC electrodes. The minimum bump pitch was 50 /spl mu/m, and the bump size was 31 by 31 /spl mu/m. The In alloy bumps whose minimum pitch was 100 /spl mu/m were connected to molybdenum conductors without flux at low pressure (30 gf/bump or less) and low temperature (110/spl deg/C or less). The temperature was lower than the alloy melting point. The mean contact resistance was 0.78 /spl Omega/. It was found that the calculation of the minimum bump pitch for the bump sizes and the In alloy bump height is useful for designing new ICs with fine pitch bumps. It has been demonstrated through a thermal shock test (TST), a high temperature and high-humidity storage test; and a high-temperature storage test that the contact resistance changes satisfied the specification. Prototype TFT-LCD panels with 80-/spl mu/m pitch driver ICs were successfully developed.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130425418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A high mechanical strength Z5U dielectric for surface mount MLC capacitors","authors":"L. Mann, S.P. Gupta","doi":"10.1109/ECTC.1993.346827","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346827","url":null,"abstract":"Multilayer ceramic capacitors made from dielectrics with a Z5U temperature characteristic are often perceived as offering inferior reliability as compared to those made from X7R dielectrics. In reality, the inherent reliability of Z5U and X7R dielectrics in use today are very similar. Product reliability often depends more on the design characteristics of the product than on the inherent reliability of the materials used. In this sense, products made with Z5U dielectrics may actually provide higher reliability than their X7R counterparts. One valid concern with many Z5U dielectrics is their relatively low mechanical strength as compared to X7R dielectrics. This concern is especially important in regard to surface mount components. Recently, a Z5U dielectric with a mechanical strength equivalent to that for the strongest X7R dielectrics was developed.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116849608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Coaxial SMT module connector for high-speed MCM","authors":"S. Sasaki, T. Kishimoto, N. Sugiura","doi":"10.1109/ECTC.1993.346808","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346808","url":null,"abstract":"This paper describes a trial coaxial surface mounted connector for PGA-type high-speed multichip modules (MCM). An MCM connector is needed to ensure testability and connection reliability of MCMs mounted on a printed circuit board. Our connector consists of a coaxial elements, a common ground housing made of conductive resin, and a ground contact spring plate. It has 68 signal contacts. We investigated the performance of this connector by experiment and simulation. Its insertion force is only about 53 gf per signal pin. The characteristic impedance is from 45.6 /spl Omega/ to 61.4 /spl Omega/. The average resistance between two contacts is 28 m/spl Omega/ with a deviation of less than plus or minus 5 m/spl Omega/. The insertion loss was measured to be -0.4 dB at 1.0 GHz. Crosstalk noise is less than 1.2%. This prototype-connector transmitted pulses of up to 1.2 Gb/s, showing that it is applicable to high-speed MCMs.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"230 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117321275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermal enhancement of surface mount electronic packages with heat sinks","authors":"H. Shaukatullah, M. Gaynes, L.H. White","doi":"10.1109/ECTC.1993.346832","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346832","url":null,"abstract":"Surface mount plastic packages are a cost effective way to package integrated circuit chips. However, plastics have poor thermal conductivity and therefore, plastic packages are not suitable for packaging high powered chips. Recently several variations of surface mount plastic packages have been developed for improving the thermal performance. These various techniques for improving the thermal performance can be broadly classified into two categories: internal enhancement of the package and external enhancement. For internal enhancement, high conductivity materials are used to improve heat spreading within the package. Examples of such enhancement include plastic packages with molded and exposed heat spreaders, packages made from metals like aluminium, and ceramic packages. For external enhancement, the thermal performance is improved by attaching a suitable heat sink to the package. This paper discusses the thermal performance of the various surface mount packages with and without heat sinks. It is shown that with a suitable heat sink, the thermal performance of a plastic package is similar to that of a metal or a plastic package with exposed heat spreader. In terms of cost, heat sink attachment offers the most cost effective way of improving the thermal performance of the plastic package, provided there is some space available for the heat sink.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133017073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of a low stress silicon-carbon liquid encapsulant","authors":"D. L. Robinson, R. Brady, I. M. Higgins","doi":"10.1109/ECTC.1993.346762","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346762","url":null,"abstract":"Mismatches in thermal expansion between encapsulant, die and substrate lead to stresses that can cause failures in thermal cycling of electronic parts. These stresses become especially troublesome as die size increases. In order to minimize failures, low stress encapsulants are needed. This paper describes development of a low stress silicon-carbon liquid encapsulant. Development was done on multichip modules (MCM-L) with large die. In order to develop a low stress encapsulant, a designed experiment was run. Variables in the full factorial design included: (1) encapsulant filler level, (2) encapsulant elastomer type, (3) encapsulant elastomer level, (4) board thickness, and (5) cure schedule. The material variables (1-3) gave rise to 8 formulations with widely varying properties, such as CTE and modulus. Air to air thermal cycling (-55/spl deg/C to +125/spl deg/C) was performed on MCM-L test boards with encapsulated 7.62 mm/spl times/19.05 mm (300 mil/spl times/750 mil) die. Parts were tested in situ throughout the cycling up to 2000 cycles. Results of the designed experiment indicated that filler level was the dominant variable, with high filler level providing the most reliability. Several other variables perhaps had minor effects. Continuing work is examining filler content, elastomer content, and dispensability further.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133232640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Active board concurrent maintenance","authors":"S. Makow","doi":"10.1109/ECTC.1993.346804","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346804","url":null,"abstract":"Due to the shrinking time allowed for deferred repair of system hardware in an increasing number of customer environments, it became evident that concurrent maintenance was a highly desirable capability. Concurrent maintenance is a method of installing or replacing a circuit card into a functioning, powered board without disrupting any part of the active system. With the appropriate hardware and software, defective cards can be replaced without impacting system operation or availability. When the power connection between a card and board is made, large transient current surges occur in the power distribution system. This creates noise on adjacent card voltage plates and signal lines. This disturbance can be reduced by slowing down and limiting the current surge into a card during a field replacement. This paper reviews the general requirements needed to implement concurrent maintenance in a card on board package. Concurrent maintenance impacts card design, board design, and power system design. However, the key to implementing concurrent maintenance is the design of a multiple pin length connector system.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115857540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The preparation and electrical conduction of Li/sub 2/SnO/sub 3/ thick film humidity sensitive material","authors":"J.L. Zhang, Y.D. Lu, B.R. Li, J. Meng","doi":"10.1109/ECTC.1993.346698","DOIUrl":"https://doi.org/10.1109/ECTC.1993.346698","url":null,"abstract":"Li/sub 2/SnO/sub 3/ thick film was fabricated as a humidity-sensitive material with high sensitivity, low temperature coefficient and humidity hysteresis, and long-time stability. The humidity sensitivity and electrical conduction under different values of relative humidity were investigated. The complex impedance spectrum of the materials was measured and a non-Debye model was introduced to study the conduction mechanism. The linear and inclined semi-circle complex impedance diagrams were observed in vacuum and environmental humidities, respectively. The equivalent parameters were calculated and related to the different regions in the materials, namely, grain, grain surface, and electrode surface. The results indicate that the main conduction carriers are H+ and Li+, and that the grain resistance is nearly independent of the relative humidity, whereas the resistance of the grain surface decreases with increasing relative humidity.<<ETX>>","PeriodicalId":281423,"journal":{"name":"Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115516197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}