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Proceedings of Conference on Computer Architectures for Machine Perception最新文献

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An FPGA-based point pattern matching processor with application to fingerprint matching 基于fpga的点模式匹配处理器及其在指纹匹配中的应用
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521064
N. Ratha, A. K. Jain, D. Rover
{"title":"An FPGA-based point pattern matching processor with application to fingerprint matching","authors":"N. Ratha, A. K. Jain, D. Rover","doi":"10.1109/CAMP.1995.521064","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521064","url":null,"abstract":"We describe the design and synthesis of a high-performance coprocessor for point pattern matching with application to fingerprint matching using Splash 2-an attached processor for SUN SPARCstation hosts. Each of the field programmable gate array (FPGA)-based processing elements (PEs) is programmed using VHDL behavioral modeling. Using the simulation tools, the program logic is verified. The final control bit stream for the PEs is generated using the synthesis tools. The point feature matching coprocessor can run at a peak speed of 17.1 MHz per feature vector of a fingerprint. With 65 features per fingerprint, the matching speed has been projected at the rate of 2.6*10/sup 5/ fingerprints/sec. The synthesized coprocessor was tested on a 10000 fingerprint database.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121561675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Data level parallel processing for object recognition on Recursive Torus Architecture 递归环面结构中目标识别的数据级并行处理
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521023
T. Matsuyama, N. Asada, M. Aoyama, A. Kamashita, H. Asazu, H. Yamamoto, K. Ogawa
{"title":"Data level parallel processing for object recognition on Recursive Torus Architecture","authors":"T. Matsuyama, N. Asada, M. Aoyama, A. Kamashita, H. Asazu, H. Yamamoto, K. Ogawa","doi":"10.1109/CAMP.1995.521023","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521023","url":null,"abstract":"The paper gives a brief overview of the hardware design of RTA/1 (with 1024 PEs), a parallel machine designed based on the Recursive Torus Architecture (T. Matsuyama et al., 1993). We developed a small scale prototype machine with 16 PEs, RTA/0, to evaluate its performance. Then, we propose a scheme of data level parallel processing on RTA/1 and demonstrate its utilities by implementing complex parallel processes for bottom up object recognition on RTA/0.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130800836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PAVIA: a control system for active vision PAVIA:主动视觉控制系统
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521047
G. Danese, R. Lombardi, M. Morizio, C. Revelli
{"title":"PAVIA: a control system for active vision","authors":"G. Danese, R. Lombardi, M. Morizio, C. Revelli","doi":"10.1109/CAMP.1995.521047","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521047","url":null,"abstract":"A cooperation between the Microcomputer Laboratory and the Artificial Vision Laboratory of the Informatics and Systemics Department of the University of Pavia led to a design project for a control system for active vision, named PAVIA (Project for an Active VIsion Apparatus). The system allows one to control the movements and the independent positioning of two cameras. A workstation network processes the data received from the cameras and consequentially sends commands to drive four step motors to implement independent 4-axis movements. Furthermore, it is possible to control the shot parameters.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"271 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133079893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Image classification system based on cortical representations and unsupervised neural network learning 基于皮质表征和无监督神经网络学习的图像分类系统
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521068
Nicolai Petkov
{"title":"Image classification system based on cortical representations and unsupervised neural network learning","authors":"Nicolai Petkov","doi":"10.1109/CAMP.1995.521068","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521068","url":null,"abstract":"A preprocessor based on a computational model of simple cells in the mammalian primary visual cortex is combined with a self-organising artificial neural network classifier. After learning with a sequence of input images, the output units of the system turn out to correspond to classes of input images and this correspondence follows closely human perception. In particular, groups of output units which are selective for images of human faces emerge. In this respect the output units mimic the behaviour of face selective cells that have been found in the inferior temporal cortex of primates. The system is capable of memorising image patterns, building autonomously its own internal representations, and correctly classifying new patterns without using any a priori model of the visual world.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130243429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Implementation and evaluation of a parallel architecture using asynchronous communications 使用异步通信的并行架构的实现和评估
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521025
D. Dulac, S. Mohammadi, A. Mérigot
{"title":"Implementation and evaluation of a parallel architecture using asynchronous communications","authors":"D. Dulac, S. Mohammadi, A. Mérigot","doi":"10.1109/CAMP.1995.521025","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521025","url":null,"abstract":"The paper describes the architecture of a SIMD massively parallel computer, based on a model called associative mesh. Associative mesh is a reconfigurable interconnection whose basic primitives combine efficiently communications and computations, thanks to an asynchronous scheme. We present the physical implementation of an associative network, with 8-connected 2D mesh topology specifically designed for applications in the computer vision domain. Some results of simulations and evaluations are shown.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126047605","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
KUMP/D: the Kyushu University multi-media processor KUMP/D:九州大学多媒体处理器
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521061
H. Tomiyasu, T. Kawano, R. Taniguchi, M. Amamiya
{"title":"KUMP/D: the Kyushu University multi-media processor","authors":"H. Tomiyasu, T. Kawano, R. Taniguchi, M. Amamiya","doi":"10.1109/CAMP.1995.521061","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521061","url":null,"abstract":"High speed image and video processing is a key technology in multimedia applications, and, therefore, currently, many hardware accelerators to speed up such processing are developed and used. However, for the next generation advanced multimedia applications in the next generation, such as high quality virtual reality, bidirectional visual interface, etc., the hardware accelerators can not deal with tasks involved in these applications. This is because these tasks consist of complex and irregular computation structures, and therefore, it is not easy to implement simple hardware accelerators for these tasks. Considering the above situation, for the next generation multimedia applications, we have been developing a MIMD based multimedia processor, KUMP/D (Kyushu University Multimedia Processor on Datarol-II). KUMP/D is a flexible parallel processor, based on fine grain parallel processing, which is which indispensable in complex and irregular computation, and is also equipped with a specialized I/O network. This I/O network has enough throughput for real time video I/O, providing a mechanism, which supports the synchronization of process executions and real time video frames.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133601945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Towards real-time stereo employing parallel algorithms for edge-based and dense stereo matching 采用并行算法实现基于边缘和密集立体匹配的实时立体
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521045
A. Koschan, V. Rodehorst
{"title":"Towards real-time stereo employing parallel algorithms for edge-based and dense stereo matching","authors":"A. Koschan, V. Rodehorst","doi":"10.1109/CAMP.1995.521045","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521045","url":null,"abstract":"Few problems in computer vision have been investigated more vigorously than stereo. Nevertheless, the main obstacle on the way to their practical application is the excessively long computation time needed to match stereo images. This paper presents parallel algorithms for edge-based stereo that are suitable for depth computation. Edge-based stereo techniques produce only sparse depth maps; thus we present, in addition, an efficient parallel algorithm for dense stereo matching that can be employed in scene reconstruction. Both approaches are implemented on several different computers to measure their performance. We compared single-processor and multiple-processor implementations to evaluate the profit of parallel realizations. We show that both approaches are very suitable for parallel implementations and that the computing time can be considerably reduced with parallel implementations. Furthermore, we present the results that are obtained when employing the different approaches to stereo images.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124619746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Parallelizable asychronous by blocks algorithms for neural computing 神经计算中可并行异步的块算法
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521071
O. Mahamoudou, P. Bourret
{"title":"Parallelizable asychronous by blocks algorithms for neural computing","authors":"O. Mahamoudou, P. Bourret","doi":"10.1109/CAMP.1995.521071","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521071","url":null,"abstract":"We deal with neural computing parallel algorithms suitable for parallel processing machines and apply them to solve combinatorial optimization problems. Problems are mapped onto a spin glass model then we utilize simulated annealing and mean field theory (MFT) approximation method. It is well known that the main problem of the synchronous algorithms is to be trapped in limit cycles thus we propose an extension of the MFT approximation method of (Boisson, 1993). Though we reduced parallelism, the algorithms proposed are efficient enough to avoid the limit cycles. We obtained good results in solving our NP-hard target problem, the maximum independent set graph problem.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115304366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An image sensor for on-sensor-compression 用于传感器上压缩的图像传感器
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521014
K. Aizawa, Y. Egi, T. Hamamoto, M. Hatori, J. Yamazaki
{"title":"An image sensor for on-sensor-compression","authors":"K. Aizawa, Y. Egi, T. Hamamoto, M. Hatori, J. Yamazaki","doi":"10.1109/CAMP.1995.521014","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521014","url":null,"abstract":"We present a novel image sensor on which image signal can be compressed. Since image signal is compressed on an imager plane by making use of parallel nature of image signals, the amount of signal read out from the imager can be significantly reduced. Thus, the proposed sensor can be potentially applied to high pixel rate cameras and processing systems which require very high speed imaging and very high resolution real time imaging; the very high bandwidth is the fundamental limitation for feasibility of those high pixel rate sensors and processing systems. Analog circuits have been designed both for processing in each pixel and for controlling entire data rate. A first prototype of a VLSI chip has been fabricated. Some results of the examination are shown in this paper.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127197640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Real-time image compression using SIMD architectures 使用SIMD架构的实时图像压缩
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521050
P. Moravie, H. Essafi, C. Lambert-Nebout, J. Basille
{"title":"Real-time image compression using SIMD architectures","authors":"P. Moravie, H. Essafi, C. Lambert-Nebout, J. Basille","doi":"10.1109/CAMP.1995.521050","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521050","url":null,"abstract":"Today, in the digitized satellite image domain, the need for high-dimension images is increasing considerably. To transmit or to store such images (more than 6000/spl times/6000 pixels), we need to reduce their data volume, and so we have to use image compression techniques. In most cases, these operations have to be processed in real time. The large amount of computations required by classical image compression algorithms prohibits the use of common sequential processors. To solve this problem, CEA (in collaboration with CNES) has tried to define the best-suited architecture for image compression. In order to achieve this aim, we developed and evaluated a new parallel image compression algorithm for general-purpose parallel computers using data-parallelism. This paper presents this new parallel image compression algorithm. We present implementation results on several parallel computers. We also examine load balancing and data mapping problems. We end by defining optimal characteristics of the parallel machine for real-time image compression.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130205402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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