Proceedings of Conference on Computer Architectures for Machine Perception最新文献

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Fault-tolerance and reconfigurability issues in massively parallel architectures 大规模并行架构中的容错和可重构性问题
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521058
F. Distante, M. Sami, R. Stefanelli
{"title":"Fault-tolerance and reconfigurability issues in massively parallel architectures","authors":"F. Distante, M. Sami, R. Stefanelli","doi":"10.1109/CAMP.1995.521058","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521058","url":null,"abstract":"Fault tolerance is a basic requirement for many applications of massively parallel architectures; these, in turn, provide the opportunity to exploit regularity of the architecture to perform reconfiguration with a relatively simple interconnection structure and reduced number of spare elements. Interconnection complexity is taken as the guiding figure of merit. Reconfiguration approaches based on a stringent channel width limitation are presented. Performances are seen to be very good; furthermore, the solution can be extended to a comprehensive fault model, allowing the presence of faults in bus segments and switches as well as in PEs.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122344040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Low level segmentation using CMOS smart hexagonal image sensor 采用CMOS智能六边形图像传感器进行低电平分割
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521015
M. Tremblay, S. Dallaire, D. Poussart
{"title":"Low level segmentation using CMOS smart hexagonal image sensor","authors":"M. Tremblay, S. Dallaire, D. Poussart","doi":"10.1109/CAMP.1995.521015","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521015","url":null,"abstract":"The exploitation of analog VLSI techniques combined with computer vision knowledge offers spectacular possibilities. Limitations of current VLSI technologies do not allow to create sensors with extremely complex pixel architecture, but the coupling of external CMOS analog processing units is a great solution for rapid low level segmentation processes. This paper presents a novel sensing approach where photo-transduction, multiresolution feature extraction, scale-space integration, and edge tracking combined with sub-pixel interpolation are performed on a mixed-signal (digital-analog) VLSI architecture. The paper also discusses how we implement the curvature primal sketch into the system for higher level scene representation. The main sensory part of this integrated image acquisition system is a CMOS sensor called Multiport Access photo-Receptor (MAR). VLSI also provides means to integrate analog computing, digital controller, and DSP co-processor modules which define a powerful sensory chip set for focal plane image processing. A current version of the MAR sensor which implements 256/spl times/256 pixels includes 16 analog spatial filters which simultaneously compute multiresolution edge maps. This novel smart image sensor approach with associated low level segmentation capability presents good opportunities for real time automated process for the particular case of unstructured environment.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127713193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Euclidean distance transform on Polymorphic Processor Array 多态处理器阵列上的欧氏距离变换
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521052
P. Baglietto, M. Maresca, M. Migliardi
{"title":"Euclidean distance transform on Polymorphic Processor Array","authors":"P. Baglietto, M. Maresca, M. Migliardi","doi":"10.1109/CAMP.1995.521052","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521052","url":null,"abstract":"Describes a new parallel algorithm for the Euclidean distance transform on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh interconnection network. The transform converts a binary image which consists of object pixels and non-object pixels into an image where every pixel takes the value of the distance between itself and the nearest object pixel in the original image. The proposed algorithm has been implemented using the Polymorphic Parallel C language and has been validated through simulation. Its computational complexity is O(N) (worst case) for pictures of N/spl times/N pixels on a Polymorphic Processor Array of N/spl times/N processing elements.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123765390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 64 parallel integrated memory array processor and a 30 GIPS real-time vision system 64并行集成存储阵列处理器和30 GIPS实时视觉系统
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521046
Y. Fujita, N. Yamashita, S. Okazaki
{"title":"A 64 parallel integrated memory array processor and a 30 GIPS real-time vision system","authors":"Y. Fujita, N. Yamashita, S. Okazaki","doi":"10.1109/CAMP.1995.521046","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521046","url":null,"abstract":"Describes a parallel-processor LSI chip (the Integrated Memory Array Processor, IMAP) and a compact real-time vision system (RVS-2). The IMAP integrates 64 8-bit processors, which operate in a SIMD manner, and 2-Mbit image memory on a single chip, and has peak performance of 3.84 GIPS. The RVS-2 consists of 8 IMAPs, a video interface, a control LSI chip (the Real-time Vision System Controller, RVSC) and a host workstation. RVSC is a 16-bit processor which carries out global data operations as well as providing an instruction stream to IMAP processors. In the RVS-2 system, the IMAP processors accomplish data-parallel operations, the RVSC applies global data operations to the results, and the host workstation carries out higher-level recognition tasks using the results obtained by the IMAPs and the RVSC. The peak performance of the RVS-2 is 30 GIPS and most of the basic image processing is carried out in 0.1 to 0.7 ms, which is 50 to 300 times faster the video rate.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127074707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Object parts matching using Hopfield neural networks 使用Hopfield神经网络进行对象部件匹配
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521069
M. Schaffer, T. Chen
{"title":"Object parts matching using Hopfield neural networks","authors":"M. Schaffer, T. Chen","doi":"10.1109/CAMP.1995.521069","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521069","url":null,"abstract":"An optimization approach is used to solve the Cyclic Ordered Assignment (COA) problem which occurs when matching 2D object parts for recognition. The solution space for the COA problem becomes very large when partially occluded objects are considered. By associating the solutions of the COA problem with the local minima of the energy function for a 2D binary Hopfield network, a network is presented which can solve the problem by converging from an initial state to a local minima. The initial state of the network is an array representing the probabilities of matches between the corresponding parts of an unknown object and a known template object. By taking advantage of the computational power and parallel processing of the network we can arrive at a fast, accurate solution for each input state presented to the network.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114475535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
T++: a parallel object oriented language for a task and data parallel programming 一种并行的面向对象语言,用于任务和数据并行编程
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521043
H. Essafi, M. Pic, M. Viala, L. Nicolas
{"title":"T++: a parallel object oriented language for a task and data parallel programming","authors":"H. Essafi, M. Pic, M. Viala, L. Nicolas","doi":"10.1109/CAMP.1995.521043","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521043","url":null,"abstract":"Introduces T++, a parallel language with object-oriented features conceived to easily develop algorithms on multi-SIMD parallel computers. We propose a new semantics to express task parallelism and data parallelism in the same way. We describe the advantages of an object-oriented approach for this semantics. Finally, we explain how to implement it efficiently on a proprietary multi-SIMD architecture: the SYMPHONIE concept, an architecture that is well-suited for image processing.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122611468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High level synthesis of a defect detector 缺陷检测器的高级合成
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521066
F.S. Verdier, B. Zavidovique
{"title":"High level synthesis of a defect detector","authors":"F.S. Verdier, B. Zavidovique","doi":"10.1109/CAMP.1995.521066","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521066","url":null,"abstract":"We present an innovative methodology aimed at rapidly designing image processing systems. Within this environment the first step consists in emulating an IP algorithm on a massively parallel dedicated computer. A compact and functionally equivalent VLSI circuit is then derived by using a high level synthesis system called ALPHA. The whole methodology is presented and illustrated with an IP algorithm effectively designed.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125076842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A distributed edge detection and surface reconstruction algorithm 分布式边缘检测和表面重建算法
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521032
N. Ratha, T. Acar, M. Gokmen, A.K. Jain
{"title":"A distributed edge detection and surface reconstruction algorithm","authors":"N. Ratha, T. Acar, M. Gokmen, A.K. Jain","doi":"10.1109/CAMP.1995.521032","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521032","url":null,"abstract":"A scalable parallel algorithm for edge detection and surface reconstruction is presented. The algorithm is based on fitting a weak membrane to the pixel gray valves by minimizing the associated energy functional. The edge detection process is modeled as a line process and used as a constraint in minimizing the energy functional of the image. The optimal edge assignment cannot be obtained directly as the energy function is non-convex. Using graduated non-convexity (GNC) approach, the energy is minimized. The proposed parallel algorithm has been implemented on a cluster of workstations using the PVM communication library. The results of parallel implementation on synthetic and natural images are presented. The speedup is observed to be near-linear, thus providing scalability with the problem size. The parallel processing approach presented here can be extended to solve similar problems (e.g., image restoration, and image compression) which use regularization techniques.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128901402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Film semantic analysis 电影语义分析
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521041
J. Corridoni, A. del Bimbo
{"title":"Film semantic analysis","authors":"J. Corridoni, A. del Bimbo","doi":"10.1109/CAMP.1995.521041","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521041","url":null,"abstract":"In the paper the problem of video segmentation and semantic analysis for video indexing and cinematographic language classification is addressed. Large archives of video sequences will remain a largely unexploitable resource of information, unless a straightforward way to describe their content is designed. The first step to be considered in this direction is the highlighting of the syntactic units of the visual speech. Therefore, video segmentation must focus on the editing procedures, through which the shots are fused into the video stream. This work proposes a statistically based new data-driven algorithm to detect cuts between two shots in a video sequence. On the contrary, the analysis of how the other editing techniques are performed, supplies a mathematical model, upon which the algorithms for the detection of fades, dissolves and mattes are based. A second part of this work is devoted to a higher level analysis, which involves the semantics of a film. On the basis of the common film editing rules, a method is presented to detect when a set of shots has unitary meaning. Experimental validation of the techniques proposed is thereby presented.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129987169","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Data-parallel primitives for spatial operations using PM quadtrees 使用PM四叉树的空间操作的数据并行原语
Proceedings of Conference on Computer Architectures for Machine Perception Pub Date : 1995-09-18 DOI: 10.1109/CAMP.1995.521049
Erik G. Hoe, H. Samet
{"title":"Data-parallel primitives for spatial operations using PM quadtrees","authors":"Erik G. Hoe, H. Samet","doi":"10.1109/CAMP.1995.521049","DOIUrl":"https://doi.org/10.1109/CAMP.1995.521049","url":null,"abstract":"Data-parallel primitives for performing operations on the PM/sub 1/ quadtree and the bucket PMR quadtree are presented using the scan model. Algorithms are described for building these two data structures that make use of these primitives. The data-parallel algorithms are assumed to be main-memory resident. They were implemented on a Thinking Machines CM-5 with 32 processors containing 1 GB of main memory.","PeriodicalId":277209,"journal":{"name":"Proceedings of Conference on Computer Architectures for Machine Perception","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126976940","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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