发布求助
文献互助 智能选刊 最新文献

2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)最新文献

筛选
英文 中文
Measurement of IGBT trench MOS-gated region characteristics using short turn-around-time MOSFET test structures 利用短转弯时间MOSFET测试结构测量IGBT沟槽mos门控区特性
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383788
K. Takeuchi, M. Fukui, T. Saraya, K. Itou, S. Suzuki, T. Takakura, T. Hiramoto
{"title":"Measurement of IGBT trench MOS-gated region characteristics using short turn-around-time MOSFET test structures","authors":"K. Takeuchi, M. Fukui, T. Saraya, K. Itou, S. Suzuki, T. Takakura, T. Hiramoto","doi":"10.1109/ICMTS.2018.8383788","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383788","url":null,"abstract":"Trench MOSFET test structures were fabricated for evaluating IGBT MOS-gated region performance. It was found that the test structures can be used for measuring saturation and sub-threshold current, though accurate estimation of linear resistance is difficult. Charge pumping measurement can be used to evaluate the oxide/substrate interface quality, for possible application to process optimization.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125633184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Evaluation of Qss on SOI back Si/SiO2 interface by newly designed charge pumping method-TEG 用新设计的电荷泵送- teg法评价SOI背面Si/SiO2界面上的Qss
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383786
Kazuma Takeda, J. Ida, Takayuki Mori, Y. Arai
{"title":"Evaluation of Qss on SOI back Si/SiO2 interface by newly designed charge pumping method-TEG","authors":"Kazuma Takeda, J. Ida, Takayuki Mori, Y. Arai","doi":"10.1109/ICMTS.2018.8383786","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383786","url":null,"abstract":"The surface state density (Qss) of SOI back Si/SiO2 interfcae was evaluated by newly desiged Charge Pumping (CP) method-TEG. The CP method was also re-examied to apply to the thick oxide MOS. It was noted that the high volatge aplitude and attention on the slope on the gate pulse are nesessary to evaluate the Qss of SOI back interface made of the thick oxide. It was founded out that the Qss of SOI back interface (bonded wafer interface) is comparabe to that of the thermal oxidation interface and also that the Qss of Floating Zone (FZ) wafer is larger than that of Czochralski (CZ) wafer, and the Qss of FZ wafer varies from lot to lot.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"248 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114551255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of ultraflexible organic differential amplifier circuits for wearable sensor technologies 用于可穿戴传感器技术的超柔性有机差分放大电路设计
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383769
M. Kondo, T. Uemura, Mihoko Akiyama, N. Namba, Masahiro Sugiyama, Yuki Noda, T. Araki, S. Yoshimoto, T. Sekitani
{"title":"Design of ultraflexible organic differential amplifier circuits for wearable sensor technologies","authors":"M. Kondo, T. Uemura, Mihoko Akiyama, N. Namba, Masahiro Sugiyama, Yuki Noda, T. Araki, S. Yoshimoto, T. Sekitani","doi":"10.1109/ICMTS.2018.8383769","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383769","url":null,"abstract":"We have designed and evaluated ultraflexible organic differential amplifier circuits for wearable sensor technologies. Transistor modeling for both p-type and n-type organic thin-film transistors was prepared for circuit simulations. The developed organic amplifier shows high gain of 60 dB and operates with 3 V: it can be applied to imperceptible sensor circuits for biomedical applications.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126105454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Addressable test structure design enabling parallel testing of reliability devices 可寻址测试结构设计，可实现可靠性设备的并行测试
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383783
L. DeBruler, Dennis Pretti, M. Violette, Dave Peterson, S. Mujumdar, Xia Li, K. Marr
{"title":"Addressable test structure design enabling parallel testing of reliability devices","authors":"L. DeBruler, Dennis Pretti, M. Violette, Dave Peterson, S. Mujumdar, Xia Li, K. Marr","doi":"10.1109/ICMTS.2018.8383783","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383783","url":null,"abstract":"This new design enabled an efficient layout of breakdown test devices for parametric and reliability testing. These reliability circuits consisted of interlocking combs of routing layers with varying widths and spaces that were representative of the design rules. These were accessed through multiplexer controlled pass gates. All addresses could be simultaneously enabled for stress biasing and addressed individually for failure detection. Once a breakdown was detected, as current leakage of the comb, each device could be addressed sequentially to find the failing structure. This was an improvement over previous designs which either grouped many devices in parallel, but could not electrically identify which device was failing, or only had a single device enabled, but suffered from poor pad efficiency. The grouping of these devices allows for simultaneous parallel stressing of each force and ground pad pair on the parametric testers. Electrical measurement showed that the same breakdown voltage values measured on this mux design were the same as standalone devices.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131132378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Comprehensive investigation on parameter extraction methodology for short channel amorphous-InGaZnO thin-film transistors 短通道非晶ingazno薄膜晶体管参数提取方法的综合研究
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383756
C. Tanaka, K. Ikeda
{"title":"Comprehensive investigation on parameter extraction methodology for short channel amorphous-InGaZnO thin-film transistors","authors":"C. Tanaka, K. Ikeda","doi":"10.1109/ICMTS.2018.8383756","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383756","url":null,"abstract":"We proposed a comprehensive parameter extraction method for short channel amorphous InGaZnO (α-InGaZnO) thin-film transistors (TFTs) on the basis of measurement data and TCAD simulations. Single parameter set were successfully extracted for channel length down to 500nm by using RPI α-Si TFT model with channel length modulation modeling. It makes possible to more accurate and scalable circuit performance characterization, since the extracted parameters correspond to the physical behavior of α-InGaZnO TFTs.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120943983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
System aware DUT design for optimum on-wafer noise measurement 系统感知DUT设计，优化晶圆上噪声测量
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383800
Chih-Hung Chen, Benson Yang, Pei-Hsien Chu, Graham Brown, Saswati Das
{"title":"System aware DUT design for optimum on-wafer noise measurement","authors":"Chih-Hung Chen, Benson Yang, Pei-Hsien Chu, Graham Brown, Saswati Das","doi":"10.1109/ICMTS.2018.8383800","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383800","url":null,"abstract":"This paper presents a system-aware design of device-under-tests (DUT) for optimum high-frequency (HF) on-wafer noise measurement. It overcomes the challenges in modeling the bias and geometry dependence of noise sources due to the voltage drop in the interconnections at the output port of a large DUT. It also prevents the measurement inaccuracy resulted from insufficient noise from a small DUT. Experimental data and suggested device sizes for different technologies are presented.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123602147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A test structure to reveal short-range correlation effects of mismatch fluctuations in backend metal fringe capacitors 一种揭示后端金属条纹电容器失配波动短距离相关效应的测试结构
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383771
H. Tuinhout, A. Z. Duijnhoven, I. Brunets
{"title":"A test structure to reveal short-range correlation effects of mismatch fluctuations in backend metal fringe capacitors","authors":"H. Tuinhout, A. Z. Duijnhoven, I. Brunets","doi":"10.1109/ICMTS.2018.8383771","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383771","url":null,"abstract":"This paper presents a set of test structures that revealed a thus far unknown (or at least unreported) CMP-related short-range correlated mismatch fluctuation effect on the matching of backend metal fringe capacitors. It is shown that an apparent degradation of mismatch standard deviations at medium-range distances is in fact due to an improvement of matching for devices placed at very small distances.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121077496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Measurement of temperature effect on random telegraph noise induced delay fluctuation 温度对随机电报噪声延迟波动影响的测量
2018 IEEE International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2018-03-01 DOI: 10.1109/ICMTS.2018.8383801
A. Islam, Masashi Oka, H. Onodera
{"title":"Measurement of temperature effect on random telegraph noise induced delay fluctuation","authors":"A. Islam, Masashi Oka, H. Onodera","doi":"10.1109/ICMTS.2018.8383801","DOIUrl":"https://doi.org/10.1109/ICMTS.2018.8383801","url":null,"abstract":"We present detailed measurement results of temperature effect on Random Telegraph Noise (RTN) induced delay fluctuation using a test chip fabricated in a 65-nm Silicon-On-Thin-Buried-Oxide process. Skewed ring oscillators (ROs) are used to characterize pMOFSET and nMOSFET specific RTN effects. Distributions of overall threshold fluctuation of a device have been extracted such that the simulated delay distribution matches with the measured delay distribution. For worst-case delay prediction, circuit analysis with Δντ distribution model for low temperature is necessary. Estimation results reveal that RTN amplitude decreases slightly with the increase of temperature. However, low correlation of 0.3 to 0.4 has been observed across temperatures ranging from 0 °C to 80 °C for delay paths. We find appearing and disappearing of traps across the temperature range causing the low correlation. Low correlation poses challenges in realizing robust runtime performance compensation techniques such as replica critical path based delay compensation.","PeriodicalId":271839,"journal":{"name":"2018 IEEE International Conference on Microelectronic Test Structures (ICMTS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125575257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
首页 上一页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信