2017 IEEE International Solid-State Circuits Conference (ISSCC)最新文献

{"title":"4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing","authors":"Tomohiro Yamazaki, H. Katayama, S. Uehara, Atsushi Nose, M. Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, S. Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Y. Muramatsu, M. Ishikawa","doi":"10.1109/ISSCC.2017.7870271","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870271","url":null,"abstract":"High-speed vision systems that combine high-frame-rate imaging and highly parallel signal processing enable instantaneous visual feedback to rapidly control machines over human-visual-recognition speeds. Such systems also enable a reduction in circuit scale by using a fast and simple algorithm optimized for high-frame-rate processing [1]. Previous studies on vision systems and chips [1–4] have yielded low imaging performance due to large matrix-based processing element (PE) parallelization [1–3], and low functionality of the limited-purpose column-parallel PE architecture [4], constraining vision-chip applications.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123256402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"28.2 An 11.4mW 80.4dB-SNDR 15MHz-BW CT delta-sigma modulator using 6b double-noise-shaped quantizer","authors":"Taewook Kim, Changsok Han, N. Maghari","doi":"10.1109/ISSCC.2017.7870464","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870464","url":null,"abstract":"Quantizers are key building blocks in both continuous-time (CT) and discrete-time (DT) delta-sigma modulators (DSMs). Among various types of quantizers, noise-shaping quantizers such as VCO-based quantizers and noise-shaped integrating quantizers (NSIQ) [1] are attractive solutions since they provide an additional order of quantization noise shaping. On one hand, VCO-based quantizers are relatively fast, but are often non-linear. On the other hand, NSIQs suffer from a tradeoff between the counting clock speed and resolution, but can be very linear. Nevertheless, the NSIQ offers an interesting benefit that the quantization error is inherently available in both time and voltage domains. Thus, the NSIQ can be easily extended to provide an additional order of noise shaping. In this paper, we propose a double noise-shaping quantizer (DNSQ) incorporating an NSIQ and a gated-ring-oscillator-based (GRO-based) quantizer [2] that not only provides 6b quantization levels with a back-end digital integrator [3], but also offers two extra orders of noise-shaping.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123393287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"14.4 A scalable speech recognizer with deep-neural-network acoustic models and voice-activated power gating","authors":"Michael Price, James R. Glass, A. Chandrakasan","doi":"10.1109/ISSCC.2017.7870352","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870352","url":null,"abstract":"The applications of speech interfaces, commonly used for search and personal assistants, are diversifying to include wearables, appliances, and robots. Hardware-accelerated automatic speech recognition (ASR) is needed for scenarios that are constrained by power, system complexity, or latency. Furthermore, a wakeup mechanism, such as voice activity detection (VAD), is needed to power gate the ASR and downstream system. This paper describes IC designs for ASR and VAD that improve on the accuracy, programmability, and scalability of previous work.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"283 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122954774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"17.1 A digitally assisted CMOS WiFi 802.11ac/11ax front-end module achieving 12% PA efficiency at 20dBm output power with 160MHz 256-QAM OFDM signal","authors":"Y. Chee, F. Golcuk, T. Matsuura, Chris Beale, James F. Wang, Osama Shanaa","doi":"10.1109/ISSCC.2017.7870376","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870376","url":null,"abstract":"Front-end modules (FEM) typically employ expensive III–V or SiGe technologies to provide relatively higher PA output power and lower LNA noise figure (NF) for larger distance coverage compared to what can be achieved in a CMOS transceiver SoC [1]. The WiFi FEM is typically designed as a standalone entity using linear and inefficient PA topologies, such as Class-A/AB, resulting in an FEM not taking advantage of the full capability of the transceiver SoC. Furthermore, due to the stringent EVM requirement, almost 10dB back-off from Psat is required, resulting in a poor PAE of <7% at +20dBm Pout for the conventional Class-A/AB topologies regardless of device technology [1–3]. The CMOS FEM in Fig. 17.1.1 addresses the above issues and achieves performance comparable to that of GaAs/SiGe FEM but offers higher efficiency while using the full capability of the transceiver to enhance its performance. The proposed FEM integrates a PA, an LNA, a T/R switch, a transmit signal-strength indicator (TSSI) and an RF digital pre-distortion (DPD) calibration loopback path. It has two ICs integrated inside the same package. The PA, the LNA, and the DPD-loopback path are implemented on a 55nm bulk CMOS IC, while the T/R switch, PA output balun, and TSSI are integrated on a 0.18µm CMOS SOI IC.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"60 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120992342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"EE2: Intelligent machines: Will the technological singularity happen?","authors":"S. Pellerano, Sungdae Choi, J. Rabaey","doi":"10.1109/ISSCC.2017.7870486","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870486","url":null,"abstract":"Artificial intelligence (AI) will no doubt have a significant impact on society in the coming years. But how intelligent can a machine be? When artificially-general intelligence is capable of recursive self-improvement, a hypothetical ‘runaway effect’ — an intelligence explosion — might happen, yielding an intelligence surpassing all current human control or understanding. This event is known as the technological singularity; this is the point beyond which events may become unpredictable or even unfathomable to human intelligence. This panel will picture the current state of the art for AI, deep learning and robotics, and try to predict where this technology is heading.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"47 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121013936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS","authors":"V. Bhagavatula, D. Kwon, Jaehun Lee, Q. Bui, Jeong-Hyun Choi, Siuchuang-Ivan Lu, S. Son","doi":"10.1109/ISSCC.2017.7870340","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870340","url":null,"abstract":"Multimode cellular RFICs need high dynamic range in order to simultaneously satisfy the high linearity requirements of LTE and the low-noise performance of 2G. Traditionally, SAW filters are employed to relax the noise-linearity trade-off at the cost of higher BOM. In a highly competitive market, mobile devices need to support >35 LTE bands, a number which is expected to rise further in the future, providing a strong motivation for SAW-less transmitter (TX) design. An LTE TX operating in the single resource-block (RB) mode is susceptible to spurious out-of-band (OOB) emission due to the high power spectral density concentrated in narrow bandwidths at frequency offsets as large as 4.5MHz (LTE10) or 9MHz (LTE20) from the carrier [1]. The most challenging condition is for B13 where the 3rd-order counter intermodulation (CIM3) product falls in an adjacent public-safety band. With 23dBm at the antenna, a B13-TX must ensure OOB emission less than −57dBm/6.25kHz in the public safety band.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"371 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122478469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"17.7 A packaged 90-to-300GHz transmitter and 115-to-325GHz coherent receiver in CMOS for full-band continuous-wave mm-wave hyperspectral imaging","authors":"T. Chi, Min-Yu Huang, Sensen Li, Hua Wang","doi":"10.1109/ISSCC.2017.7870382","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870382","url":null,"abstract":"Millimeter-wave/THz hyperspectral imaging has numerous applications in security, non-destructive evaluation, material characterization, and medical diagnostics [1]. Unlike single-frequency imaging, hyperspectral imaging operates over a wide frequency range and offers spectroscopic information on each imaging pixel. This combines mm-wave/THz high-resolution imaging with spectroscopy and improves detection sensitivity and specificity. In practice, pulse-based imaging supports fast data acquisition, but requires receiver (RX) with real-time wideband sampling (>50GHz). Such instantaneous broadband imaging modality inevitably exhibits severely degraded sensitivity (due to integrated noise) and requires high-end signal sampling, both of which make it very challenging to achieve a low-cost SoC solution. On the other hand, continuous-wave (CW) imaging supports better sensitivity, especially using coherent detection method with a low IF bandwidth [2–5]. Its operation allows for the use of a simplified heterodyne receiver, enabling silicon-based implementations of the entire imaging system. However, there are limited mm-wave/THz integrated electronic systems available that support CW hyperspectral imaging with a large bandwidth (BW), sufficient output power (Pout), and high sensitivity. Some existing CW transmitters (TX) use the harmonics for wideband coverage, which cannot support full-band scanning at any frequency in the band [2]. In this paper, a full-band CW TX/RX chipset is proposed to realize a generic hyperspectral imaging system without knowing the particular band of interest. We therefore optimize its performance to achieve flat TX Pout and RX conversion gain (CG) over a broad BW. Our mm-wave/THz hyperspectral imaging system comprises a 90-to-300GHz TX with a ±2dB Pout variation using a distributed quadrupler architecture and a 115-to-325GHz 4th-subharmonic coherent RX with −115dBm sensitivity (1kHz RBW) using high-order filter-based matching networks (MNs). The TX and RX chips are flip-chip integrated with wideband vivaldi antennas on low-cost organic LCP (liquid crystal polymer) substrates. This packaged wideband system offers a promising solution for low-cost field-deployable hyperspectral imaging.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123032774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"24.5 A 4.5nW wake-up radio with −69dBm sensitivity","authors":"Haowei Jiang, Po-Han Peter Wang, Li Gao, P. Sen, Young-Han Kim, Gabriel M. Rebeiz, D. Hall, P. Mercier","doi":"10.1109/ISSCC.2017.7870438","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870438","url":null,"abstract":"Wake-up receivers (WuRXs) are low-power radios that continuously monitor the RF environment to wake up a higher-power radio upon detection of a predetermined RF signature. Prior-art WuRXs have 100s of kHz of bandwidth [1] with low signature-to-wake-up-signal latency to help synchronize communication amongst nominally asynchronous wireless devices. However, applications such as unattended ground sensors and smart home appliances wake-up infrequently in an event-driven manner, and thus WuRX bandwidth and latency are less critical; instead, the most important metrics are power consumption and sensitivity. Unfortunately, current state-of-the-art WuRXs utilizing direct envelope-detecting [2] and IF/uncertain-IF [1,3] architectures (Fig. 24.5.1) achieve only modest sensitivity at low-power (e.g., −39dBm at 104nW [2]), or achieve excellent sensitivity at higher-power (e.g., −97dBm at 99µW [3]) via active IF gain elements. Neither approach meets the needs of next-generation event-driven sensing networks.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"137 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121768133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"25.3 A 1.3A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11nC enabled by high-voltage energy storing","authors":"A. Seidel, B. Wicht","doi":"10.1109/ISSCC.2017.7870446","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870446","url":null,"abstract":"More and more power electronics applications utilize GaN transistors as they enable higher switching frequencies in comparison to conventional Si devices. Faster switching shrinks down the size of passives and enables compact solutions in applications like renewable energy, electrical cars and home appliances. GaN transistors benefit from ∼10× smaller gate charge QG and gate drive voltages in the range of typically 5V vs. ∼15V for Si.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133891728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability","authors":"Kaiyuan Yang, Qing Dong, D. Blaauw, D. Sylvester","doi":"10.1109/ISSCC.2017.7870303","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870303","url":null,"abstract":"Physically Unclonable Functions (PUFs) are among the most promising security primitives for low cost solutions of key storage, chip authentication, and supply chain protection. Two types of PUFs exist in literature [1–6], a “strong” PUF with a large challenge-response space [6] and a “weak” PUF providing a limited length key (chip ID) [1–5]. While the former provides better security theoretically, existing implementations are prone to modeling attacks. So-called “weak” PUFs typically have an array of identically designed PUF cells that leverage device mismatch in fabrication as static entropy source, and serve as a low-cost and more secure alternative to non-volatile-memory-based key storage. Output stability across PVT variations and area are two critical metrics directly related to security and cost of a PUF. Recent works have presented custom PUFs based on NAND gates [1], current mirrors [2], PTAT [3], and cross-coupled inverters [4–5]. These outperform conventional SRAM-based PUFs, but sacrifice other metrics, e.g., [2, 4] are large, [3, 5] has lower native stability and energy efficiency, while [1] is sensitive to supply voltage and may experience large short circuit current. Finally, IoT and wireless sensor nodes tend to use older technologies for lower cost and standby power, which is challenging for PUF design because of smaller process variations.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115064515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}