2017 IEEE International Solid-State Circuits Conference (ISSCC)最新文献_第7页

F4: Wireless low-power transceivers for local and wide-area networks F4:用于局域网和广域网的无线低功耗收发器

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870482

J. V. Sinderen, D. Griffith, Ken Yamamoto, A. Liscidini, Young-sub Yuk

引用次数: 0

12.4 1.4Gsearch/s 2Mb/mm2 TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50% 12.4 1.4Gsearch/s 2Mb/mm2 TCAM采用两相预充ML传感和电网预处理，将Ldi/dt电源噪声降低50%

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870336

I. Arsovski, Michael Fragano, R. Houle, A. Patil, V. Butler, Raymond Kim, R. Rodriguez, T. Maffitt, J. J. Oler, John Goss, Christopher Parkinson, Michael A. Ziegerhofer, S. Burns

引用次数: 3

24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS 24.4 A 0.18V 382µW蓝牙低功耗(BLE)接收器，1.33nW休眠功率，用于28nm CMOS的能量收集应用

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870437

Wei-Han Yu, Haidong Yi, Pui-in Mak, Jun Yin, R. Martins

引用次数: 29

8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability 8.3基于物理不可克隆函数(PUF)的553F2 2晶体管放大器，具有1.67%的固有不稳定性

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870303

Kaiyuan Yang, Qing Dong, D. Blaauw, D. Sylvester

{"title":"8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability","authors":"Kaiyuan Yang, Qing Dong, D. Blaauw, D. Sylvester","doi":"10.1109/ISSCC.2017.7870303","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870303","url":null,"abstract":"Physically Unclonable Functions (PUFs) are among the most promising security primitives for low cost solutions of key storage, chip authentication, and supply chain protection. Two types of PUFs exist in literature [1–6], a “strong” PUF with a large challenge-response space [6] and a “weak” PUF providing a limited length key (chip ID) [1–5]. While the former provides better security theoretically, existing implementations are prone to modeling attacks. So-called “weak” PUFs typically have an array of identically designed PUF cells that leverage device mismatch in fabrication as static entropy source, and serve as a low-cost and more secure alternative to non-volatile-memory-based key storage. Output stability across PVT variations and area are two critical metrics directly related to security and cost of a PUF. Recent works have presented custom PUFs based on NAND gates [1], current mirrors [2], PTAT [3], and cross-coupled inverters [4–5]. These outperform conventional SRAM-based PUFs, but sacrifice other metrics, e.g., [2, 4] are large, [3, 5] has lower native stability and energy efficiency, while [1] is sensitive to supply voltage and may experience large short circuit current. Finally, IoT and wireless sensor nodes tend to use older technologies for lower cost and standby power, which is challenging for PUF design because of smaller process variations.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115064515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 68

20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS 20.1采用14nm三栅极CMOS工艺，采用平面磁芯的片上螺线管电感式全集成数字控制稳压器

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870398

H. Krishnamurthy, V. Vaidya, Sheldon Weng, K. Ravichandran, Pavan Kumar, Stephen T. Kim, Rinkle Jain, G. Matthew, J. Tschanz, V. De

引用次数: 17

20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS 20.5一种用于28nm CMOS应用处理器的具有动态动力电池和最小化交叉调节的双对称输出开关电容变换器

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870402

Junmin Jiang, Yan Lu, W. Ki, U. Seng-Pan, R. Martins

{"title":"20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS","authors":"Junmin Jiang, Yan Lu, W. Ki, U. Seng-Pan, R. Martins","doi":"10.1109/ISSCC.2017.7870402","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870402","url":null,"abstract":"Multicore application processors in smartphones/watches use power-saving techniques such as dynamic voltage and frequency scaling (DVFS) to extend battery cycle, and supply cores with different voltages [1]. High-efficiency fully integrated switched-capacitor (SC) power converters with no external components are promising candidates [2]. Typically, SC converters with different specifications are independently designed (Fig. 20.5.1), leading to a large area overhead, as each converter has to handle its peak output power. Recently, multi-output SC converters are reported to tackle this issue. In [3], an on-demand strategy is used to control two outputs, each with a different loading range, and the outputs are not interchangeable. In [4], the two output voltages are fixed with voltage conversion ratios (VCRs) of 2× and 3× only. In [5], the controller is integrated, but the three output voltages are still from three individual SC converters. Without reallocating the capacitors in the power stages, capacitor utilization is low, as margins have to be reserved to cater for each converter's peak output power. This paper presents a fully integrated dual-output SC converter with dynamic power-cell allocation for application processors. The power cells are shared and can be dynamically allocated according to load demands. A dual-path VCO that works independently of power-cell allocation is proposed to realize a fast and stable regulation loop. The converter can deliver a maximum current of 100mA: one output can be adjusted to deliver 100mA, while the other handles a very light load; or both outputs can be adjusted to deliver 50mA each with over 80% efficiency.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123494897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 18

21.1 Nanowatt circuit interface to whole-cell bacterial sensors 21.1纳瓦电路接口到全细胞细菌传感器

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870406

P. Nadeau, M. Mimee, Sean Carim, T. Lu, A. Chandrakasan

引用次数: 18

29.3 A 40Gb/s PAM-4 transmitter based on a ring-resonator optical DAC in 45nm SOI CMOS 29.3基于45nm SOI CMOS环形谐振光DAC的40Gb/s PAM-4发射机

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870473

S. Moazeni, Sen Lin, M. Wade, L. Alloatti, Rajeev J Ram, M. Popović, V. Stojanović

引用次数: 11

5.3 A 95µW 24MHz digitally controlled crystal oscillator for IoT applications with 36nJ start-up energy and >13× start-up time reduction using a fully-autonomous dynamically-adjusted load 5.3一个95µW 24MHz数字控制晶体振荡器，用于物联网应用，使用全自动动态调节负载，启动能量36nJ，启动时间减少>13倍

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870275

M. Ding, Yao-Hong Liu, Yan Zhang, Chuang Lu, P. Zhang, B. Busze, Christian Bachmann, K. Philips

引用次数: 23

9.3 A BJT-based temperature sensor with a packaging-robust inaccuracy of ±0.3°C (3σ) from −55°C to +125°C after heater-assisted voltage calibration 9.3基于bjt的温度传感器，加热辅助电压校准后，在- 55°C至+125°C范围内，封装稳扎性误差为±0.3°C (3σ)

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI: 10.1109/ISSCC.2017.7870311

B. Yousefzadeh, K. Makinwa

引用次数: 19