{"title":"8.3基于物理不可克隆函数(PUF)的553F2 2晶体管放大器,具有1.67%的固有不稳定性","authors":"Kaiyuan Yang, Qing Dong, D. Blaauw, D. Sylvester","doi":"10.1109/ISSCC.2017.7870303","DOIUrl":null,"url":null,"abstract":"Physically Unclonable Functions (PUFs) are among the most promising security primitives for low cost solutions of key storage, chip authentication, and supply chain protection. Two types of PUFs exist in literature [1–6], a “strong” PUF with a large challenge-response space [6] and a “weak” PUF providing a limited length key (chip ID) [1–5]. While the former provides better security theoretically, existing implementations are prone to modeling attacks. So-called “weak” PUFs typically have an array of identically designed PUF cells that leverage device mismatch in fabrication as static entropy source, and serve as a low-cost and more secure alternative to non-volatile-memory-based key storage. Output stability across PVT variations and area are two critical metrics directly related to security and cost of a PUF. Recent works have presented custom PUFs based on NAND gates [1], current mirrors [2], PTAT [3], and cross-coupled inverters [4–5]. These outperform conventional SRAM-based PUFs, but sacrifice other metrics, e.g., [2, 4] are large, [3, 5] has lower native stability and energy efficiency, while [1] is sensitive to supply voltage and may experience large short circuit current. Finally, IoT and wireless sensor nodes tend to use older technologies for lower cost and standby power, which is challenging for PUF design because of smaller process variations.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"68","resultStr":"{\"title\":\"8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability\",\"authors\":\"Kaiyuan Yang, Qing Dong, D. Blaauw, D. Sylvester\",\"doi\":\"10.1109/ISSCC.2017.7870303\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Physically Unclonable Functions (PUFs) are among the most promising security primitives for low cost solutions of key storage, chip authentication, and supply chain protection. Two types of PUFs exist in literature [1–6], a “strong” PUF with a large challenge-response space [6] and a “weak” PUF providing a limited length key (chip ID) [1–5]. While the former provides better security theoretically, existing implementations are prone to modeling attacks. So-called “weak” PUFs typically have an array of identically designed PUF cells that leverage device mismatch in fabrication as static entropy source, and serve as a low-cost and more secure alternative to non-volatile-memory-based key storage. Output stability across PVT variations and area are two critical metrics directly related to security and cost of a PUF. Recent works have presented custom PUFs based on NAND gates [1], current mirrors [2], PTAT [3], and cross-coupled inverters [4–5]. These outperform conventional SRAM-based PUFs, but sacrifice other metrics, e.g., [2, 4] are large, [3, 5] has lower native stability and energy efficiency, while [1] is sensitive to supply voltage and may experience large short circuit current. Finally, IoT and wireless sensor nodes tend to use older technologies for lower cost and standby power, which is challenging for PUF design because of smaller process variations.\",\"PeriodicalId\":269679,\"journal\":{\"name\":\"2017 IEEE International Solid-State Circuits Conference (ISSCC)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"68\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Solid-State Circuits Conference (ISSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2017.7870303\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2017.7870303","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
8.3 A 553F2 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability
Physically Unclonable Functions (PUFs) are among the most promising security primitives for low cost solutions of key storage, chip authentication, and supply chain protection. Two types of PUFs exist in literature [1–6], a “strong” PUF with a large challenge-response space [6] and a “weak” PUF providing a limited length key (chip ID) [1–5]. While the former provides better security theoretically, existing implementations are prone to modeling attacks. So-called “weak” PUFs typically have an array of identically designed PUF cells that leverage device mismatch in fabrication as static entropy source, and serve as a low-cost and more secure alternative to non-volatile-memory-based key storage. Output stability across PVT variations and area are two critical metrics directly related to security and cost of a PUF. Recent works have presented custom PUFs based on NAND gates [1], current mirrors [2], PTAT [3], and cross-coupled inverters [4–5]. These outperform conventional SRAM-based PUFs, but sacrifice other metrics, e.g., [2, 4] are large, [3, 5] has lower native stability and energy efficiency, while [1] is sensitive to supply voltage and may experience large short circuit current. Finally, IoT and wireless sensor nodes tend to use older technologies for lower cost and standby power, which is challenging for PUF design because of smaller process variations.