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2010 IEEE Radio Frequency Integrated Circuits Symposium最新文献

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Near zero turn-on voltage high-efficiency UHF RFID rectifier in silicon-on-sapphire CMOS 近零导通电压高效率超高频RFID整流器在硅对蓝宝石CMOS
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477409
P. Theilmann, C. Presti, D. Kelly, P. Asbeck
{"title":"Near zero turn-on voltage high-efficiency UHF RFID rectifier in silicon-on-sapphire CMOS","authors":"P. Theilmann, C. Presti, D. Kelly, P. Asbeck","doi":"10.1109/RFIC.2010.5477409","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477409","url":null,"abstract":"A UHF RFID rectifier which turns on at near zero input voltage is demonstrated. The rectifier is fabricated in 0.25-µm silicon-on-sapphire (SOS) CMOS technology using intrinsic, near zero threshold devices. A novel improved cross-coupled bridge topology is used to minimize the leakage incurred through the use of intrinsic devices while maintaining their low power turn on characteristics. The fabricated rectifier demonstrates a peak power conversion efficiency (PCE) of 71.5% at 915MHz with a RF input of −4 dBm and a 30 kΩ load. More importantly, a PCE ≫ 30% was measured for all RF input powers between −28 and −4 dBm demonstrating state-of-the-art efficiency across a wide range of input powers.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117055389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 44
Spurious noise reduction by modulating switching frequency in DC-to-DC converter for RF power amplifier 射频功率放大器dc - dc变换器开关频率调制的杂散噪声抑制
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477360
E. J. Kim, C. Cho, Woonyun Kim, Chang-Ho Lee, J. Laskar
{"title":"Spurious noise reduction by modulating switching frequency in DC-to-DC converter for RF power amplifier","authors":"E. J. Kim, C. Cho, Woonyun Kim, Chang-Ho Lee, J. Laskar","doi":"10.1109/RFIC.2010.5477360","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477360","url":null,"abstract":"The presence of a spectrum spreading effect in a DC-to-DC converter operating in Pulse-Width Modulation (PWM) with a modulated switching frequency is analyzed. A step-down DC-to-DC converter prototype with a digital PWM ramp signal modulator is implemented in a standard CMOS 0.18-µm process. The step-down DC-to-DC converter has an 6-bit up/down binary counter to vary its switching frequency between 2.2 MHz and 4.4 MHz in 64 steps as means of decreasing spurious noise peaks at the output of the switch converter. The measurement results show that the spurious switch noise peak is reduced by 12 dB when a monotonic frequency stepping with the up/down counter is used, and it is shown that the additional switching frequency modulation functionality does not degrade the overall efficiency and the closed loop operation significantly.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125502395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
60 GHz broadband image rejection receiver using varactor tuning 使用变容管调谐的60 GHz宽带图像抑制接收机
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477351
Jihoon Kim, W. Choi, Youngrak Park, Y. Kwon
{"title":"60 GHz broadband image rejection receiver using varactor tuning","authors":"Jihoon Kim, W. Choi, Youngrak Park, Y. Kwon","doi":"10.1109/RFIC.2010.5477351","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477351","url":null,"abstract":"A pHEMT broadband image rejection receiver with an image rejection ratio (IRR) more than 20 dB from 54 GHz to 66 GHz is presented using varactor tuning topology. Tunable varactors connected in shunt between an RF coupler and mixers are used to control the phase and amplitude of two RF signals. It offers the IRR improvement of 3.1 ∼ 21.4 dB in the cost of gain degradation below 1.1 dB from 54 GHz to 66 GHz except for 65 GHz. To the best of authors' knowledge, this work shows the best image rejection performance of V-band receivers. At 61 GHz, this circuit achieves an 18.3 dB conversion gain (C.G) and a 49.3 dB IRR. It shows a noise figure of 5.6 ∼ 8.1 dB from 56 GHz to 64 GHz.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125581309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Power efficient distributed low-noise amplifier in 90 nm CMOS 90nm CMOS的高效功率分布式低噪声放大器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477322
Brecht Machiels, P. Reynaert, M. Steyaert
{"title":"Power efficient distributed low-noise amplifier in 90 nm CMOS","authors":"Brecht Machiels, P. Reynaert, M. Steyaert","doi":"10.1109/RFIC.2010.5477322","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477322","url":null,"abstract":"A low-power wideband distributed low-noise amplifier (DLNA) in 90 nm CMOS is presented. Various techniques have been combined in the design to increase the distributed amplifier's power efficiency. These techniques range from moderate inversion biasing to transmission line tapering. The measured gain of the 12.5 mW DLNA is larger than 15 dB from DC to 21 GHz. The average noise figure in the pass-band is 5.4 dB, the IIP3 at 5 GHz is ࢤ6.6 dBm and the total die area is 0.41 mm2.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127048258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
A 24-GHz and 60-GHz dual-band standing-wave VCO in 0.13µm CMOS process 采用0.13µm CMOS工艺的24 ghz和60 ghz双频驻波压控振荡器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477265
Liang Wu, A. Ng, L. Leung, H. Luong
{"title":"A 24-GHz and 60-GHz dual-band standing-wave VCO in 0.13µm CMOS process","authors":"Liang Wu, A. Ng, L. Leung, H. Luong","doi":"10.1109/RFIC.2010.5477265","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477265","url":null,"abstract":"By exploiting the intrinsic multiple oscillation modes of a standing-wave oscillator, a dual-band millimeter-wave VCO is designed. Implemented in 0.13µm CMOS with an area of 0.05mm2, the VCO prototype measures a dual-band operation at 24 GHz and 60 GHz with tuning range of 10.8% and 7.2%, phase noise of −120dBc/Hz and −114dBc/Hz at 10MHz offset, power consumption of 11mW and 24mW, corresponding to FoM of −177dB and −176dB, respectively.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122532354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
A 1.8 to 2.4-GHz 20mW digital-intensive RF sampling receiver with a noise-canceling bandpass low-noise amplifier in 90nm CMOS 一种1.8至2.4 ghz 20mW数字密集型射频采样接收器，带有90nm CMOS的降噪带通低噪声放大器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477270
Joonhee Lee, Jaewook Kim, Seonghwan Cho
{"title":"A 1.8 to 2.4-GHz 20mW digital-intensive RF sampling receiver with a noise-canceling bandpass low-noise amplifier in 90nm CMOS","authors":"Joonhee Lee, Jaewook Kim, Seonghwan Cho","doi":"10.1109/RFIC.2010.5477270","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477270","url":null,"abstract":"This paper presents a digital-intensive RF sampling receiver composed of a noise-canceling bandpass low-noise amplifier (LNA) and an RF analog-to-digital converter (ADC) for multi-band multi-mode wireless communication. The proposed LNA employs an on-chip transformer to combine the outputs of a common-gate and a common-source LNA to reduce the noise figure and enhance the linearity, while providing tunable bandpass filtering from 1.8 to 2.4-GHz. The RF ADC employs a time-based architecture that uses time-interleaved VCOs with 1st order noise shaping property, which benefits from enhanced time resolution of advanced CMOS process. A prototype chip implemented in 90 nm CMOS process has an area of 0.3 mm2 and achieves SNR of 50 dB for 1-MHz signal bandwidth at 1.8 to 2.4-GHz carrier frequency, while consuming 20 mW from 1.2 V supply.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114426239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A miniature 26-/77-GHz dual-band branch-line coupler using standard 0.18-µm CMOS technology 采用标准0.18µm CMOS技术的微型26 /77 ghz双频分支线耦合器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477385
Yu-Sheng Lin, Cheng‐Ying Hsu, H. Chuang, Chu‐Yu Chen
{"title":"A miniature 26-/77-GHz dual-band branch-line coupler using standard 0.18-µm CMOS technology","authors":"Yu-Sheng Lin, Cheng‐Ying Hsu, H. Chuang, Chu‐Yu Chen","doi":"10.1109/RFIC.2010.5477385","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477385","url":null,"abstract":"A 26-/77-GHz dual-band branch-line coupler fabricated using standard 0.18-µm CMOS technology is presented. The dual-band coupler is with a compact size of 1.0 × 1.0 mm2. The simulated frequency response is to 110 GHz. The measured frequency response shows a good performance with amplitude and phase imbalnce of ± 0.5 dB and ± 5°, respectively, in the low band. The S21 in the high band is about 7.5 dB The measured isolation and the return loss are better than 15 dB within the two passbands. The on-chip coupler will be useful for the integrated design of a 26/77-GHz CMOS single-chip RF transceiver.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128543141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A linear-in-dB SiGe HBT wideband high dynamic range RF envelope detector 一种线性进db SiGe HBT宽带高动态范围射频包络探测器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477405
H. Pan, L. Larson
{"title":"A linear-in-dB SiGe HBT wideband high dynamic range RF envelope detector","authors":"H. Pan, L. Larson","doi":"10.1109/RFIC.2010.5477405","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477405","url":null,"abstract":"A linear-in-dB wideband, SiGe HBT high dynamic range RF envelope detector is presented. The detector operates from 200MHz to 2.5GHz with 50dB maximum dynamic range.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128773996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A wide tuning 1.3 GHz LC VCO with fast settling noise filtering voltage regulator in 0.18 µm CMOS process 宽调谐1.3 GHz LC压控振荡器，采用0.18µm CMOS工艺，具有快速沉降噪声滤波稳压器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477408
H. Akima, A. Dec, K. Suyama
{"title":"A wide tuning 1.3 GHz LC VCO with fast settling noise filtering voltage regulator in 0.18 µm CMOS process","authors":"H. Akima, A. Dec, K. Suyama","doi":"10.1109/RFIC.2010.5477408","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477408","url":null,"abstract":"This paper presents a wide tuning LC voltage controlled oscillator (VCO) with integrated voltage regulator to minimize supply pushing. The integrated voltage regulator utilizes on-chip low-corner frequency noise filters to minimize the impact of regulator noise on VCO phase noise. One shot circuit is used with low-corner frequency noise filter to ensure fast settling. The VCO achieves current consumption of 15.9 mA with single integrated low-Q LC tank, tuning range of 620.8 MHz to 1384.5 MHz, phase noise of −128 dBc/Hz at 1 MHz offset from 1.3 GHz carrier at room temperature. With the noise filter, 9 dB improvement in phase noise is demonstrated in measurement. The frequency range can be extended to 38.8 MHz – 1384.5 MHz with integrated frequency dividers.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128261085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A quadrature charge-domain filter with an extra in-band filtering for RF receivers 一个带额外带内滤波的正交电荷域滤波器，用于射频接收器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477350
Ming-Feng Huang
{"title":"A quadrature charge-domain filter with an extra in-band filtering for RF receivers","authors":"Ming-Feng Huang","doi":"10.1109/RFIC.2010.5477350","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477350","url":null,"abstract":"A quadrature charge-domain filter (QCDF) is proposed. This QCDF, based on the input phases, could provide a stop-band filtering and support an in-band filtering of noise. Through the use of FIR coefficient, the alias-band rejection (ABR) and in-band suppression (IBS) could be well controlled. Measurement shows the 27.1dB ABR and 31.3dB IBS from out-of-phase signals and in-phase signals, respectively. This QCDF with 36MHz bandwidth and 7.5dBm IIP3 is fabricated on the 90nm CMOS process.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128263582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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