{"title":"90nm CMOS的高效功率分布式低噪声放大器","authors":"Brecht Machiels, P. Reynaert, M. Steyaert","doi":"10.1109/RFIC.2010.5477322","DOIUrl":null,"url":null,"abstract":"A low-power wideband distributed low-noise amplifier (DLNA) in 90 nm CMOS is presented. Various techniques have been combined in the design to increase the distributed amplifier's power efficiency. These techniques range from moderate inversion biasing to transmission line tapering. The measured gain of the 12.5 mW DLNA is larger than 15 dB from DC to 21 GHz. The average noise figure in the pass-band is 5.4 dB, the IIP3 at 5 GHz is ࢤ6.6 dBm and the total die area is 0.41 mm2.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"Power efficient distributed low-noise amplifier in 90 nm CMOS\",\"authors\":\"Brecht Machiels, P. Reynaert, M. Steyaert\",\"doi\":\"10.1109/RFIC.2010.5477322\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power wideband distributed low-noise amplifier (DLNA) in 90 nm CMOS is presented. Various techniques have been combined in the design to increase the distributed amplifier's power efficiency. These techniques range from moderate inversion biasing to transmission line tapering. The measured gain of the 12.5 mW DLNA is larger than 15 dB from DC to 21 GHz. The average noise figure in the pass-band is 5.4 dB, the IIP3 at 5 GHz is ࢤ6.6 dBm and the total die area is 0.41 mm2.\",\"PeriodicalId\":269027,\"journal\":{\"name\":\"2010 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2010.5477322\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2010.5477322","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power efficient distributed low-noise amplifier in 90 nm CMOS
A low-power wideband distributed low-noise amplifier (DLNA) in 90 nm CMOS is presented. Various techniques have been combined in the design to increase the distributed amplifier's power efficiency. These techniques range from moderate inversion biasing to transmission line tapering. The measured gain of the 12.5 mW DLNA is larger than 15 dB from DC to 21 GHz. The average noise figure in the pass-band is 5.4 dB, the IIP3 at 5 GHz is ࢤ6.6 dBm and the total die area is 0.41 mm2.
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