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Exploitation of active load-pull and DLUT models in MMIC design MMIC设计中主动负载-拉和多路复用模型的开发
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477406
D. Fitzpatrick, T. Williams, J. Lees, J. Benedikt, S. Cripps, P. Tasker
{"title":"Exploitation of active load-pull and DLUT models in MMIC design","authors":"D. Fitzpatrick, T. Williams, J. Lees, J. Benedikt, S. Cripps, P. Tasker","doi":"10.1109/RFIC.2010.5477406","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477406","url":null,"abstract":"The use of active load-pull techniques in the design of high efficiency microwave amplifiers has been well documented. This paper describes how it has been applied to the design of a wideband RFIC gain stage. The technique is particularly relevant in new and developing processes where accurate device models are not available and designers otherwise are often forced to use multiple iterations of a design to attempt to encompass the variability in the process. Often in RFIC design, components operate outside of the ideal operating impedance. A look-up table model technique based on measured data which can be used by conventional CAD programs is used to analyse behaviour. This paper shows how the design process and capabilities of the system can be combined to improve the cost effectiveness and performance of RFIC development and with a stable manufacturing process a “first pass” design methodology. The use of the measurement system as an analysis tool is described.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117241516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design methodology and comparison of rectifiers for UHF-band RFIDs 超高频射频识别整流器的设计方法与比较
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477347
F. Mazzilli, P. Thoppay, Norbert Johl, C. Dehollain
{"title":"Design methodology and comparison of rectifiers for UHF-band RFIDs","authors":"F. Mazzilli, P. Thoppay, Norbert Johl, C. Dehollain","doi":"10.1109/RFIC.2010.5477347","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477347","url":null,"abstract":"Rectifiers are important energy converters and henceforth crucial building blocks for RFID applications. In the first half of the work, we have presented a design methodology for matching the rectifier input impedance with the antenna to maximize the rectifier power conversion efficiency. The proposed design approach uses the fundamental transconductance (Gm(1)) analysis to estimate the rectifier input impedance. In the second half, a comparison between various possible single-stage rectifier topologies implemented in a CMOS 0.18 μm technology operating at UHF-band is presented. Using voltage conversion efficiency as the FOM, the optimum rectifier topology for RFID application is determined.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127914073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 42
Wafer-scale W-band power amplifiers using on-chip antennas 采用片上天线的晶圆级w波段功率放大器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477386
Y. Atesal, B. Cetinoneri, R. Alhalabi, Gabriel M. Rebeiz
{"title":"Wafer-scale W-band power amplifiers using on-chip antennas","authors":"Y. Atesal, B. Cetinoneri, R. Alhalabi, Gabriel M. Rebeiz","doi":"10.1109/RFIC.2010.5477386","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477386","url":null,"abstract":"This paper presents, for the first time, a W-band SiGe power amplifier designed and fabricated together with a high-efficiency on-chip microstrip antenna. The antenna/amplifier results in an effective radiated power (ERP=PtGt) ≫ 10 dBm from 88 to 98 GHz, with a peak of 14.6 dBm at 92 GHz. The chip consumes 120 mA from a 1.7 V supply. The antenna/amplifier approach can be extended to a large number of elements (8×8) and allows for efficient wafer-scale power combining and phased-array scanning.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133735347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Wideband trans-impedance filter low noise amplifier 宽带反式阻抗滤波低噪声放大器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477375
M. Kaltiokallio, A. Pärssinen, J. Ryynänen
{"title":"Wideband trans-impedance filter low noise amplifier","authors":"M. Kaltiokallio, A. Pärssinen, J. Ryynänen","doi":"10.1109/RFIC.2010.5477375","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477375","url":null,"abstract":"This paper focuses on the design of wideband low-noise amplifier, which includes transferred-impedance structures to improve interference tolerance. The LNA is implemented as part of simple RF receiver to demonstrate the feasibility of the transferred-impedance circuits in wideband receivers. The LNA itself achieves a gain of 24 and 20 dB, noise figure of 3.4 and 4.9 dB with ICP of -21 and -15 dBm for the interference blocking structure turned off and on, respectively. Added selectivity of 6 dB is achieved by using the structure described in this paper.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134023419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 60 GHz CMOS receiver front-end with integrated 180 ° out-of-phase wilkinson power divider 60 GHz CMOS接收器前端，集成180°反相威尔金森功率分配器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477271
Chi-Chen Chen, Yo‐Sheng Lin, Jen-How Lee, Jin-Fa Chang
{"title":"A 60 GHz CMOS receiver front-end with integrated 180 ° out-of-phase wilkinson power divider","authors":"Chi-Chen Chen, Yo‐Sheng Lin, Jen-How Lee, Jin-Fa Chang","doi":"10.1109/RFIC.2010.5477271","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477271","url":null,"abstract":"A 60-GHz receiver front-end with an integrated 180° out-of-phase Wilkinson power divider using standard 0.13 µm CMOS technology is reported. The receiver front-end comprises a wideband low-noise amplifier (LNA) with 12.4-dB gain, a current-reused bleeding mixer, a baseband amplifier, and a 180° out-of-phase Wilkinson power divider. The receiver front-end consumed 50.2 mW and achieved input return loss at RF port better than −10 dB for frequencies from 52.3 GHz to 62.3 GHz. At IF of 20 MHz, the receiver front-end achieved maximum conversion gain of 18.7 dB at RF of 56 GHz. The corresponding 3-dB bandwidth (ω3dB) of RF is 9.8 GHz (50.8 GHz to 60.6 GHz). The measured minimum noise figure (NF) was 9 dB at 58 GHz, an excellent result for a 60-GHz-band CMOS receiver front-end. In addition, the measured input 1-dB compression point (P1dB) and input third-order inter-modulation point (IIP3) are −20.8 dBm and −12 dBm, respectively, at 60 GHz. These results demonstrate the adopted receiver front-end architecture is very promising for high-performance 60-GHz-band RFIC applications.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130328072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A switching-mode amplifier for class-S transmitters for clock frequencies up to 7.5 GHz in 0.25µm SiGe-BiCMOS 一种开关模式放大器，用于时钟频率高达7.5 GHz的s类发射机，在0.25µm SiGe-BiCMOS中
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477368
S. Heck, Martin Schmidt, A. Brackle, F. Schuller, M. Grozing, M. Berroth, H. Gustat, C. Scheytt
{"title":"A switching-mode amplifier for class-S transmitters for clock frequencies up to 7.5 GHz in 0.25µm SiGe-BiCMOS","authors":"S. Heck, Martin Schmidt, A. Brackle, F. Schuller, M. Grozing, M. Berroth, H. Gustat, C. Scheytt","doi":"10.1109/RFIC.2010.5477368","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477368","url":null,"abstract":"This paper presents the first voltage mode H-bridge switching amplifier in a fast complementary SiGe-technology for frequencies in the GHz range. The amplifier is suited as a driver for a high power GaN amplifier in class-S transmitters. It can be operated with pseudo-random digital pulse trains up to 7.5 Gbit/s. The measured broadband output power for a rectangular drive signal with a 50% duty cycle and a frequency of 2 GHz is about 148 mW. The efficiency of the switching stage including its two-stage inverter driver is about 43%. Including the input current-mode-logic (CML) stage, the PAE is about 30%.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132232345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A 1.8V 74mW UHF RFID reader receiver with 18.5dBm IIP3 and −77dBm sensitivity in 0.18µm CMOS 一个1.8V 74mW UHF RFID阅读器接收器，IIP3为18.5dBm，灵敏度为- 77dBm，采用0.18µm CMOS
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477263
Xuguang Sun, B. Chi, Chun Zhang, Ziqiang Wang, Zhihua Wang
{"title":"A 1.8V 74mW UHF RFID reader receiver with 18.5dBm IIP3 and −77dBm sensitivity in 0.18µm CMOS","authors":"Xuguang Sun, B. Chi, Chun Zhang, Ziqiang Wang, Zhihua Wang","doi":"10.1109/RFIC.2010.5477263","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477263","url":null,"abstract":"A UHF RFID reader receiver is implemented in 0.18µm CMOS. The direct-conversion receiver consists of an LNA, passive mixers, baseband PGAs and LPFs. As high as 18.5dBm measured IIP3 of the RF front-end is achieved by using passive mixers driven by 25% duty cycle square wave LO. The receiver has a sensitivity of −77dBm in the normal mode and −87dBm in the LBT mode. The total power dissipation in the normal mode is 74mW from 1.8V power supply.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123491435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A mm-wave arbitrary 2N band oscillator based on even-odd mode technique 基于奇偶模技术的毫米波任意2N波段振荡器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477298
A. Yu, S. Tam, D. Murphy, T. Itoh, M. Chang
{"title":"A mm-wave arbitrary 2N band oscillator based on even-odd mode technique","authors":"A. Yu, S. Tam, D. Murphy, T. Itoh, M. Chang","doi":"10.1109/RFIC.2010.5477298","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477298","url":null,"abstract":"A technique to build mm-wave arbitrary 2N band oscillators is presented. Based on even-odd mode operation, the technique breaks the fundamental tradeoff between frequency switching range and tank quality factor, Q, which exists in classical switched-capacitor and switchedinductor methods. As a result, this technique achieves multiband operation with FOMs comparable to single band oscillators. To verify the theory, a quadruple band oscillator with 4 arbitrary chosen frequencies (43, 49, 58 and 75 GHz) is implemented in 65-nm CMOS technology. The phase noise measurements taking at 1 MHz offset are −100.3, −95.3, −93.8 and −86.2 dBc/Hz, respectively. The power consumption of the oscillator core is 12mW. The presented technique would enable the development of mm-wave software-defined multi-standard radios.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"235 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122348227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 3.4 GHz to 4.3 GHz frequency-reconfigurable class E power amplifier with an integrated CMOS-MEMS LC balun 一种3.4 GHz至4.3 GHz频率可重构E类功率放大器，集成了CMOS-MEMS LC平衡器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477276
Leon Wang, T. Mukherjee
{"title":"A 3.4 GHz to 4.3 GHz frequency-reconfigurable class E power amplifier with an integrated CMOS-MEMS LC balun","authors":"Leon Wang, T. Mukherjee","doi":"10.1109/RFIC.2010.5477276","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477276","url":null,"abstract":"A monolithically integrated differential class E power amplifier capable of dynamically switching between 3.4 GHz and 4.3 GHz operation has been designed and fabricated in a 0.35 µm BiCMOS process; this power amplifier also includes an integrated CMOS-MEMS variable capacitor enabled LC balun for differential to single-ended conversion. The power amplifier achieves a maximum output power of 19.1 dBm and a maximum power added efficiency of 15.1% with a supply voltage of 3.3 V.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127447444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A low-power receiver down-converter with high dynamic range performance 具有高动态范围性能的低功耗接收机下变频器
2010 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2010-05-23 DOI: 10.1109/RFIC.2010.5477305
Diptendu Ghosh, R. Gharpurey
{"title":"A low-power receiver down-converter with high dynamic range performance","authors":"Diptendu Ghosh, R. Gharpurey","doi":"10.1109/RFIC.2010.5477305","DOIUrl":"https://doi.org/10.1109/RFIC.2010.5477305","url":null,"abstract":"A low-power down-converter that uses a passive current-commutating mixer for frequency translation, while sharing the bias current between the RF and baseband stages is presented. An active noise shaping network is implemented to reduce low-frequency noise at the output. Linearity is enhanced through the use of non-linear feedback. The design, implemented in a 0.18 µm CMOS technology, achieves conversion gain of 35 dB, NF of 9.8 dB, in-channel OIP3 of 15.8 dBV while consuming 2.1 mA from a 1.8 V supply.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116566428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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