International Conference on Green Computing最新文献

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Ultra low energy standard cell design optimization for performance and placement algorithm 超低能耗标准电池设计优化的性能和放置算法
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598273
S. Amarchinta, D. Kudithipudi
{"title":"Ultra low energy standard cell design optimization for performance and placement algorithm","authors":"S. Amarchinta, D. Kudithipudi","doi":"10.1109/GREENCOMP.2010.5598273","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598273","url":null,"abstract":"Most medical implantable devices and wearable electronics have critical battery life requirements. Such devices will fundamentally benefit from ultra low voltage or subthreshold operation of circuits, leading to longer battery life. In this work, we focus on designing a subthreshold standard cell library and improving their performance using charge boosters. The performance-enhanced standard cell library is implemented on ISCAS'85 benchmark circuits and a 10 times improvement in frequency with an overhead of approximately 2 times in the energy-delay product is observed. We also propose a placement methodology to integrate the enhanced cells using Critical Path Method (CPM) algorithm to minimize the overhead in energy consumption. A 50 % reduction in energy was achieved with implementation of CPM.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114771365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An analysis of the energy efficiency of multi-threading on multi-core machines 多核机器上多线程的能效分析
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598301
Chengling Tseng, S. Figueira
{"title":"An analysis of the energy efficiency of multi-threading on multi-core machines","authors":"Chengling Tseng, S. Figueira","doi":"10.1109/GREENCOMP.2010.5598301","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598301","url":null,"abstract":"Multi-core machines are said to provide high performance at low-energy cost via multi-threading. However, obtaining high performance at low-energy cost depends on the optimal usage of the platform. The experimental results show that executing a multi-threaded program with an optimal configuration can lead to significant gains: up to 38.1% reduction in power and 49.72% reduction in total energy. The paper reports on the importance of isolating the energy used by the idle system and considering just the energy used by the multi-threaded program to be able to evaluate the performance of multi-threading accurately. The experimental results also show that the concept that “power consumption is proportional to the cube of the frequency” is not general and does not apply to the scenario investigated. In the experiments presented, the power consumption was rather linear with Intel's mainstream Core Duo Quad microprocessor.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133284021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Bounded skew clock routing for 3D stacked IC designs: Enabling trade-offs between power and clock skew 用于3D堆叠IC设计的有界倾斜时钟路由:实现功率和时钟倾斜之间的权衡
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598269
Tak-Yung Kim, Taewhan Kim
{"title":"Bounded skew clock routing for 3D stacked IC designs: Enabling trade-offs between power and clock skew","authors":"Tak-Yung Kim, Taewhan Kim","doi":"10.1109/GREENCOMP.2010.5598269","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598269","url":null,"abstract":"This paper addresses a bounded skew clock routing problem in 3D stacked IC designs to enable effective trade-offs between power and clock skew. The existing 3D clock tree synthesis (CTS) techniques for power and temperature management solve the clock routing problem in two steps: (step 1) constructing a zero skew clock tree and (step 2) restructuring the clock tree to minimize the increased clock skew caused by temperature variation. Unlike the previous works, this paper provides various solutions for step 1 by relaxing skew bound rather than one (possibly extreme) solution, so that the task of step 2 is more amenable and effective by reduced or controlled power in step 1. To this end, we propose an algorithm, called BSTDME-3D (bounded skew clock tree with deffered merge embedding for 3D ICs), to solve the bounded skew clock tree embedding problem in 3D ICs for a given tree topology. By utilizing the proposed clock tree embedding algorithm, we setup the (un)buffered 3D CTS flow under a (non-)zero skew bound, and study impacts of skew bound on total wirelength and thus clock power consumption. From the extensive experiments, it is shown that the unbuffered CTS with 100ps skew bound reduces 3D clock wirelength by 16% on average for the 4-die stacked 3D ICs. The buffered CTS with 100ps skew bound reduces 3D clock wirelength by 18%, buffer resource by 25%, and thereby clock power consumption by 16% on average for the 4-die stacked 3D ICs.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114985065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Optimizing performance and energy in computational grids using non-cooperative game theory 利用非合作博弈论优化计算网格的性能和能量
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598293
J. Wilkins, I. Ahmad, Hafiz Fahad Sheikh, S. Khan, S.A. Rajput
{"title":"Optimizing performance and energy in computational grids using non-cooperative game theory","authors":"J. Wilkins, I. Ahmad, Hafiz Fahad Sheikh, S. Khan, S.A. Rajput","doi":"10.1109/GREENCOMP.2010.5598293","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598293","url":null,"abstract":"There is a lack of generally applicable methods for reducing energy consumption while ensuring good quality of service in distributed computational grids. We study the energy-aware task allocation problem for assigning a set of tasks onto the machines in a grid environment where the conflicting goals of ensuring quality of service and reducing energy consumption makes the machines compete with each other. We propose bidding mechanisms in which the machines have to win in order to maintain a minimum fitness value and thus remain relevant to the system and hence must try their best to meet the goals. The grid manager keeps only those machines that win and eliminate from the pool the ones that are unfit. The proposed algorithm encompasses bidding strategies, fitness calculations, penalties, exit as well as resurrection mechanisms to support a non-cooperative game in which all machines compete to win tasks. The concept of fitness is fundamental to our algorithm, defining a machine's ability to remain in the system. When heterogeneous machines are part of a shared computing resource pool governed by a grid economy, the proposed approach fits very well for achieving conflicting goals. By simulating several machines with diverse architectures and task sets with varying requirements, we demonstrate the effectiveness of the proposed scheme and show that it generates short task makespans and reduced energy consumption. The algorithm is extremely fast, takes highly detailed machine and task characteristics into consideration, and outperforms the Earliest Deadline First Scheme in every aspect.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128081407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Thermal constrained workload distribution for maximizing throughput on multi-core processors 用于在多核处理器上最大化吞吐量的热约束工作负载分布
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598302
Zhe Wang, S. Ranka
{"title":"Thermal constrained workload distribution for maximizing throughput on multi-core processors","authors":"Zhe Wang, S. Ranka","doi":"10.1109/GREENCOMP.2010.5598302","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598302","url":null,"abstract":"Power density and heat density of multi-core processor system are increasing exponentially based on Moore's Law. The reliability of a chip is severely impacted by temperature “hot spots”. In this paper, we study scheduling algorithms for multi-core processors that incorporate temperature constraints. Our goal is to optimize the workload distribution on a multicore processor to maximize throughput with a given maximum operating temperature. Our algorithms are targeted for a larger class of data parallel and task parallel applications. Experimental results show that our algorithms are computationally fast, maximize throughput and provide effective temperature management.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124170774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Quantifying the impact of GPUs on performance and energy efficiency in HPC clusters 量化gpu对高性能计算集群性能和能效的影响
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598297
J. Enos, C. Steffen, Joshi Fullop, M. Showerman, Guochun Shi, K. Esler, V. Kindratenko, J. Stone, James C. Phillips
{"title":"Quantifying the impact of GPUs on performance and energy efficiency in HPC clusters","authors":"J. Enos, C. Steffen, Joshi Fullop, M. Showerman, Guochun Shi, K. Esler, V. Kindratenko, J. Stone, James C. Phillips","doi":"10.1109/GREENCOMP.2010.5598297","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598297","url":null,"abstract":"We present an inexpensive hardware system for monitoring power usage of individual CPU hosts and externally attached GPUs in HPC clusters and the software stack for integrating the power usage data streamed in real-time by the power monitoring hardware with the cluster management software tools. We introduce a measure for quantifying the overall improvement in performance-per-watt for applications that have been ported to work on the GPUs. We use the developed hardware/software infrastructure to demonstrate the overall improvement in performance-per-watt for several HPC applications implemented to work on GPUs.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129029112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
Reliability/wearout-aware design 可靠性/ wearout-aware设计
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598272
M. Stan
{"title":"Reliability/wearout-aware design","authors":"M. Stan","doi":"10.1109/GREENCOMP.2010.5598272","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598272","url":null,"abstract":"Reliability and wearout phenomena are becoming first order design constraints in modern ICs. Ignoring wearout at design time can lead to costly early failures in the field, provisioning for wearout through increased margins can lead to overdesign. This presentation will go over several methods that try to: (1) accurately model wearout in order to predict and optimize margin provisioning (2) track wearout and signal imminent failure (3) track wearout and provide closed loop adaptation and (4) even take advantage of wearout in a few special cases.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124140973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CMOS nanophotonics for exascale systems 百亿亿级系统的CMOS纳米光子学
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598267
M. McLaren
{"title":"CMOS nanophotonics for exascale systems","authors":"M. McLaren","doi":"10.1109/GREENCOMP.2010.5598267","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598267","url":null,"abstract":"A critical challenge on the path to exascale systems is the growing proportion of power consumed in interconnects. Optical communication can potentially reduce the energy per bit of communication at both the interchip and intrachip level. The cost of converting between the electronic and optical domains, which can be prohibitively high using current discrete optical components, will be radically reduced through the development of integrated photonics using standard silicon processes. However the benefits of integrated photonics go beyond simply making “better wires”. The greatly increased bandwidth density, and relative distance independence of DWDM photonics allow new architectures for networking and memory systems to be explored.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132495617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Battery energy consumption footprint of embedded multimedia systems 嵌入式多媒体系统的电池能耗足迹
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598264
Jiucai Zhang, S. Ci, Xueyi Wang
{"title":"Battery energy consumption footprint of embedded multimedia systems","authors":"Jiucai Zhang, S. Ci, Xueyi Wang","doi":"10.1109/GREENCOMP.2010.5598264","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598264","url":null,"abstract":"The rapid demand of mobile multimedia causes a grant challenge on energy and environment. However, little research has been done on the carbon footprint of embedded multimedia system. To fill this gap, this paper presents a comprehensive architecture to measure the carbon footprint of H.264 codec, which has been widely used in mobile multimedia systems. The measurement results of H.264 under various system operation modes provide an insightful guideline to design and optimize system parameters to minimize the carbon footprint of various embedded multimedia systems.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"270 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123417150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Avoiding energy wastage in parallel applications 避免并行应用中的能源浪费
International Conference on Green Computing Pub Date : 2010-08-15 DOI: 10.1109/GREENCOMP.2010.5598314
V. Korthikanti, G. Agha
{"title":"Avoiding energy wastage in parallel applications","authors":"V. Korthikanti, G. Agha","doi":"10.1109/GREENCOMP.2010.5598314","DOIUrl":"https://doi.org/10.1109/GREENCOMP.2010.5598314","url":null,"abstract":"We propose a methodology to analyze algorithms in order to reduce energy waste in executing applications. Our methodology is based on three observations. First, the relation between power and frequency of a single core is approximately cubic. Thus it may be possible to run an application slower on a core in order to save energy. In the case of a parallel architecture, one has to also factor the effect (on performance and energy consumption) of the interaction between cores. Second, multicore architectures which aggressively manage power consumption by allowing cores to be operated at reduced frequencies are being developed. This means that parallel applications on a multicore architecture can be executed using a variable number of cores running at different frequencies-affecting both the performance of the application and the energy required to execute it. Lastly, there is a certain benefit (positive utility) in running an application faster and a cost (negative utility) in terms of the energy consumed. Expending energy that does not contribute to the overall utility wastes the energy. The precise trade-off between performance and energy consumption depends on the structure of a parallel algorithm and the associated utilities. We describe a methodology to do this trade-off and illustrate it with several parallel algorithms.","PeriodicalId":262148,"journal":{"name":"International Conference on Green Computing","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126660368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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