Ultra low energy standard cell design optimization for performance and placement algorithm

Abstract

Most medical implantable devices and wearable electronics have critical battery life requirements. Such devices will fundamentally benefit from ultra low voltage or subthreshold operation of circuits, leading to longer battery life. In this work, we focus on designing a subthreshold standard cell library and improving their performance using charge boosters. The performance-enhanced standard cell library is implemented on ISCAS'85 benchmark circuits and a 10 times improvement in frequency with an overhead of approximately 2 times in the energy-delay product is observed. We also propose a placement methodology to integrate the enhanced cells using Critical Path Method (CPM) algorithm to minimize the overhead in energy consumption. A 50 % reduction in energy was achieved with implementation of CPM.