Reliability/wearout-aware design

M. Stan
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Abstract

Reliability and wearout phenomena are becoming first order design constraints in modern ICs. Ignoring wearout at design time can lead to costly early failures in the field, provisioning for wearout through increased margins can lead to overdesign. This presentation will go over several methods that try to: (1) accurately model wearout in order to predict and optimize margin provisioning (2) track wearout and signal imminent failure (3) track wearout and provide closed loop adaptation and (4) even take advantage of wearout in a few special cases.
可靠性/ wearout-aware设计
可靠性和损耗现象正在成为现代集成电路设计中的一级限制因素。在设计时忽略磨损可能会导致昂贵的早期故障,通过增加利润来准备磨损可能会导致过度设计。本演讲将介绍几种尝试:(1)准确建模磨损以预测和优化保证金供应(2)轨道磨损并发出即将发生故障的信号(3)轨道磨损并提供闭环适应(4)甚至在一些特殊情况下利用磨损。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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