2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)最新文献_第5页

A new feedback circuit based charge-pump for wide-range and low-jitter DLL suitable for PET imaging applications 一种新的基于反馈电路的电荷泵，适用于PET成像应用的宽量程低抖动DLL

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926125

S. A. Mondal, S. Pal, Manodipan Sahoo, P. Mondal, H. Rahaman

引用次数: 4

Modified CCSDS image data compression 改进CCSDS图像数据压缩

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926163

Jinitha Prem, Dominic Mathew

引用次数: 0

Reconfigurable System-on-Chip design using FPGA 采用FPGA的可重构片上系统设计

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926215

B. Muralikrishna, G. L. Madhumati, Habibulla Khan, K. Deepika

{"title":"Reconfigurable System-on-Chip design using FPGA","authors":"B. Muralikrishna, G. L. Madhumati, Habibulla Khan, K. Deepika","doi":"10.1109/ICDCSYST.2014.6926215","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926215","url":null,"abstract":"System-on-Chip (SoC) design integrates processors, memory, and a variety of IPs in a single design. Due to the FPGA capabilities and high time-to-market pressures, complex SoC designs are increasingly targeted to FPGA. Traditionally cores in FPGAs are connected using AXI and PLB bus-based architectures. FPGA devices provide Embedded Systems development with new alternatives for creating new hardware accelerated applications. The availability of embedded processor subsystems in FPGAs opens the door to a myriad of applications. Reconfigurable System-on-Chip architecture: includes MicroBlaze Soft Core Processor integrates peripherals with PLB and OPB Buses provides access to memory, PS2 and VGA IP cores. A new peripheral based Arithmetic application is designed, the keyboard module is a custom hardware module that accepts input from a PS/2 serial keyboard and outputs character data to the VGA input memory. VHDL Language is used in ISE for custom logic design. SystemC & VHDL Co-Synthesis scenario provides a way of checking interoperability of a single designed different functionality hardware module. Both designs are synthesizable and implemented in a single Bitstream, and configured to FPGA. Two level functionality is observed for the configured Bitstream with FPGA Hardware, design modeling was done using SystemC & VHDL Co-Synthesis. This paper presents an evaluation of design methods and concepts of reconfigurable architecture; it provides a lot of options for system designers. Co-Synthesis was done either Top-Down or Bottom-Up Design Methodologies. Implementation was targeted through Spartan - 3E FPGA Board.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"232 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132737545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Hierarchical SVM to detect mental stress in human beings using Heart Rate Variability 基于心率变异性的分层支持向量机检测人类精神压力

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926145

L. Vanitha, G. Suresh

引用次数: 15

A study on the effect of emotion evoking videos on physiological signals 情绪唤起视频对生理信号影响的研究

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926203

K. G. Smitha, Neethu Robinson, A. P. Vinod

引用次数: 2

Outage performance analysis of MIMO cognitive radio network users in fading environment 衰落环境下MIMO认知无线网络用户的中断性能分析

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926207

Anil Vallamreddy, P. Indumathi

引用次数: 0

Load balancing with availability checker and load reporters (LB-ACLRs) for improved performance in distributed systems 负载平衡与可用性检查器和负载报告器(lb - aclr)，以提高分布式系统的性能

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926209

P. Soundarabai, A. Rani, Ritesh Sahai, J. Thriveni, K. Venugopal, L. M. Patnalk

{"title":"Load balancing with availability checker and load reporters (LB-ACLRs) for improved performance in distributed systems","authors":"P. Soundarabai, A. Rani, Ritesh Sahai, J. Thriveni, K. Venugopal, L. M. Patnalk","doi":"10.1109/ICDCSYST.2014.6926209","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926209","url":null,"abstract":"Distributed system has quite a lot of servers to attain increased availability of service and for fault tolerance. Balancing the load among these servers is an important task to achieve better performance. There are various hardware and software based load balancing solutions available. However there is always an overhead on Servers and the Load Balancer while communicating with each other and sharing their availability and the current load status information. Load balancer is always busy in listening to clients' request and redirecting them. It also needs to collect the servers' availability status frequently, to keep itself up-to-date. Servers are busy in not only providing service to clients but also sharing their current load information with load balancing algorithms. In this paper we have proposed and discussed the concept and system model for software based load balancer along with Availability-Checker and Load Reporters (LB-ACLRs) which reduces the overhead on server and the load balancer. We have also described the architectural components with their roles and responsibilities. We have presented a detailed analysis to show how our proposed Availability Checker significantly increases the performance of the system.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121115457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Improved linearity standard cell based flash ADC with DBNS encoding scheme 基于DBNS编码方案的改进线性标准单元flash ADC

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926158

P. Palsodkar, Sandhya More, P. Dakhole

引用次数: 1

Modeling of flicker due to vertical wind shear initiated by vegetation in a riverside wind turbine using wind tunnel 河滨风力机植被垂直风切变闪变的风洞模拟

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926200

Dr. Prof. Datta S Chavan Ph.D., Aditi Rana, Mahal Raj Singh, P. Karandikar, S. D. Bhide

引用次数: 25

Design of wavelet based image fusion using A Trous algorithm 基于小波变换的图像融合算法设计

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2014-03-06 DOI: 10.1109/ICDCSYST.2014.6926161

D. S. Praveena, Dr. Ila. Vennila, Ms. A. K. Kavitha

引用次数: 4